BaseSimpleCPU.py revision 12563:8d59ed22ae79
12SN/A# Copyright (c) 2008 The Hewlett-Packard Development Company 21762SN/A# All rights reserved. 32SN/A# 42SN/A# Redistribution and use in source and binary forms, with or without 52SN/A# modification, are permitted provided that the following conditions are 62SN/A# met: redistributions of source code must retain the above copyright 72SN/A# notice, this list of conditions and the following disclaimer; 82SN/A# redistributions in binary form must reproduce the above copyright 92SN/A# notice, this list of conditions and the following disclaimer in the 102SN/A# documentation and/or other materials provided with the distribution; 112SN/A# neither the name of the copyright holders nor the names of its 122SN/A# contributors may be used to endorse or promote products derived from 132SN/A# this software without specific prior written permission. 142SN/A# 152SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 162SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 172SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 182SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 192SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 202SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 212SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 222SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 232SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 242SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 252SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 262SN/A# 272665SN/A# Authors: Gabe Black 282665SN/A 292SN/Afrom __future__ import print_function 302SN/A 314826Ssaidi@eecs.umich.edufrom m5.defines import buildEnv 324826Ssaidi@eecs.umich.edufrom m5.params import * 332SN/Afrom BaseCPU import BaseCPU 346216Snate@binkert.orgfrom DummyChecker import DummyChecker 3510468Sandreas.hansson@arm.comfrom BranchPredictor import * 362SN/A 376216Snate@binkert.orgclass BaseSimpleCPU(BaseCPU): 388706Sandreas.hansson@arm.com type = 'BaseSimpleCPU' 392SN/A abstract = True 402680SN/A cxx_header = "cpu/simple/base.hh" 412SN/A 423535SN/A def addCheckerCpu(self): 432SN/A if buildEnv['TARGET_ISA'] in ['arm']: 442SN/A from ArmTLB import ArmTLB 452680SN/A 462SN/A self.checker = DummyChecker(workload = self.workload) 477707Sgblack@eecs.umich.edu self.checker.itb = ArmTLB(size = self.itb.size) 482SN/A self.checker.dtb = ArmTLB(size = self.dtb.size) 492SN/A else: 5010468Sandreas.hansson@arm.com print("ERROR: Checker only supported under ARM ISA!") 512SN/A exit(1) 522SN/A 532SN/A branchPred = Param.BranchPredictor(NULL, "Branch Predictor") 542SN/A