ltage.hh revision 13454:19a5b4fb1f1f 
1/*
2 * Copyright (c) 2014 The University of Wisconsin
3 *
4 * Copyright (c) 2006 INRIA (Institut National de Recherche en
5 * Informatique et en Automatique  / French National Research Institute
6 * for Computer Science and Applied Mathematics)
7 *
8 * All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions are
12 * met: redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer;
14 * redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution;
17 * neither the name of the copyright holders nor the names of its
18 * contributors may be used to endorse or promote products derived from
19 * this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 * Authors: Vignyan Reddy, Dibakar Gope and Arthur Perais,
34 * from André Seznec's code.
35 */
36
37/* @file
38 * Implementation of a L-TAGE branch predictor. TAGE is a global-history based
39 * branch predictor. It features a PC-indexed bimodal predictor and N
40 * partially tagged tables, indexed with a hash of the PC and the global
41 * branch history. The different lengths of global branch history used to
42 * index the partially tagged tables grow geometrically. A small path history
43 * is also used in the hash. L-TAGE also features a loop predictor that records
44 * iteration count of loops and predicts accordingly.
45 *
46 * All TAGE tables are accessed in parallel, and the one using the longest
47 * history that matches provides the prediction (some exceptions apply).
48 * Entries are allocated in components using a longer history than the
49 * one that predicted when the prediction is incorrect.
50 */
51
52#ifndef __CPU_PRED_LTAGE
53#define __CPU_PRED_LTAGE
54
55
56#include <vector>
57
58#include "base/types.hh"
59#include "cpu/pred/tage.hh"
60#include "params/LTAGE.hh"
61
62class LTAGE: public TAGE
63{
64  public:
65    LTAGE(const LTAGEParams *params);
66
67    // Base class methods.
68    void squash(ThreadID tid, void *bp_history) override;
69
70  private:
71    // Prediction Structures
72    // Loop Predictor Entry
73    struct LoopEntry
74    {
75        uint16_t numIter;
76        uint16_t currentIter;
77        uint16_t currentIterSpec;
78        uint8_t confidence;
79        uint16_t tag;
80        uint8_t age;
81        bool dir;
82
83        LoopEntry() : numIter(0), currentIter(0), currentIterSpec(0),
84                      confidence(0), tag(0), age(0), dir(0) { }
85    };
86
87    // Primary branch history entry
88    struct LTageBranchInfo : public TageBranchInfo
89    {
90        uint16_t loopTag;
91        uint16_t currentIter;
92
93        bool loopPred;
94        bool loopPredValid;
95        int  loopIndex;
96        int loopHit;
97
98        LTageBranchInfo(int sz)
99            : TageBranchInfo(sz),
100              loopTag(0), currentIter(0),
101              loopPred(false),
102              loopPredValid(false), loopIndex(0), loopHit(0)
103        {}
104    };
105
106    /**
107     * Computes the index used to access the
108     * loop predictor.
109     * @param pc_in The unshifted branch PC.
110     */
111    int lindex(Addr pc_in) const;
112
113    /**
114     * Get a branch prediction from the loop
115     * predictor.
116     * @param pc The unshifted branch PC.
117     * @param bi Pointer to information on the
118     * prediction.
119     */
120    bool getLoop(Addr pc, LTageBranchInfo* bi) const;
121
122   /**
123    * Updates the loop predictor.
124    * @param pc The unshifted branch PC.
125    * @param taken The actual branch outcome.
126    * @param bi Pointer to information on the
127    * prediction recorded at prediction time.
128    */
129    void loopUpdate(Addr pc, bool Taken, LTageBranchInfo* bi);
130
131    /**
132     * Speculatively updates the loop predictor
133     * iteration count.
134     * @param pc The unshifted branch PC.
135     * @param taken The predicted branch outcome.
136     * @param bi Pointer to information on the prediction
137     * recorded at prediction time.
138     */
139    void specLoopUpdate(Addr pc, bool taken, LTageBranchInfo* bi);
140
141    /**
142     * Update LTAGE for conditional branches.
143     * @param branch_pc The unshifted branch PC.
144     * @param taken Actual branch outcome.
145     * @param bi Pointer to information on the prediction
146     * recorded at prediction time.
147     * @nrand Random int number from 0 to 3
148     */
149    void condBranchUpdate(
150        Addr branch_pc, bool taken, TageBranchInfo* bi, int nrand) override;
151
152    /**
153     * Get a branch prediction from LTAGE. *NOT* an override of
154     * BpredUnit::predict().
155     * @param tid The thread ID to select the global
156     * histories to use.
157     * @param branch_pc The unshifted branch PC.
158     * @param cond_branch True if the branch is conditional.
159     * @param b Reference to wrapping pointer to allow storing
160     * derived class prediction information in the base class.
161     */
162    bool predict(
163        ThreadID tid, Addr branch_pc, bool cond_branch, void* &b) override;
164
165    /**
166     * Restores speculatively updated path and direction histories.
167     * Also recomputes compressed (folded) histories based on the
168     * correct branch outcome.
169     * This version of squash() is called once on a branch misprediction.
170     * @param tid The Thread ID to select the histories to rollback.
171     * @param taken The correct branch outcome.
172     * @param bp_history Wrapping pointer to TageBranchInfo (to allow
173     * storing derived class prediction information in the
174     * base class).
175     * @post bp_history points to valid memory.
176     */
177    void squash(
178        ThreadID tid, bool taken, void *bp_history) override;
179
180    const unsigned logSizeLoopPred;
181    const unsigned loopTableAgeBits;
182    const unsigned loopTableConfidenceBits;
183    const unsigned loopTableTagBits;
184    const unsigned loopTableIterBits;
185    const unsigned logLoopTableAssoc;
186    const uint8_t confidenceThreshold;
187    const uint16_t loopTagMask;
188    const uint16_t loopNumIterMask;
189
190    LoopEntry *ltable;
191
192    int8_t loopUseCounter;
193    unsigned withLoopBits;
194};
195
196#endif // __CPU_PRED_LTAGE
197