ltage.hh revision 13454
111784Sarthur.perais@inria.fr/* 211784Sarthur.perais@inria.fr * Copyright (c) 2014 The University of Wisconsin 311784Sarthur.perais@inria.fr * 411784Sarthur.perais@inria.fr * Copyright (c) 2006 INRIA (Institut National de Recherche en 511784Sarthur.perais@inria.fr * Informatique et en Automatique / French National Research Institute 611784Sarthur.perais@inria.fr * for Computer Science and Applied Mathematics) 711784Sarthur.perais@inria.fr * 811784Sarthur.perais@inria.fr * All rights reserved. 911784Sarthur.perais@inria.fr * 1011784Sarthur.perais@inria.fr * Redistribution and use in source and binary forms, with or without 1111784Sarthur.perais@inria.fr * modification, are permitted provided that the following conditions are 1211784Sarthur.perais@inria.fr * met: redistributions of source code must retain the above copyright 1311784Sarthur.perais@inria.fr * notice, this list of conditions and the following disclaimer; 1411784Sarthur.perais@inria.fr * redistributions in binary form must reproduce the above copyright 1511784Sarthur.perais@inria.fr * notice, this list of conditions and the following disclaimer in the 1611784Sarthur.perais@inria.fr * documentation and/or other materials provided with the distribution; 1711784Sarthur.perais@inria.fr * neither the name of the copyright holders nor the names of its 1811784Sarthur.perais@inria.fr * contributors may be used to endorse or promote products derived from 1911784Sarthur.perais@inria.fr * this software without specific prior written permission. 2011784Sarthur.perais@inria.fr * 2111784Sarthur.perais@inria.fr * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2211784Sarthur.perais@inria.fr * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2311784Sarthur.perais@inria.fr * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2411784Sarthur.perais@inria.fr * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2511784Sarthur.perais@inria.fr * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2611784Sarthur.perais@inria.fr * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2711784Sarthur.perais@inria.fr * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2811784Sarthur.perais@inria.fr * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2911784Sarthur.perais@inria.fr * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3011784Sarthur.perais@inria.fr * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3111784Sarthur.perais@inria.fr * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3211784Sarthur.perais@inria.fr * 3311784Sarthur.perais@inria.fr * Authors: Vignyan Reddy, Dibakar Gope and Arthur Perais, 3411784Sarthur.perais@inria.fr * from André Seznec's code. 3511784Sarthur.perais@inria.fr */ 3611784Sarthur.perais@inria.fr 3711784Sarthur.perais@inria.fr/* @file 3811784Sarthur.perais@inria.fr * Implementation of a L-TAGE branch predictor. TAGE is a global-history based 3911784Sarthur.perais@inria.fr * branch predictor. It features a PC-indexed bimodal predictor and N 4011784Sarthur.perais@inria.fr * partially tagged tables, indexed with a hash of the PC and the global 4111784Sarthur.perais@inria.fr * branch history. The different lengths of global branch history used to 4211784Sarthur.perais@inria.fr * index the partially tagged tables grow geometrically. A small path history 4311784Sarthur.perais@inria.fr * is also used in the hash. L-TAGE also features a loop predictor that records 4411784Sarthur.perais@inria.fr * iteration count of loops and predicts accordingly. 4511784Sarthur.perais@inria.fr * 4611784Sarthur.perais@inria.fr * All TAGE tables are accessed in parallel, and the one using the longest 4711784Sarthur.perais@inria.fr * history that matches provides the prediction (some exceptions apply). 4811784Sarthur.perais@inria.fr * Entries are allocated in components using a longer history than the 4911784Sarthur.perais@inria.fr * one that predicted when the prediction is incorrect. 5011784Sarthur.perais@inria.fr */ 5111784Sarthur.perais@inria.fr 5211784Sarthur.perais@inria.fr#ifndef __CPU_PRED_LTAGE 5311784Sarthur.perais@inria.fr#define __CPU_PRED_LTAGE 5411784Sarthur.perais@inria.fr 5513454Spau.cabre@metempsy.com 5611784Sarthur.perais@inria.fr#include <vector> 5711784Sarthur.perais@inria.fr 5811784Sarthur.perais@inria.fr#include "base/types.hh" 5913454Spau.cabre@metempsy.com#include "cpu/pred/tage.hh" 6011784Sarthur.perais@inria.fr#include "params/LTAGE.hh" 6111784Sarthur.perais@inria.fr 6213454Spau.cabre@metempsy.comclass LTAGE: public TAGE 6311784Sarthur.perais@inria.fr{ 6411784Sarthur.perais@inria.fr public: 6511784Sarthur.perais@inria.fr LTAGE(const LTAGEParams *params); 6611784Sarthur.perais@inria.fr 6711784Sarthur.perais@inria.fr // Base class methods. 6811784Sarthur.perais@inria.fr void squash(ThreadID tid, void *bp_history) override; 6911784Sarthur.perais@inria.fr 7011784Sarthur.perais@inria.fr private: 7111784Sarthur.perais@inria.fr // Prediction Structures 7211784Sarthur.perais@inria.fr // Loop Predictor Entry 7311784Sarthur.perais@inria.fr struct LoopEntry 7411784Sarthur.perais@inria.fr { 7511784Sarthur.perais@inria.fr uint16_t numIter; 7611784Sarthur.perais@inria.fr uint16_t currentIter; 7711784Sarthur.perais@inria.fr uint16_t currentIterSpec; 7811784Sarthur.perais@inria.fr uint8_t confidence; 7911784Sarthur.perais@inria.fr uint16_t tag; 8011784Sarthur.perais@inria.fr uint8_t age; 8111784Sarthur.perais@inria.fr bool dir; 8211784Sarthur.perais@inria.fr 8311784Sarthur.perais@inria.fr LoopEntry() : numIter(0), currentIter(0), currentIterSpec(0), 8411784Sarthur.perais@inria.fr confidence(0), tag(0), age(0), dir(0) { } 8511784Sarthur.perais@inria.fr }; 8611784Sarthur.perais@inria.fr 8713454Spau.cabre@metempsy.com // Primary branch history entry 8813454Spau.cabre@metempsy.com struct LTageBranchInfo : public TageBranchInfo 8911784Sarthur.perais@inria.fr { 9013442Spau.cabre@metempsy.com uint16_t loopTag; 9111784Sarthur.perais@inria.fr uint16_t currentIter; 9211784Sarthur.perais@inria.fr 9311784Sarthur.perais@inria.fr bool loopPred; 9411784Sarthur.perais@inria.fr bool loopPredValid; 9511784Sarthur.perais@inria.fr int loopIndex; 9611784Sarthur.perais@inria.fr int loopHit; 9711784Sarthur.perais@inria.fr 9813454Spau.cabre@metempsy.com LTageBranchInfo(int sz) 9913454Spau.cabre@metempsy.com : TageBranchInfo(sz), 10013454Spau.cabre@metempsy.com loopTag(0), currentIter(0), 10113454Spau.cabre@metempsy.com loopPred(false), 10213454Spau.cabre@metempsy.com loopPredValid(false), loopIndex(0), loopHit(0) 10313454Spau.cabre@metempsy.com {} 10411784Sarthur.perais@inria.fr }; 10511784Sarthur.perais@inria.fr 10611784Sarthur.perais@inria.fr /** 10711784Sarthur.perais@inria.fr * Computes the index used to access the 10811784Sarthur.perais@inria.fr * loop predictor. 10911784Sarthur.perais@inria.fr * @param pc_in The unshifted branch PC. 11011784Sarthur.perais@inria.fr */ 11111784Sarthur.perais@inria.fr int lindex(Addr pc_in) const; 11211784Sarthur.perais@inria.fr 11311784Sarthur.perais@inria.fr /** 11411784Sarthur.perais@inria.fr * Get a branch prediction from the loop 11511784Sarthur.perais@inria.fr * predictor. 11611784Sarthur.perais@inria.fr * @param pc The unshifted branch PC. 11711784Sarthur.perais@inria.fr * @param bi Pointer to information on the 11811784Sarthur.perais@inria.fr * prediction. 11911784Sarthur.perais@inria.fr */ 12013454Spau.cabre@metempsy.com bool getLoop(Addr pc, LTageBranchInfo* bi) const; 12111784Sarthur.perais@inria.fr 12211784Sarthur.perais@inria.fr /** 12311784Sarthur.perais@inria.fr * Updates the loop predictor. 12411784Sarthur.perais@inria.fr * @param pc The unshifted branch PC. 12511784Sarthur.perais@inria.fr * @param taken The actual branch outcome. 12611784Sarthur.perais@inria.fr * @param bi Pointer to information on the 12711784Sarthur.perais@inria.fr * prediction recorded at prediction time. 12811784Sarthur.perais@inria.fr */ 12913454Spau.cabre@metempsy.com void loopUpdate(Addr pc, bool Taken, LTageBranchInfo* bi); 13011784Sarthur.perais@inria.fr 13111784Sarthur.perais@inria.fr /** 13211784Sarthur.perais@inria.fr * Speculatively updates the loop predictor 13311784Sarthur.perais@inria.fr * iteration count. 13411784Sarthur.perais@inria.fr * @param pc The unshifted branch PC. 13511784Sarthur.perais@inria.fr * @param taken The predicted branch outcome. 13611784Sarthur.perais@inria.fr * @param bi Pointer to information on the prediction 13711784Sarthur.perais@inria.fr * recorded at prediction time. 13811784Sarthur.perais@inria.fr */ 13913454Spau.cabre@metempsy.com void specLoopUpdate(Addr pc, bool taken, LTageBranchInfo* bi); 14011784Sarthur.perais@inria.fr 14113454Spau.cabre@metempsy.com /** 14213454Spau.cabre@metempsy.com * Update LTAGE for conditional branches. 14313454Spau.cabre@metempsy.com * @param branch_pc The unshifted branch PC. 14413454Spau.cabre@metempsy.com * @param taken Actual branch outcome. 14513454Spau.cabre@metempsy.com * @param bi Pointer to information on the prediction 14613454Spau.cabre@metempsy.com * recorded at prediction time. 14713454Spau.cabre@metempsy.com * @nrand Random int number from 0 to 3 14813454Spau.cabre@metempsy.com */ 14913454Spau.cabre@metempsy.com void condBranchUpdate( 15013454Spau.cabre@metempsy.com Addr branch_pc, bool taken, TageBranchInfo* bi, int nrand) override; 15113454Spau.cabre@metempsy.com 15213454Spau.cabre@metempsy.com /** 15313454Spau.cabre@metempsy.com * Get a branch prediction from LTAGE. *NOT* an override of 15413454Spau.cabre@metempsy.com * BpredUnit::predict(). 15513454Spau.cabre@metempsy.com * @param tid The thread ID to select the global 15613454Spau.cabre@metempsy.com * histories to use. 15713454Spau.cabre@metempsy.com * @param branch_pc The unshifted branch PC. 15813454Spau.cabre@metempsy.com * @param cond_branch True if the branch is conditional. 15913454Spau.cabre@metempsy.com * @param b Reference to wrapping pointer to allow storing 16013454Spau.cabre@metempsy.com * derived class prediction information in the base class. 16113454Spau.cabre@metempsy.com */ 16213454Spau.cabre@metempsy.com bool predict( 16313454Spau.cabre@metempsy.com ThreadID tid, Addr branch_pc, bool cond_branch, void* &b) override; 16413454Spau.cabre@metempsy.com 16513454Spau.cabre@metempsy.com /** 16613454Spau.cabre@metempsy.com * Restores speculatively updated path and direction histories. 16713454Spau.cabre@metempsy.com * Also recomputes compressed (folded) histories based on the 16813454Spau.cabre@metempsy.com * correct branch outcome. 16913454Spau.cabre@metempsy.com * This version of squash() is called once on a branch misprediction. 17013454Spau.cabre@metempsy.com * @param tid The Thread ID to select the histories to rollback. 17113454Spau.cabre@metempsy.com * @param taken The correct branch outcome. 17213454Spau.cabre@metempsy.com * @param bp_history Wrapping pointer to TageBranchInfo (to allow 17313454Spau.cabre@metempsy.com * storing derived class prediction information in the 17413454Spau.cabre@metempsy.com * base class). 17513454Spau.cabre@metempsy.com * @post bp_history points to valid memory. 17613454Spau.cabre@metempsy.com */ 17713454Spau.cabre@metempsy.com void squash( 17813454Spau.cabre@metempsy.com ThreadID tid, bool taken, void *bp_history) override; 17913454Spau.cabre@metempsy.com 18011784Sarthur.perais@inria.fr const unsigned logSizeLoopPred; 18113442Spau.cabre@metempsy.com const unsigned loopTableAgeBits; 18213442Spau.cabre@metempsy.com const unsigned loopTableConfidenceBits; 18313442Spau.cabre@metempsy.com const unsigned loopTableTagBits; 18413442Spau.cabre@metempsy.com const unsigned loopTableIterBits; 18513444Spau.cabre@metempsy.com const unsigned logLoopTableAssoc; 18613442Spau.cabre@metempsy.com const uint8_t confidenceThreshold; 18713442Spau.cabre@metempsy.com const uint16_t loopTagMask; 18813442Spau.cabre@metempsy.com const uint16_t loopNumIterMask; 18911784Sarthur.perais@inria.fr 19011784Sarthur.perais@inria.fr LoopEntry *ltable; 19111784Sarthur.perais@inria.fr 19211784Sarthur.perais@inria.fr int8_t loopUseCounter; 19313444Spau.cabre@metempsy.com unsigned withLoopBits; 19411784Sarthur.perais@inria.fr}; 19511784Sarthur.perais@inria.fr 19611784Sarthur.perais@inria.fr#endif // __CPU_PRED_LTAGE 197