indirect.hh revision 11426:fb9d14204674 
110860Sandreas.sandberg@arm.com/*
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2710860Sandreas.sandberg@arm.com *
2810860Sandreas.sandberg@arm.com * Authors: Mitch Hayenga
2910860Sandreas.sandberg@arm.com */
3010860Sandreas.sandberg@arm.com
3110860Sandreas.sandberg@arm.com#ifndef __CPU_PRED_INDIRECT_HH__
3210860Sandreas.sandberg@arm.com#define __CPU_PRED_INDIRECT_HH__
3310860Sandreas.sandberg@arm.com
3410860Sandreas.sandberg@arm.com#include <deque>
3510860Sandreas.sandberg@arm.com
3610860Sandreas.sandberg@arm.com#include "arch/isa_traits.hh"
3710860Sandreas.sandberg@arm.com#include "config/the_isa.hh"
3810860Sandreas.sandberg@arm.com#include "cpu/inst_seq.hh"
3910860Sandreas.sandberg@arm.com
4010860Sandreas.sandberg@arm.comclass IndirectPredictor
4110860Sandreas.sandberg@arm.com{
4210860Sandreas.sandberg@arm.com  public:
4310860Sandreas.sandberg@arm.com    IndirectPredictor(bool hash_ghr, bool hash_targets,
4410860Sandreas.sandberg@arm.com                      unsigned num_sets, unsigned num_ways,
45                      unsigned tag_bits, unsigned path_len,
46                      unsigned inst_shift, unsigned num_threads);
47    bool lookup(Addr br_addr, unsigned ghr, TheISA::PCState& br_target,
48                ThreadID tid);
49    void recordIndirect(Addr br_addr, Addr tgt_addr, InstSeqNum seq_num,
50                        ThreadID tid);
51    void commit(InstSeqNum seq_num, ThreadID tid);
52    void squash(InstSeqNum seq_num, ThreadID tid);
53    void recordTarget(InstSeqNum seq_num, unsigned ghr,
54                      const TheISA::PCState& target, ThreadID tid);
55
56  private:
57    const bool hashGHR;
58    const bool hashTargets;
59    const unsigned numSets;
60    const unsigned numWays;
61    const unsigned tagBits;
62    const unsigned pathLength;
63    const unsigned instShift;
64
65    struct IPredEntry
66    {
67        IPredEntry() : tag(0), target(0) { }
68        Addr tag;
69        TheISA::PCState target;
70    };
71
72    std::vector<std::vector<IPredEntry> > targetCache;
73
74    Addr getSetIndex(Addr br_addr, unsigned ghr, ThreadID tid);
75    Addr getTag(Addr br_addr);
76
77    struct HistoryEntry
78    {
79        HistoryEntry(Addr br_addr, Addr tgt_addr, InstSeqNum seq_num)
80            : pcAddr(br_addr), targetAddr(tgt_addr), seqNum(seq_num) { }
81        Addr pcAddr;
82        Addr targetAddr;
83        InstSeqNum seqNum;
84    };
85
86
87    struct ThreadInfo {
88        ThreadInfo() : headHistEntry(0) { }
89
90        std::deque<HistoryEntry> pathHist;
91        unsigned headHistEntry;
92    };
93
94    std::vector<ThreadInfo> threadInfo;
95};
96
97#endif // __CPU_PRED_INDIRECT_HH__
98