btb.hh revision 2130
172SN/A/*
21762SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan
372SN/A * All rights reserved.
472SN/A *
572SN/A * Redistribution and use in source and binary forms, with or without
672SN/A * modification, are permitted provided that the following conditions are
772SN/A * met: redistributions of source code must retain the above copyright
872SN/A * notice, this list of conditions and the following disclaimer;
972SN/A * redistributions in binary form must reproduce the above copyright
1072SN/A * notice, this list of conditions and the following disclaimer in the
1172SN/A * documentation and/or other materials provided with the distribution;
1272SN/A * neither the name of the copyright holders nor the names of its
1372SN/A * contributors may be used to endorse or promote products derived from
1472SN/A * this software without specific prior written permission.
1572SN/A *
1672SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
1772SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
1872SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
1972SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
2072SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
2172SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
2272SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2372SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2472SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2572SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
2672SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu */
282665Ssaidi@eecs.umich.edu
2972SN/A#ifndef __CPU_O3_CPU_BTB_HH__
3072SN/A#define __CPU_O3_CPU_BTB_HH__
312SN/A
328332Snate@binkert.org// For Addr type.
338332Snate@binkert.org#include "arch/isa_traits.hh"
342SN/A
352SN/Aclass DefaultBTB
362SN/A{
372SN/A  private:
382SN/A    struct BTBEntry
392SN/A    {
402SN/A        BTBEntry()
415543Ssaidi@eecs.umich.edu            : tag(0), target(0), valid(false)
425543Ssaidi@eecs.umich.edu        {
432SN/A        }
442SN/A
452SN/A        Addr tag;
462SN/A        Addr target;
472SN/A        bool valid;
482SN/A    };
492SN/A
502SN/A  public:
512SN/A    DefaultBTB(unsigned numEntries, unsigned tagBits,
522SN/A               unsigned instShiftAmt);
532SN/A
545543Ssaidi@eecs.umich.edu    Addr lookup(const Addr &inst_PC);
555543Ssaidi@eecs.umich.edu
562SN/A    bool valid(const Addr &inst_PC);
572SN/A
582SN/A    void update(const Addr &inst_PC, const Addr &target_PC);
592SN/A
602SN/A  private:
612SN/A    inline unsigned getIndex(const Addr &inst_PC);
622SN/A
632SN/A    inline Addr getTag(const Addr &inst_PC);
642SN/A
652SN/A    BTBEntry *btb;
662SN/A
672SN/A    unsigned numEntries;
682SN/A
692SN/A    unsigned idxMask;
702SN/A
712SN/A    unsigned tagBits;
725543Ssaidi@eecs.umich.edu
732SN/A    unsigned tagMask;
742SN/A
752SN/A    unsigned instShiftAmt;
762SN/A
772SN/A    unsigned tagShiftAmt;
782SN/A};
792SN/A
802SN/A#endif // __CPU_O3_CPU_BTB_HH__
812SN/A