thread_context.hh revision 9023
14483Sgblack@eecs.umich.edu/* 24483Sgblack@eecs.umich.edu * Copyright (c) 2011 ARM Limited 34483Sgblack@eecs.umich.edu * All rights reserved 44483Sgblack@eecs.umich.edu * 54483Sgblack@eecs.umich.edu * The license below extends only to copyright in the software and shall 64483Sgblack@eecs.umich.edu * not be construed as granting a license to any other intellectual 74483Sgblack@eecs.umich.edu * property including but not limited to intellectual property relating 84483Sgblack@eecs.umich.edu * to a hardware implementation of the functionality of the software 94483Sgblack@eecs.umich.edu * licensed hereunder. You may use the software subject to the license 104483Sgblack@eecs.umich.edu * terms below provided that you ensure that this notice is replicated 114483Sgblack@eecs.umich.edu * unmodified and in its entirety in all distributions of the software, 124483Sgblack@eecs.umich.edu * modified or unmodified, in source code or in binary form. 134483Sgblack@eecs.umich.edu * 144483Sgblack@eecs.umich.edu * Copyright (c) 2004-2006 The Regents of The University of Michigan 154483Sgblack@eecs.umich.edu * All rights reserved. 164483Sgblack@eecs.umich.edu * 174483Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 184483Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 194483Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 204483Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 214483Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 224483Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 234483Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 244483Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 254483Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 264483Sgblack@eecs.umich.edu * this software without specific prior written permission. 274483Sgblack@eecs.umich.edu * 284483Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 294483Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 304483Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 314483Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 324483Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 334483Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 344483Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 354483Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 364483Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 374483Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 384483Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 394483Sgblack@eecs.umich.edu * 404483Sgblack@eecs.umich.edu * Authors: Kevin Lim 414483Sgblack@eecs.umich.edu */ 424483Sgblack@eecs.umich.edu 434483Sgblack@eecs.umich.edu#ifndef __CPU_O3_THREAD_CONTEXT_HH__ 444483Sgblack@eecs.umich.edu#define __CPU_O3_THREAD_CONTEXT_HH__ 454483Sgblack@eecs.umich.edu 464483Sgblack@eecs.umich.edu#include "config/the_isa.hh" 474483Sgblack@eecs.umich.edu#include "cpu/o3/isa_specific.hh" 484483Sgblack@eecs.umich.edu#include "cpu/thread_context.hh" 494483Sgblack@eecs.umich.edu 504483Sgblack@eecs.umich.educlass EndQuiesceEvent; 514483Sgblack@eecs.umich.edunamespace Kernel { 524483Sgblack@eecs.umich.edu class Statistics; 534483Sgblack@eecs.umich.edu} 544483Sgblack@eecs.umich.edu 554483Sgblack@eecs.umich.edu/** 564483Sgblack@eecs.umich.edu * Derived ThreadContext class for use with the O3CPU. It 574483Sgblack@eecs.umich.edu * provides the interface for any external objects to access a 584483Sgblack@eecs.umich.edu * single thread's state and some general CPU state. Any time 594483Sgblack@eecs.umich.edu * external objects try to update state through this interface, 604483Sgblack@eecs.umich.edu * the CPU will create an event to squash all in-flight 614483Sgblack@eecs.umich.edu * instructions in order to ensure state is maintained correctly. 624483Sgblack@eecs.umich.edu * It must be defined specifically for the O3CPU because 634483Sgblack@eecs.umich.edu * not all architectural state is located within the O3ThreadState 644483Sgblack@eecs.umich.edu * (such as the commit PC, and registers), and specific actions 654483Sgblack@eecs.umich.edu * must be taken when using this interface (such as squashing all 664483Sgblack@eecs.umich.edu * in-flight instructions when doing a write to this interface). 674483Sgblack@eecs.umich.edu */ 684483Sgblack@eecs.umich.edutemplate <class Impl> 694483Sgblack@eecs.umich.educlass O3ThreadContext : public ThreadContext 704483Sgblack@eecs.umich.edu{ 714483Sgblack@eecs.umich.edu public: 724483Sgblack@eecs.umich.edu typedef typename Impl::O3CPU O3CPU; 734483Sgblack@eecs.umich.edu 744483Sgblack@eecs.umich.edu /** Pointer to the CPU. */ 754483Sgblack@eecs.umich.edu O3CPU *cpu; 764483Sgblack@eecs.umich.edu 774483Sgblack@eecs.umich.edu /** Pointer to the thread state that this TC corrseponds to. */ 784483Sgblack@eecs.umich.edu O3ThreadState<Impl> *thread; 794483Sgblack@eecs.umich.edu 804483Sgblack@eecs.umich.edu /** Returns a pointer to the ITB. */ 814483Sgblack@eecs.umich.edu TheISA::TLB *getITBPtr() { return cpu->itb; } 824483Sgblack@eecs.umich.edu 834483Sgblack@eecs.umich.edu /** Returns a pointer to the DTB. */ 844483Sgblack@eecs.umich.edu TheISA::TLB *getDTBPtr() { return cpu->dtb; } 854483Sgblack@eecs.umich.edu 864483Sgblack@eecs.umich.edu CheckerCPU *getCheckerCpuPtr() { return NULL; } 874483Sgblack@eecs.umich.edu 884483Sgblack@eecs.umich.edu TheISA::Decoder * 894483Sgblack@eecs.umich.edu getDecoderPtr() 904483Sgblack@eecs.umich.edu { 914483Sgblack@eecs.umich.edu return cpu->fetch.decoder[thread->threadId()]; 924483Sgblack@eecs.umich.edu } 934483Sgblack@eecs.umich.edu 944503Sgblack@eecs.umich.edu /** Returns a pointer to this CPU. */ 954483Sgblack@eecs.umich.edu virtual BaseCPU *getCpuPtr() { return cpu; } 964483Sgblack@eecs.umich.edu 974483Sgblack@eecs.umich.edu /** Reads this CPU's ID. */ 984483Sgblack@eecs.umich.edu virtual int cpuId() { return cpu->cpuId(); } 994483Sgblack@eecs.umich.edu 1004483Sgblack@eecs.umich.edu virtual int contextId() { return thread->contextId(); } 1014483Sgblack@eecs.umich.edu 1024483Sgblack@eecs.umich.edu virtual void setContextId(int id) { thread->setContextId(id); } 1034483Sgblack@eecs.umich.edu 1044483Sgblack@eecs.umich.edu /** Returns this thread's ID number. */ 1054483Sgblack@eecs.umich.edu virtual int threadId() { return thread->threadId(); } 1064483Sgblack@eecs.umich.edu virtual void setThreadId(int id) { return thread->setThreadId(id); } 1074483Sgblack@eecs.umich.edu 1084483Sgblack@eecs.umich.edu /** Returns a pointer to the system. */ 1094483Sgblack@eecs.umich.edu virtual System *getSystemPtr() { return cpu->system; } 1104483Sgblack@eecs.umich.edu 1114483Sgblack@eecs.umich.edu /** Returns a pointer to this thread's kernel statistics. */ 1124483Sgblack@eecs.umich.edu virtual TheISA::Kernel::Statistics *getKernelStats() 1134483Sgblack@eecs.umich.edu { return thread->kernelStats; } 1144483Sgblack@eecs.umich.edu 1154483Sgblack@eecs.umich.edu /** Returns a pointer to this thread's process. */ 1164483Sgblack@eecs.umich.edu virtual Process *getProcessPtr() { return thread->getProcessPtr(); } 1174483Sgblack@eecs.umich.edu 1184483Sgblack@eecs.umich.edu virtual PortProxy &getPhysProxy() { return thread->getPhysProxy(); } 1194483Sgblack@eecs.umich.edu 1204483Sgblack@eecs.umich.edu virtual FSTranslatingPortProxy &getVirtProxy(); 1214483Sgblack@eecs.umich.edu 1224483Sgblack@eecs.umich.edu virtual void initMemProxies(ThreadContext *tc) 1234483Sgblack@eecs.umich.edu { thread->initMemProxies(tc); } 1244483Sgblack@eecs.umich.edu 1254483Sgblack@eecs.umich.edu virtual SETranslatingPortProxy &getMemProxy() 1264483Sgblack@eecs.umich.edu { return thread->getMemProxy(); } 1274483Sgblack@eecs.umich.edu 1284483Sgblack@eecs.umich.edu /** Returns this thread's status. */ 1294483Sgblack@eecs.umich.edu virtual Status status() const { return thread->status(); } 1304483Sgblack@eecs.umich.edu 1314483Sgblack@eecs.umich.edu /** Sets this thread's status. */ 1324483Sgblack@eecs.umich.edu virtual void setStatus(Status new_status) 1334483Sgblack@eecs.umich.edu { thread->setStatus(new_status); } 1344483Sgblack@eecs.umich.edu 1354483Sgblack@eecs.umich.edu /** Set the status to Active. Optional delay indicates number of 1364483Sgblack@eecs.umich.edu * cycles to wait before beginning execution. */ 1374483Sgblack@eecs.umich.edu virtual void activate(int delay = 1); 1384483Sgblack@eecs.umich.edu 1394503Sgblack@eecs.umich.edu /** Set the status to Suspended. */ 1404483Sgblack@eecs.umich.edu virtual void suspend(int delay = 0); 1414483Sgblack@eecs.umich.edu 1424483Sgblack@eecs.umich.edu /** Set the status to Halted. */ 1434483Sgblack@eecs.umich.edu virtual void halt(int delay = 0); 1444483Sgblack@eecs.umich.edu 1454483Sgblack@eecs.umich.edu /** Dumps the function profiling information. 1464483Sgblack@eecs.umich.edu * @todo: Implement. 1474483Sgblack@eecs.umich.edu */ 1484483Sgblack@eecs.umich.edu virtual void dumpFuncProfile(); 1494483Sgblack@eecs.umich.edu 1504483Sgblack@eecs.umich.edu /** Takes over execution of a thread from another CPU. */ 1514483Sgblack@eecs.umich.edu virtual void takeOverFrom(ThreadContext *old_context); 1524483Sgblack@eecs.umich.edu 1534483Sgblack@eecs.umich.edu /** Registers statistics associated with this TC. */ 1544483Sgblack@eecs.umich.edu virtual void regStats(const std::string &name); 1554483Sgblack@eecs.umich.edu 1564483Sgblack@eecs.umich.edu /** Serializes state. */ 1574483Sgblack@eecs.umich.edu virtual void serialize(std::ostream &os); 1584483Sgblack@eecs.umich.edu /** Unserializes state. */ 1594483Sgblack@eecs.umich.edu virtual void unserialize(Checkpoint *cp, const std::string §ion); 1604483Sgblack@eecs.umich.edu 1614483Sgblack@eecs.umich.edu /** Reads the last tick that this thread was activated on. */ 1624483Sgblack@eecs.umich.edu virtual Tick readLastActivate(); 1634483Sgblack@eecs.umich.edu /** Reads the last tick that this thread was suspended on. */ 1644483Sgblack@eecs.umich.edu virtual Tick readLastSuspend(); 1654483Sgblack@eecs.umich.edu 1664483Sgblack@eecs.umich.edu /** Clears the function profiling information. */ 1674483Sgblack@eecs.umich.edu virtual void profileClear(); 1684483Sgblack@eecs.umich.edu /** Samples the function profiling information. */ 1694483Sgblack@eecs.umich.edu virtual void profileSample(); 1704483Sgblack@eecs.umich.edu 1714483Sgblack@eecs.umich.edu /** Copies the architectural registers from another TC into this TC. */ 1724483Sgblack@eecs.umich.edu virtual void copyArchRegs(ThreadContext *tc); 1734483Sgblack@eecs.umich.edu 1744483Sgblack@eecs.umich.edu /** Resets all architectural registers to 0. */ 1754483Sgblack@eecs.umich.edu virtual void clearArchRegs(); 1764483Sgblack@eecs.umich.edu 1774483Sgblack@eecs.umich.edu /** Reads an integer register. */ 1784483Sgblack@eecs.umich.edu virtual uint64_t readIntReg(int reg_idx); 1794483Sgblack@eecs.umich.edu 1804483Sgblack@eecs.umich.edu virtual FloatReg readFloatReg(int reg_idx); 1814483Sgblack@eecs.umich.edu 1824483Sgblack@eecs.umich.edu virtual FloatRegBits readFloatRegBits(int reg_idx); 1834483Sgblack@eecs.umich.edu 1844483Sgblack@eecs.umich.edu /** Sets an integer register to a value. */ 1854483Sgblack@eecs.umich.edu virtual void setIntReg(int reg_idx, uint64_t val); 1864483Sgblack@eecs.umich.edu 1874483Sgblack@eecs.umich.edu virtual void setFloatReg(int reg_idx, FloatReg val); 1884483Sgblack@eecs.umich.edu 1894483Sgblack@eecs.umich.edu virtual void setFloatRegBits(int reg_idx, FloatRegBits val); 1904483Sgblack@eecs.umich.edu 1914483Sgblack@eecs.umich.edu /** Reads this thread's PC state. */ 1924502Sgblack@eecs.umich.edu virtual TheISA::PCState pcState() 1934502Sgblack@eecs.umich.edu { return cpu->pcState(thread->threadId()); } 1944502Sgblack@eecs.umich.edu 1954502Sgblack@eecs.umich.edu /** Sets this thread's PC state. */ 1964502Sgblack@eecs.umich.edu virtual void pcState(const TheISA::PCState &val); 1974502Sgblack@eecs.umich.edu 1984502Sgblack@eecs.umich.edu virtual void pcStateNoRecord(const TheISA::PCState &val); 1994502Sgblack@eecs.umich.edu 2004483Sgblack@eecs.umich.edu /** Reads this thread's PC. */ 2014483Sgblack@eecs.umich.edu virtual Addr instAddr() 2024483Sgblack@eecs.umich.edu { return cpu->instAddr(thread->threadId()); } 2034502Sgblack@eecs.umich.edu 2044483Sgblack@eecs.umich.edu /** Reads this thread's next PC. */ 2054483Sgblack@eecs.umich.edu virtual Addr nextInstAddr() 2064483Sgblack@eecs.umich.edu { return cpu->nextInstAddr(thread->threadId()); } 2074483Sgblack@eecs.umich.edu 2084483Sgblack@eecs.umich.edu /** Reads this thread's next PC. */ 2094483Sgblack@eecs.umich.edu virtual MicroPC microPC() 2104502Sgblack@eecs.umich.edu { return cpu->microPC(thread->threadId()); } 2114483Sgblack@eecs.umich.edu 2124483Sgblack@eecs.umich.edu /** Reads a miscellaneous register. */ 2134483Sgblack@eecs.umich.edu virtual MiscReg readMiscRegNoEffect(int misc_reg) 2144483Sgblack@eecs.umich.edu { return cpu->readMiscRegNoEffect(misc_reg, thread->threadId()); } 2154483Sgblack@eecs.umich.edu 2164502Sgblack@eecs.umich.edu /** Reads a misc. register, including any side-effects the 2174483Sgblack@eecs.umich.edu * read might have as defined by the architecture. */ 2184483Sgblack@eecs.umich.edu virtual MiscReg readMiscReg(int misc_reg) 2194483Sgblack@eecs.umich.edu { return cpu->readMiscReg(misc_reg, thread->threadId()); } 2204483Sgblack@eecs.umich.edu 2214483Sgblack@eecs.umich.edu /** Sets a misc. register. */ 2224483Sgblack@eecs.umich.edu virtual void setMiscRegNoEffect(int misc_reg, const MiscReg &val); 2234502Sgblack@eecs.umich.edu 2244483Sgblack@eecs.umich.edu /** Sets a misc. register, including any side-effects the 2254483Sgblack@eecs.umich.edu * write might have as defined by the architecture. */ 2264483Sgblack@eecs.umich.edu virtual void setMiscReg(int misc_reg, const MiscReg &val); 2274483Sgblack@eecs.umich.edu 2284483Sgblack@eecs.umich.edu virtual int flattenIntIndex(int reg); 2294502Sgblack@eecs.umich.edu virtual int flattenFloatIndex(int reg); 2304483Sgblack@eecs.umich.edu 2314483Sgblack@eecs.umich.edu /** Returns the number of consecutive store conditional failures. */ 2324483Sgblack@eecs.umich.edu // @todo: Figure out where these store cond failures should go. 2334483Sgblack@eecs.umich.edu virtual unsigned readStCondFailures() 2344483Sgblack@eecs.umich.edu { return thread->storeCondFailures; } 2354502Sgblack@eecs.umich.edu 2364483Sgblack@eecs.umich.edu /** Sets the number of consecutive store conditional failures. */ 2374483Sgblack@eecs.umich.edu virtual void setStCondFailures(unsigned sc_failures) 2384483Sgblack@eecs.umich.edu { thread->storeCondFailures = sc_failures; } 2394483Sgblack@eecs.umich.edu 2404483Sgblack@eecs.umich.edu // Only really makes sense for old CPU model. Lots of code 2414502Sgblack@eecs.umich.edu // outside the CPU still checks this function, so it will 2424483Sgblack@eecs.umich.edu // always return false to keep everything working. 2434483Sgblack@eecs.umich.edu /** Checks if the thread is misspeculating. Because it is 2444483Sgblack@eecs.umich.edu * very difficult to determine if the thread is 2454483Sgblack@eecs.umich.edu * misspeculating, this is set as false. */ 2464502Sgblack@eecs.umich.edu virtual bool misspeculating() { return false; } 2474483Sgblack@eecs.umich.edu 2484483Sgblack@eecs.umich.edu /** Executes a syscall in SE mode. */ 2494483Sgblack@eecs.umich.edu virtual void syscall(int64_t callnum) 2504483Sgblack@eecs.umich.edu { return cpu->syscall(callnum, thread->threadId()); } 2514483Sgblack@eecs.umich.edu 2524483Sgblack@eecs.umich.edu /** Reads the funcExeInst counter. */ 2534502Sgblack@eecs.umich.edu virtual Counter readFuncExeInst() { return thread->funcExeInst; } 2544483Sgblack@eecs.umich.edu 2554483Sgblack@eecs.umich.edu /** Returns pointer to the quiesce event. */ 2564483Sgblack@eecs.umich.edu virtual EndQuiesceEvent *getQuiesceEvent() 2574483Sgblack@eecs.umich.edu { 2584483Sgblack@eecs.umich.edu return this->thread->quiesceEvent; 2594502Sgblack@eecs.umich.edu } 2604483Sgblack@eecs.umich.edu 2614483Sgblack@eecs.umich.edu}; 2624483Sgblack@eecs.umich.edu 2634483Sgblack@eecs.umich.edu#endif 2644483Sgblack@eecs.umich.edu