store_set.hh revision 1062
16899SN/A#ifndef __STORE_SET_HH__
26899SN/A#define __STORE_SET_HH__
36899SN/A
46899SN/A#include <vector>
56899SN/A
66899SN/A#include "arch/alpha/isa_traits.hh"
76899SN/A#include "cpu/inst_seq.hh"
86899SN/A
96899SN/Aclass StoreSet
106899SN/A{
116899SN/A  public:
126899SN/A    typedef unsigned SSID;
136899SN/A
146899SN/A  public:
156899SN/A    StoreSet(int SSIT_size, int LFST_size);
166899SN/A
176899SN/A    void violation(Addr store_PC, Addr load_PC);
186899SN/A
196899SN/A    void insertLoad(Addr load_PC, InstSeqNum load_seq_num);
206899SN/A
216899SN/A    void insertStore(Addr store_PC, InstSeqNum store_seq_num);
226899SN/A
236899SN/A    InstSeqNum checkInst(Addr PC);
246899SN/A
256899SN/A    void issued(Addr issued_PC, InstSeqNum issued_seq_num, bool is_store);
266899SN/A
276899SN/A    void squash(InstSeqNum squashed_num);
286899SN/A
296899SN/A    void clear();
306899SN/A
316899SN/A  private:
326899SN/A    inline int calcIndex(Addr PC)
336899SN/A    { return (PC >> offset_bits) & index_mask; }
346899SN/A
356899SN/A    inline SSID calcSSID(Addr PC)
366899SN/A    { return ((PC ^ (PC >> 10)) % LFST_size); }
376899SN/A
389100SBrad.Beckmann@amd.com    SSID *SSIT;
396899SN/A
408928Sandreas.hansson@arm.com    std::vector<bool> validSSIT;
416899SN/A
426899SN/A    InstSeqNum *LFST;
436899SN/A
446899SN/A    std::vector<bool> validLFST;
456899SN/A
466899SN/A    int *SSCounters;
476899SN/A
486899SN/A    int SSIT_size;
498928Sandreas.hansson@arm.com
506899SN/A    int LFST_size;
517553SN/A
527553SN/A    int index_mask;
536899SN/A
546899SN/A    // HACK: Hardcoded for now.
557553SN/A    int offset_bits;
567553SN/A};
576899SN/A
586899SN/A#endif // __STORE_SET_HH__
597538SN/A