rob_impl.hh revision 13429
1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2004-2006 The Regents of The University of Michigan 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Kevin Lim 41 * Korey Sewell 42 */ 43 44#ifndef __CPU_O3_ROB_IMPL_HH__ 45#define __CPU_O3_ROB_IMPL_HH__ 46 47#include <list> 48 49#include "cpu/o3/rob.hh" 50#include "debug/Fetch.hh" 51#include "debug/ROB.hh" 52#include "params/DerivO3CPU.hh" 53 54using namespace std; 55 56template <class Impl> 57ROB<Impl>::ROB(O3CPU *_cpu, DerivO3CPUParams *params) 58 : cpu(_cpu), 59 numEntries(params->numROBEntries), 60 squashWidth(params->squashWidth), 61 numInstsInROB(0), 62 numThreads(params->numThreads) 63{ 64 std::string policy = params->smtROBPolicy; 65 66 //Convert string to lowercase 67 std::transform(policy.begin(), policy.end(), policy.begin(), 68 (int(*)(int)) tolower); 69 70 //Figure out rob policy 71 if (policy == "dynamic") { 72 robPolicy = Dynamic; 73 74 //Set Max Entries to Total ROB Capacity 75 for (ThreadID tid = 0; tid < numThreads; tid++) { 76 maxEntries[tid] = numEntries; 77 } 78 79 } else if (policy == "partitioned") { 80 robPolicy = Partitioned; 81 DPRINTF(Fetch, "ROB sharing policy set to Partitioned\n"); 82 83 //@todo:make work if part_amt doesnt divide evenly. 84 int part_amt = numEntries / numThreads; 85 86 //Divide ROB up evenly 87 for (ThreadID tid = 0; tid < numThreads; tid++) { 88 maxEntries[tid] = part_amt; 89 } 90 91 } else if (policy == "threshold") { 92 robPolicy = Threshold; 93 DPRINTF(Fetch, "ROB sharing policy set to Threshold\n"); 94 95 int threshold = params->smtROBThreshold;; 96 97 //Divide up by threshold amount 98 for (ThreadID tid = 0; tid < numThreads; tid++) { 99 maxEntries[tid] = threshold; 100 } 101 } else { 102 assert(0 && "Invalid ROB Sharing Policy.Options Are:{Dynamic," 103 "Partitioned, Threshold}"); 104 } 105 106 resetState(); 107} 108 109template <class Impl> 110void 111ROB<Impl>::resetState() 112{ 113 for (ThreadID tid = 0; tid < numThreads; tid++) { 114 doneSquashing[tid] = true; 115 threadEntries[tid] = 0; 116 squashIt[tid] = instList[tid].end(); 117 squashedSeqNum[tid] = 0; 118 } 119 numInstsInROB = 0; 120 121 // Initialize the "universal" ROB head & tail point to invalid 122 // pointers 123 head = instList[0].end(); 124 tail = instList[0].end(); 125} 126 127template <class Impl> 128std::string 129ROB<Impl>::name() const 130{ 131 return cpu->name() + ".rob"; 132} 133 134template <class Impl> 135void 136ROB<Impl>::setActiveThreads(list<ThreadID> *at_ptr) 137{ 138 DPRINTF(ROB, "Setting active threads list pointer.\n"); 139 activeThreads = at_ptr; 140} 141 142template <class Impl> 143void 144ROB<Impl>::drainSanityCheck() const 145{ 146 for (ThreadID tid = 0; tid < numThreads; tid++) 147 assert(instList[tid].empty()); 148 assert(isEmpty()); 149} 150 151template <class Impl> 152void 153ROB<Impl>::takeOverFrom() 154{ 155 resetState(); 156} 157 158template <class Impl> 159void 160ROB<Impl>::resetEntries() 161{ 162 if (robPolicy != Dynamic || numThreads > 1) { 163 int active_threads = activeThreads->size(); 164 165 list<ThreadID>::iterator threads = activeThreads->begin(); 166 list<ThreadID>::iterator end = activeThreads->end(); 167 168 while (threads != end) { 169 ThreadID tid = *threads++; 170 171 if (robPolicy == Partitioned) { 172 maxEntries[tid] = numEntries / active_threads; 173 } else if (robPolicy == Threshold && active_threads == 1) { 174 maxEntries[tid] = numEntries; 175 } 176 } 177 } 178} 179 180template <class Impl> 181int 182ROB<Impl>::entryAmount(ThreadID num_threads) 183{ 184 if (robPolicy == Partitioned) { 185 return numEntries / num_threads; 186 } else { 187 return 0; 188 } 189} 190 191template <class Impl> 192int 193ROB<Impl>::countInsts() 194{ 195 int total = 0; 196 197 for (ThreadID tid = 0; tid < numThreads; tid++) 198 total += countInsts(tid); 199 200 return total; 201} 202 203template <class Impl> 204int 205ROB<Impl>::countInsts(ThreadID tid) 206{ 207 return instList[tid].size(); 208} 209 210template <class Impl> 211void 212ROB<Impl>::insertInst(const DynInstPtr &inst) 213{ 214 assert(inst); 215 216 robWrites++; 217 218 DPRINTF(ROB, "Adding inst PC %s to the ROB.\n", inst->pcState()); 219 220 assert(numInstsInROB != numEntries); 221 222 ThreadID tid = inst->threadNumber; 223 224 instList[tid].push_back(inst); 225 226 //Set Up head iterator if this is the 1st instruction in the ROB 227 if (numInstsInROB == 0) { 228 head = instList[tid].begin(); 229 assert((*head) == inst); 230 } 231 232 //Must Decrement for iterator to actually be valid since __.end() 233 //actually points to 1 after the last inst 234 tail = instList[tid].end(); 235 tail--; 236 237 inst->setInROB(); 238 239 ++numInstsInROB; 240 ++threadEntries[tid]; 241 242 assert((*tail) == inst); 243 244 DPRINTF(ROB, "[tid:%i] Now has %d instructions.\n", tid, threadEntries[tid]); 245} 246 247template <class Impl> 248void 249ROB<Impl>::retireHead(ThreadID tid) 250{ 251 robWrites++; 252 253 assert(numInstsInROB > 0); 254 255 // Get the head ROB instruction by copying it and remove it from the list 256 InstIt head_it = instList[tid].begin(); 257 258 DynInstPtr head_inst = std::move(*head_it); 259 instList[tid].erase(head_it); 260 261 assert(head_inst->readyToCommit()); 262 263 DPRINTF(ROB, "[tid:%u]: Retiring head instruction, " 264 "instruction PC %s, [sn:%lli]\n", tid, head_inst->pcState(), 265 head_inst->seqNum); 266 267 --numInstsInROB; 268 --threadEntries[tid]; 269 270 head_inst->clearInROB(); 271 head_inst->setCommitted(); 272 273 //Update "Global" Head of ROB 274 updateHead(); 275 276 // @todo: A special case is needed if the instruction being 277 // retired is the only instruction in the ROB; otherwise the tail 278 // iterator will become invalidated. 279 cpu->removeFrontInst(head_inst); 280} 281 282template <class Impl> 283bool 284ROB<Impl>::isHeadReady(ThreadID tid) 285{ 286 robReads++; 287 if (threadEntries[tid] != 0) { 288 return instList[tid].front()->readyToCommit(); 289 } 290 291 return false; 292} 293 294template <class Impl> 295bool 296ROB<Impl>::canCommit() 297{ 298 //@todo: set ActiveThreads through ROB or CPU 299 list<ThreadID>::iterator threads = activeThreads->begin(); 300 list<ThreadID>::iterator end = activeThreads->end(); 301 302 while (threads != end) { 303 ThreadID tid = *threads++; 304 305 if (isHeadReady(tid)) { 306 return true; 307 } 308 } 309 310 return false; 311} 312 313template <class Impl> 314unsigned 315ROB<Impl>::numFreeEntries() 316{ 317 return numEntries - numInstsInROB; 318} 319 320template <class Impl> 321unsigned 322ROB<Impl>::numFreeEntries(ThreadID tid) 323{ 324 return maxEntries[tid] - threadEntries[tid]; 325} 326 327template <class Impl> 328void 329ROB<Impl>::doSquash(ThreadID tid) 330{ 331 robWrites++; 332 DPRINTF(ROB, "[tid:%u]: Squashing instructions until [sn:%i].\n", 333 tid, squashedSeqNum[tid]); 334 335 assert(squashIt[tid] != instList[tid].end()); 336 337 if ((*squashIt[tid])->seqNum < squashedSeqNum[tid]) { 338 DPRINTF(ROB, "[tid:%u]: Done squashing instructions.\n", 339 tid); 340 341 squashIt[tid] = instList[tid].end(); 342 343 doneSquashing[tid] = true; 344 return; 345 } 346 347 bool robTailUpdate = false; 348 349 for (int numSquashed = 0; 350 numSquashed < squashWidth && 351 squashIt[tid] != instList[tid].end() && 352 (*squashIt[tid])->seqNum > squashedSeqNum[tid]; 353 ++numSquashed) 354 { 355 DPRINTF(ROB, "[tid:%u]: Squashing instruction PC %s, seq num %i.\n", 356 (*squashIt[tid])->threadNumber, 357 (*squashIt[tid])->pcState(), 358 (*squashIt[tid])->seqNum); 359 360 // Mark the instruction as squashed, and ready to commit so that 361 // it can drain out of the pipeline. 362 (*squashIt[tid])->setSquashed(); 363 364 (*squashIt[tid])->setCanCommit(); 365 366 367 if (squashIt[tid] == instList[tid].begin()) { 368 DPRINTF(ROB, "Reached head of instruction list while " 369 "squashing.\n"); 370 371 squashIt[tid] = instList[tid].end(); 372 373 doneSquashing[tid] = true; 374 375 return; 376 } 377 378 InstIt tail_thread = instList[tid].end(); 379 tail_thread--; 380 381 if ((*squashIt[tid]) == (*tail_thread)) 382 robTailUpdate = true; 383 384 squashIt[tid]--; 385 } 386 387 388 // Check if ROB is done squashing. 389 if ((*squashIt[tid])->seqNum <= squashedSeqNum[tid]) { 390 DPRINTF(ROB, "[tid:%u]: Done squashing instructions.\n", 391 tid); 392 393 squashIt[tid] = instList[tid].end(); 394 395 doneSquashing[tid] = true; 396 } 397 398 if (robTailUpdate) { 399 updateTail(); 400 } 401} 402 403 404template <class Impl> 405void 406ROB<Impl>::updateHead() 407{ 408 InstSeqNum lowest_num = 0; 409 bool first_valid = true; 410 411 // @todo: set ActiveThreads through ROB or CPU 412 list<ThreadID>::iterator threads = activeThreads->begin(); 413 list<ThreadID>::iterator end = activeThreads->end(); 414 415 while (threads != end) { 416 ThreadID tid = *threads++; 417 418 if (instList[tid].empty()) 419 continue; 420 421 if (first_valid) { 422 head = instList[tid].begin(); 423 lowest_num = (*head)->seqNum; 424 first_valid = false; 425 continue; 426 } 427 428 InstIt head_thread = instList[tid].begin(); 429 430 DynInstPtr head_inst = (*head_thread); 431 432 assert(head_inst != 0); 433 434 if (head_inst->seqNum < lowest_num) { 435 head = head_thread; 436 lowest_num = head_inst->seqNum; 437 } 438 } 439 440 if (first_valid) { 441 head = instList[0].end(); 442 } 443 444} 445 446template <class Impl> 447void 448ROB<Impl>::updateTail() 449{ 450 tail = instList[0].end(); 451 bool first_valid = true; 452 453 list<ThreadID>::iterator threads = activeThreads->begin(); 454 list<ThreadID>::iterator end = activeThreads->end(); 455 456 while (threads != end) { 457 ThreadID tid = *threads++; 458 459 if (instList[tid].empty()) { 460 continue; 461 } 462 463 // If this is the first valid then assign w/out 464 // comparison 465 if (first_valid) { 466 tail = instList[tid].end(); 467 tail--; 468 first_valid = false; 469 continue; 470 } 471 472 // Assign new tail if this thread's tail is younger 473 // than our current "tail high" 474 InstIt tail_thread = instList[tid].end(); 475 tail_thread--; 476 477 if ((*tail_thread)->seqNum > (*tail)->seqNum) { 478 tail = tail_thread; 479 } 480 } 481} 482 483 484template <class Impl> 485void 486ROB<Impl>::squash(InstSeqNum squash_num, ThreadID tid) 487{ 488 if (isEmpty(tid)) { 489 DPRINTF(ROB, "Does not need to squash due to being empty " 490 "[sn:%i]\n", 491 squash_num); 492 493 return; 494 } 495 496 DPRINTF(ROB, "Starting to squash within the ROB.\n"); 497 498 robStatus[tid] = ROBSquashing; 499 500 doneSquashing[tid] = false; 501 502 squashedSeqNum[tid] = squash_num; 503 504 if (!instList[tid].empty()) { 505 InstIt tail_thread = instList[tid].end(); 506 tail_thread--; 507 508 squashIt[tid] = tail_thread; 509 510 doSquash(tid); 511 } 512} 513 514template <class Impl> 515const typename Impl::DynInstPtr& 516ROB<Impl>::readHeadInst(ThreadID tid) 517{ 518 if (threadEntries[tid] != 0) { 519 InstIt head_thread = instList[tid].begin(); 520 521 assert((*head_thread)->isInROB()); 522 523 return *head_thread; 524 } else { 525 return dummyInst; 526 } 527} 528 529template <class Impl> 530typename Impl::DynInstPtr 531ROB<Impl>::readTailInst(ThreadID tid) 532{ 533 InstIt tail_thread = instList[tid].end(); 534 tail_thread--; 535 536 return *tail_thread; 537} 538 539template <class Impl> 540void 541ROB<Impl>::regStats() 542{ 543 using namespace Stats; 544 robReads 545 .name(name() + ".rob_reads") 546 .desc("The number of ROB reads"); 547 548 robWrites 549 .name(name() + ".rob_writes") 550 .desc("The number of ROB writes"); 551} 552 553template <class Impl> 554typename Impl::DynInstPtr 555ROB<Impl>::findInst(ThreadID tid, InstSeqNum squash_inst) 556{ 557 for (InstIt it = instList[tid].begin(); it != instList[tid].end(); it++) { 558 if ((*it)->seqNum == squash_inst) { 559 return *it; 560 } 561 } 562 return NULL; 563} 564 565#endif//__CPU_O3_ROB_IMPL_HH__ 566