rob_impl.hh revision 8232
11689SN/A/* 22329SN/A * Copyright (c) 2004-2006 The Regents of The University of Michigan 31689SN/A * All rights reserved. 41689SN/A * 51689SN/A * Redistribution and use in source and binary forms, with or without 61689SN/A * modification, are permitted provided that the following conditions are 71689SN/A * met: redistributions of source code must retain the above copyright 81689SN/A * notice, this list of conditions and the following disclaimer; 91689SN/A * redistributions in binary form must reproduce the above copyright 101689SN/A * notice, this list of conditions and the following disclaimer in the 111689SN/A * documentation and/or other materials provided with the distribution; 121689SN/A * neither the name of the copyright holders nor the names of its 131689SN/A * contributors may be used to endorse or promote products derived from 141689SN/A * this software without specific prior written permission. 151689SN/A * 161689SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 171689SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 181689SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 191689SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 201689SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 211689SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 221689SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 231689SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 241689SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 251689SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 261689SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Kevin Lim 292831Sksewell@umich.edu * Korey Sewell 301689SN/A */ 311689SN/A 326221Snate@binkert.org#include <list> 336221Snate@binkert.org 341858SN/A#include "config/full_system.hh" 351717SN/A#include "cpu/o3/rob.hh" 368232Snate@binkert.org#include "debug/Fetch.hh" 378232Snate@binkert.org#include "debug/ROB.hh" 381060SN/A 396221Snate@binkert.orgusing namespace std; 402292SN/A 411061SN/Atemplate <class Impl> 424329Sktlim@umich.eduROB<Impl>::ROB(O3CPU *_cpu, unsigned _numEntries, unsigned _squashWidth, 432980Sgblack@eecs.umich.edu std::string _smtROBPolicy, unsigned _smtROBThreshold, 446221Snate@binkert.org ThreadID _numThreads) 454329Sktlim@umich.edu : cpu(_cpu), 464329Sktlim@umich.edu numEntries(_numEntries), 471060SN/A squashWidth(_squashWidth), 481060SN/A numInstsInROB(0), 492292SN/A numThreads(_numThreads) 501060SN/A{ 516221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; tid++) { 522877Sksewell@umich.edu squashedSeqNum[tid] = 0; 532292SN/A doneSquashing[tid] = true; 542292SN/A threadEntries[tid] = 0; 552292SN/A } 562292SN/A 572980Sgblack@eecs.umich.edu std::string policy = _smtROBPolicy; 582292SN/A 592292SN/A //Convert string to lowercase 602292SN/A std::transform(policy.begin(), policy.end(), policy.begin(), 612292SN/A (int(*)(int)) tolower); 622292SN/A 632292SN/A //Figure out rob policy 642292SN/A if (policy == "dynamic") { 652292SN/A robPolicy = Dynamic; 662292SN/A 672292SN/A //Set Max Entries to Total ROB Capacity 686221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; tid++) { 696221Snate@binkert.org maxEntries[tid] = numEntries; 702292SN/A } 712292SN/A 722292SN/A } else if (policy == "partitioned") { 732292SN/A robPolicy = Partitioned; 744329Sktlim@umich.edu DPRINTF(Fetch, "ROB sharing policy set to Partitioned\n"); 752292SN/A 762292SN/A //@todo:make work if part_amt doesnt divide evenly. 772292SN/A int part_amt = numEntries / numThreads; 782292SN/A 792292SN/A //Divide ROB up evenly 806221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; tid++) { 816221Snate@binkert.org maxEntries[tid] = part_amt; 822292SN/A } 832292SN/A 842292SN/A } else if (policy == "threshold") { 852292SN/A robPolicy = Threshold; 864329Sktlim@umich.edu DPRINTF(Fetch, "ROB sharing policy set to Threshold\n"); 872292SN/A 882292SN/A int threshold = _smtROBThreshold;; 892292SN/A 902292SN/A //Divide up by threshold amount 916221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; tid++) { 926221Snate@binkert.org maxEntries[tid] = threshold; 932292SN/A } 942292SN/A } else { 952292SN/A assert(0 && "Invalid ROB Sharing Policy.Options Are:{Dynamic," 962292SN/A "Partitioned, Threshold}"); 972292SN/A } 981060SN/A 992292SN/A // Set the per-thread iterators to the end of the instruction list. 1006221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; tid++) { 1016221Snate@binkert.org squashIt[tid] = instList[tid].end(); 1022292SN/A } 1031060SN/A 1042292SN/A // Initialize the "universal" ROB head & tail point to invalid 1052292SN/A // pointers 1062292SN/A head = instList[0].end(); 1072292SN/A tail = instList[0].end(); 1082292SN/A} 1092292SN/A 1102292SN/Atemplate <class Impl> 1114329Sktlim@umich.edustd::string 1124329Sktlim@umich.eduROB<Impl>::name() const 1134329Sktlim@umich.edu{ 1144329Sktlim@umich.edu return cpu->name() + ".rob"; 1154329Sktlim@umich.edu} 1164329Sktlim@umich.edu 1174329Sktlim@umich.edutemplate <class Impl> 1182292SN/Avoid 1196221Snate@binkert.orgROB<Impl>::setActiveThreads(list<ThreadID> *at_ptr) 1202292SN/A{ 1212292SN/A DPRINTF(ROB, "Setting active threads list pointer.\n"); 1222292SN/A activeThreads = at_ptr; 1232292SN/A} 1242292SN/A 1252307SN/Atemplate <class Impl> 1262307SN/Avoid 1272307SN/AROB<Impl>::switchOut() 1282307SN/A{ 1296221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; tid++) { 1302307SN/A instList[tid].clear(); 1312307SN/A } 1322307SN/A} 1332307SN/A 1342307SN/Atemplate <class Impl> 1352307SN/Avoid 1362307SN/AROB<Impl>::takeOverFrom() 1372307SN/A{ 1386221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; tid++) { 1392307SN/A doneSquashing[tid] = true; 1402307SN/A threadEntries[tid] = 0; 1412307SN/A squashIt[tid] = instList[tid].end(); 1422307SN/A } 1432307SN/A numInstsInROB = 0; 1442307SN/A 1452307SN/A // Initialize the "universal" ROB head & tail point to invalid 1462307SN/A // pointers 1472307SN/A head = instList[0].end(); 1482307SN/A tail = instList[0].end(); 1492307SN/A} 1502292SN/A 1512292SN/Atemplate <class Impl> 1522292SN/Avoid 1532292SN/AROB<Impl>::resetEntries() 1542292SN/A{ 1552292SN/A if (robPolicy != Dynamic || numThreads > 1) { 1563867Sbinkertn@umich.edu int active_threads = activeThreads->size(); 1572292SN/A 1586221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 1596221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 1602292SN/A 1613867Sbinkertn@umich.edu while (threads != end) { 1626221Snate@binkert.org ThreadID tid = *threads++; 1633867Sbinkertn@umich.edu 1642292SN/A if (robPolicy == Partitioned) { 1653867Sbinkertn@umich.edu maxEntries[tid] = numEntries / active_threads; 1662292SN/A } else if (robPolicy == Threshold && active_threads == 1) { 1673867Sbinkertn@umich.edu maxEntries[tid] = numEntries; 1682292SN/A } 1692292SN/A } 1702292SN/A } 1712292SN/A} 1722292SN/A 1732292SN/Atemplate <class Impl> 1742292SN/Aint 1756221Snate@binkert.orgROB<Impl>::entryAmount(ThreadID num_threads) 1762292SN/A{ 1772292SN/A if (robPolicy == Partitioned) { 1782292SN/A return numEntries / num_threads; 1792292SN/A } else { 1802292SN/A return 0; 1812292SN/A } 1821060SN/A} 1831060SN/A 1841061SN/Atemplate <class Impl> 1851060SN/Aint 1861060SN/AROB<Impl>::countInsts() 1871060SN/A{ 1886221Snate@binkert.org int total = 0; 1891061SN/A 1906221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; tid++) 1916221Snate@binkert.org total += countInsts(tid); 1921060SN/A 1932292SN/A return total; 1942292SN/A} 1951060SN/A 1962292SN/Atemplate <class Impl> 1972292SN/Aint 1986221Snate@binkert.orgROB<Impl>::countInsts(ThreadID tid) 1992292SN/A{ 2002292SN/A return instList[tid].size(); 2011060SN/A} 2021060SN/A 2031061SN/Atemplate <class Impl> 2041060SN/Avoid 2051061SN/AROB<Impl>::insertInst(DynInstPtr &inst) 2061060SN/A{ 2071060SN/A assert(inst); 2081060SN/A 2097897Shestness@cs.utexas.edu robWrites++; 2107897Shestness@cs.utexas.edu 2117720Sgblack@eecs.umich.edu DPRINTF(ROB, "Adding inst PC %s to the ROB.\n", inst->pcState()); 2121060SN/A 2131060SN/A assert(numInstsInROB != numEntries); 2141060SN/A 2156221Snate@binkert.org ThreadID tid = inst->threadNumber; 2161060SN/A 2172292SN/A instList[tid].push_back(inst); 2182292SN/A 2192292SN/A //Set Up head iterator if this is the 1st instruction in the ROB 2202292SN/A if (numInstsInROB == 0) { 2212292SN/A head = instList[tid].begin(); 2222292SN/A assert((*head) == inst); 2231060SN/A } 2241060SN/A 2252292SN/A //Must Decrement for iterator to actually be valid since __.end() 2262292SN/A //actually points to 1 after the last inst 2272292SN/A tail = instList[tid].end(); 2282292SN/A tail--; 2292292SN/A 2302292SN/A inst->setInROB(); 2312292SN/A 2322292SN/A ++numInstsInROB; 2332292SN/A ++threadEntries[tid]; 2342292SN/A 2351060SN/A assert((*tail) == inst); 2361060SN/A 2372292SN/A DPRINTF(ROB, "[tid:%i] Now has %d instructions.\n", tid, threadEntries[tid]); 2381060SN/A} 2391060SN/A 2402292SN/Atemplate <class Impl> 2412292SN/Avoid 2426221Snate@binkert.orgROB<Impl>::retireHead(ThreadID tid) 2432292SN/A{ 2447897Shestness@cs.utexas.edu robWrites++; 2457897Shestness@cs.utexas.edu 2461061SN/A assert(numInstsInROB > 0); 2471060SN/A 2481060SN/A // Get the head ROB instruction. 2492292SN/A InstIt head_it = instList[tid].begin(); 2501060SN/A 2512292SN/A DynInstPtr head_inst = (*head_it); 2521858SN/A 2531060SN/A assert(head_inst->readyToCommit()); 2541060SN/A 2552292SN/A DPRINTF(ROB, "[tid:%u]: Retiring head instruction, " 2567720Sgblack@eecs.umich.edu "instruction PC %s, [sn:%lli]\n", tid, head_inst->pcState(), 2571060SN/A head_inst->seqNum); 2581060SN/A 2591060SN/A --numInstsInROB; 2602292SN/A --threadEntries[tid]; 2611060SN/A 2622731Sktlim@umich.edu head_inst->clearInROB(); 2632292SN/A head_inst->setCommitted(); 2642292SN/A 2652292SN/A instList[tid].erase(head_it); 2662292SN/A 2672292SN/A //Update "Global" Head of ROB 2682292SN/A updateHead(); 2692292SN/A 2702329SN/A // @todo: A special case is needed if the instruction being 2712329SN/A // retired is the only instruction in the ROB; otherwise the tail 2722329SN/A // iterator will become invalidated. 2731681SN/A cpu->removeFrontInst(head_inst); 2741060SN/A} 2752292SN/A 2762292SN/Atemplate <class Impl> 2772292SN/Abool 2786221Snate@binkert.orgROB<Impl>::isHeadReady(ThreadID tid) 2792292SN/A{ 2807897Shestness@cs.utexas.edu robReads++; 2812292SN/A if (threadEntries[tid] != 0) { 2822292SN/A return instList[tid].front()->readyToCommit(); 2832292SN/A } 2842292SN/A 2852292SN/A return false; 2862292SN/A} 2872292SN/A 2882292SN/Atemplate <class Impl> 2892292SN/Abool 2902292SN/AROB<Impl>::canCommit() 2912292SN/A{ 2922292SN/A //@todo: set ActiveThreads through ROB or CPU 2936221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 2946221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 2952292SN/A 2963867Sbinkertn@umich.edu while (threads != end) { 2976221Snate@binkert.org ThreadID tid = *threads++; 2982292SN/A 2992292SN/A if (isHeadReady(tid)) { 3002292SN/A return true; 3012292SN/A } 3021060SN/A } 3031060SN/A 3041060SN/A return false; 3051060SN/A} 3061060SN/A 3071061SN/Atemplate <class Impl> 3081060SN/Aunsigned 3091060SN/AROB<Impl>::numFreeEntries() 3101060SN/A{ 3111060SN/A return numEntries - numInstsInROB; 3121060SN/A} 3131060SN/A 3141061SN/Atemplate <class Impl> 3152292SN/Aunsigned 3166221Snate@binkert.orgROB<Impl>::numFreeEntries(ThreadID tid) 3171060SN/A{ 3182292SN/A return maxEntries[tid] - threadEntries[tid]; 3191060SN/A} 3201060SN/A 3211061SN/Atemplate <class Impl> 3221060SN/Avoid 3236221Snate@binkert.orgROB<Impl>::doSquash(ThreadID tid) 3241060SN/A{ 3257897Shestness@cs.utexas.edu robWrites++; 3262292SN/A DPRINTF(ROB, "[tid:%u]: Squashing instructions until [sn:%i].\n", 3272877Sksewell@umich.edu tid, squashedSeqNum[tid]); 3281858SN/A 3292292SN/A assert(squashIt[tid] != instList[tid].end()); 3302292SN/A 3312877Sksewell@umich.edu if ((*squashIt[tid])->seqNum < squashedSeqNum[tid]) { 3322292SN/A DPRINTF(ROB, "[tid:%u]: Done squashing instructions.\n", 3332292SN/A tid); 3342292SN/A 3352292SN/A squashIt[tid] = instList[tid].end(); 3362292SN/A 3372292SN/A doneSquashing[tid] = true; 3382292SN/A return; 3392292SN/A } 3402292SN/A 3412292SN/A bool robTailUpdate = false; 3421858SN/A 3431858SN/A for (int numSquashed = 0; 3442292SN/A numSquashed < squashWidth && 3452292SN/A squashIt[tid] != instList[tid].end() && 3462877Sksewell@umich.edu (*squashIt[tid])->seqNum > squashedSeqNum[tid]; 3471858SN/A ++numSquashed) 3481858SN/A { 3497720Sgblack@eecs.umich.edu DPRINTF(ROB, "[tid:%u]: Squashing instruction PC %s, seq num %i.\n", 3502292SN/A (*squashIt[tid])->threadNumber, 3517720Sgblack@eecs.umich.edu (*squashIt[tid])->pcState(), 3522292SN/A (*squashIt[tid])->seqNum); 3531858SN/A 3541858SN/A // Mark the instruction as squashed, and ready to commit so that 3551858SN/A // it can drain out of the pipeline. 3562292SN/A (*squashIt[tid])->setSquashed(); 3571858SN/A 3582292SN/A (*squashIt[tid])->setCanCommit(); 3591858SN/A 3602292SN/A 3612292SN/A if (squashIt[tid] == instList[tid].begin()) { 3622292SN/A DPRINTF(ROB, "Reached head of instruction list while " 3631858SN/A "squashing.\n"); 3641858SN/A 3652292SN/A squashIt[tid] = instList[tid].end(); 3661858SN/A 3672292SN/A doneSquashing[tid] = true; 3681858SN/A 3691858SN/A return; 3701858SN/A } 3711858SN/A 3722292SN/A InstIt tail_thread = instList[tid].end(); 3732292SN/A tail_thread--; 3742292SN/A 3752292SN/A if ((*squashIt[tid]) == (*tail_thread)) 3762292SN/A robTailUpdate = true; 3772292SN/A 3782292SN/A squashIt[tid]--; 3791858SN/A } 3801858SN/A 3811858SN/A 3821858SN/A // Check if ROB is done squashing. 3832877Sksewell@umich.edu if ((*squashIt[tid])->seqNum <= squashedSeqNum[tid]) { 3842292SN/A DPRINTF(ROB, "[tid:%u]: Done squashing instructions.\n", 3852292SN/A tid); 3861858SN/A 3872292SN/A squashIt[tid] = instList[tid].end(); 3881858SN/A 3892292SN/A doneSquashing[tid] = true; 3902292SN/A } 3912292SN/A 3922292SN/A if (robTailUpdate) { 3932292SN/A updateTail(); 3942292SN/A } 3952292SN/A} 3962292SN/A 3972292SN/A 3982292SN/Atemplate <class Impl> 3992292SN/Avoid 4002292SN/AROB<Impl>::updateHead() 4012292SN/A{ 4022292SN/A DynInstPtr head_inst; 4032292SN/A InstSeqNum lowest_num = 0; 4042292SN/A bool first_valid = true; 4052292SN/A 4062292SN/A // @todo: set ActiveThreads through ROB or CPU 4076221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 4086221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 4092292SN/A 4103867Sbinkertn@umich.edu while (threads != end) { 4116221Snate@binkert.org ThreadID tid = *threads++; 4122292SN/A 4133867Sbinkertn@umich.edu if (instList[tid].empty()) 4142292SN/A continue; 4152292SN/A 4162292SN/A if (first_valid) { 4173867Sbinkertn@umich.edu head = instList[tid].begin(); 4182292SN/A lowest_num = (*head)->seqNum; 4192292SN/A first_valid = false; 4202292SN/A continue; 4212292SN/A } 4222292SN/A 4233867Sbinkertn@umich.edu InstIt head_thread = instList[tid].begin(); 4242292SN/A 4252292SN/A DynInstPtr head_inst = (*head_thread); 4262292SN/A 4272292SN/A assert(head_inst != 0); 4282292SN/A 4292292SN/A if (head_inst->seqNum < lowest_num) { 4302292SN/A head = head_thread; 4312292SN/A lowest_num = head_inst->seqNum; 4322292SN/A } 4332292SN/A } 4342292SN/A 4352292SN/A if (first_valid) { 4362292SN/A head = instList[0].end(); 4372292SN/A } 4382292SN/A 4392292SN/A} 4402292SN/A 4412292SN/Atemplate <class Impl> 4422292SN/Avoid 4432292SN/AROB<Impl>::updateTail() 4442292SN/A{ 4452292SN/A tail = instList[0].end(); 4462292SN/A bool first_valid = true; 4472292SN/A 4486221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 4496221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 4502292SN/A 4513867Sbinkertn@umich.edu while (threads != end) { 4526221Snate@binkert.org ThreadID tid = *threads++; 4532292SN/A 4542292SN/A if (instList[tid].empty()) { 4552292SN/A continue; 4562292SN/A } 4572292SN/A 4582292SN/A // If this is the first valid then assign w/out 4592292SN/A // comparison 4602292SN/A if (first_valid) { 4612292SN/A tail = instList[tid].end(); 4622292SN/A tail--; 4632292SN/A first_valid = false; 4642292SN/A continue; 4652292SN/A } 4662292SN/A 4672292SN/A // Assign new tail if this thread's tail is younger 4682292SN/A // than our current "tail high" 4692292SN/A InstIt tail_thread = instList[tid].end(); 4702292SN/A tail_thread--; 4712292SN/A 4722292SN/A if ((*tail_thread)->seqNum > (*tail)->seqNum) { 4732292SN/A tail = tail_thread; 4742292SN/A } 4752292SN/A } 4762292SN/A} 4772292SN/A 4782292SN/A 4792292SN/Atemplate <class Impl> 4802292SN/Avoid 4816221Snate@binkert.orgROB<Impl>::squash(InstSeqNum squash_num, ThreadID tid) 4822292SN/A{ 4832292SN/A if (isEmpty()) { 4842292SN/A DPRINTF(ROB, "Does not need to squash due to being empty " 4852292SN/A "[sn:%i]\n", 4862292SN/A squash_num); 4872292SN/A 4882292SN/A return; 4892292SN/A } 4902292SN/A 4912292SN/A DPRINTF(ROB, "Starting to squash within the ROB.\n"); 4922292SN/A 4932292SN/A robStatus[tid] = ROBSquashing; 4942292SN/A 4952292SN/A doneSquashing[tid] = false; 4961060SN/A 4972877Sksewell@umich.edu squashedSeqNum[tid] = squash_num; 4981060SN/A 4992292SN/A if (!instList[tid].empty()) { 5002292SN/A InstIt tail_thread = instList[tid].end(); 5012292SN/A tail_thread--; 5021060SN/A 5032292SN/A squashIt[tid] = tail_thread; 5041060SN/A 5052292SN/A doSquash(tid); 5061858SN/A } 5071060SN/A} 5082877Sksewell@umich.edu 5092292SN/Atemplate <class Impl> 5102292SN/Atypename Impl::DynInstPtr 5116221Snate@binkert.orgROB<Impl>::readHeadInst(ThreadID tid) 5122292SN/A{ 5132292SN/A if (threadEntries[tid] != 0) { 5142292SN/A InstIt head_thread = instList[tid].begin(); 5151060SN/A 5162292SN/A assert((*head_thread)->isInROB()==true); 5171858SN/A 5182292SN/A return *head_thread; 5192292SN/A } else { 5202292SN/A return dummyInst; 5212292SN/A } 5221858SN/A} 5232877Sksewell@umich.edu 5242292SN/Atemplate <class Impl> 5252292SN/Atypename Impl::DynInstPtr 5266221Snate@binkert.orgROB<Impl>::readTailInst(ThreadID tid) 5272292SN/A{ 5282292SN/A InstIt tail_thread = instList[tid].end(); 5292292SN/A tail_thread--; 5302292SN/A 5312292SN/A return *tail_thread; 5322292SN/A} 5332292SN/A 5347897Shestness@cs.utexas.edutemplate <class Impl> 5357897Shestness@cs.utexas.eduvoid 5367897Shestness@cs.utexas.eduROB<Impl>::regStats() 5377897Shestness@cs.utexas.edu{ 5387897Shestness@cs.utexas.edu using namespace Stats; 5397897Shestness@cs.utexas.edu robReads 5407897Shestness@cs.utexas.edu .name(name() + ".rob_reads") 5417897Shestness@cs.utexas.edu .desc("The number of ROB reads"); 5427897Shestness@cs.utexas.edu 5437897Shestness@cs.utexas.edu robWrites 5447897Shestness@cs.utexas.edu .name(name() + ".rob_writes") 5457897Shestness@cs.utexas.edu .desc("The number of ROB writes"); 5467897Shestness@cs.utexas.edu} 5477897Shestness@cs.utexas.edu 548