rob.hh revision 9444 
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2004-2006 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Kevin Lim
41 *          Korey Sewell
42 */
43
44#ifndef __CPU_O3_ROB_HH__
45#define __CPU_O3_ROB_HH__
46
47#include <string>
48#include <utility>
49#include <vector>
50
51#include "arch/registers.hh"
52#include "base/types.hh"
53#include "config/the_isa.hh"
54
55/**
56 * ROB class.  The ROB is largely what drives squashing.
57 */
58template <class Impl>
59class ROB
60{
61  protected:
62    typedef TheISA::RegIndex RegIndex;
63  public:
64    //Typedefs from the Impl.
65    typedef typename Impl::O3CPU O3CPU;
66    typedef typename Impl::DynInstPtr DynInstPtr;
67
68    typedef std::pair<RegIndex, PhysRegIndex> UnmapInfo;
69    typedef typename std::list<DynInstPtr>::iterator InstIt;
70
71    /** Possible ROB statuses. */
72    enum Status {
73        Running,
74        Idle,
75        ROBSquashing
76    };
77
78    /** SMT ROB Sharing Policy */
79    enum ROBPolicy{
80        Dynamic,
81        Partitioned,
82        Threshold
83    };
84
85  private:
86    /** Per-thread ROB status. */
87    Status robStatus[Impl::MaxThreads];
88
89    /** ROB resource sharing policy for SMT mode. */
90    ROBPolicy robPolicy;
91
92  public:
93    /** ROB constructor.
94     *  @param _numEntries      Number of entries in ROB.
95     *  @param _squashWidth     Number of instructions that can be squashed in a
96     *                          single cycle.
97     *  @param _smtROBPolicy    ROB Partitioning Scheme for SMT.
98     *  @param _smtROBThreshold Max Resources(by %) a thread can have in the ROB.
99     *  @param _numThreads      The number of active threads.
100     */
101    ROB(O3CPU *_cpu, unsigned _numEntries, unsigned _squashWidth,
102        std::string smtROBPolicy, unsigned _smtROBThreshold,
103        ThreadID _numThreads);
104
105    std::string name() const;
106
107    /** Sets pointer to the list of active threads.
108     *  @param at_ptr Pointer to the list of active threads.
109     */
110    void setActiveThreads(std::list<ThreadID> *at_ptr);
111
112    /** Perform sanity checks after a drain. */
113    void drainSanityCheck() const;
114
115    /** Takes over another CPU's thread. */
116    void takeOverFrom();
117
118    /** Function to insert an instruction into the ROB. Note that whatever
119     *  calls this function must ensure that there is enough space within the
120     *  ROB for the new instruction.
121     *  @param inst The instruction being inserted into the ROB.
122     */
123    void insertInst(DynInstPtr &inst);
124
125    /** Returns pointer to the head instruction within the ROB.  There is
126     *  no guarantee as to the return value if the ROB is empty.
127     *  @retval Pointer to the DynInst that is at the head of the ROB.
128     */
129//    DynInstPtr readHeadInst();
130
131    /** Returns a pointer to the head instruction of a specific thread within
132     *  the ROB.
133     *  @return Pointer to the DynInst that is at the head of the ROB.
134     */
135    DynInstPtr readHeadInst(ThreadID tid);
136
137    /** Returns a pointer to the instruction with the given sequence if it is
138     *  in the ROB.
139     */
140    DynInstPtr findInst(ThreadID tid, InstSeqNum squash_inst);
141
142    /** Returns pointer to the tail instruction within the ROB.  There is
143     *  no guarantee as to the return value if the ROB is empty.
144     *  @retval Pointer to the DynInst that is at the tail of the ROB.
145     */
146//    DynInstPtr readTailInst();
147
148    /** Returns a pointer to the tail instruction of a specific thread within
149     *  the ROB.
150     *  @return Pointer to the DynInst that is at the tail of the ROB.
151     */
152    DynInstPtr readTailInst(ThreadID tid);
153
154    /** Retires the head instruction, removing it from the ROB. */
155//    void retireHead();
156
157    /** Retires the head instruction of a specific thread, removing it from the
158     *  ROB.
159     */
160    void retireHead(ThreadID tid);
161
162    /** Is the oldest instruction across all threads ready. */
163//    bool isHeadReady();
164
165    /** Is the oldest instruction across a particular thread ready. */
166    bool isHeadReady(ThreadID tid);
167
168    /** Is there any commitable head instruction across all threads ready. */
169    bool canCommit();
170
171    /** Re-adjust ROB partitioning. */
172    void resetEntries();
173
174    /** Number of entries needed For 'num_threads' amount of threads. */
175    int entryAmount(ThreadID num_threads);
176
177    /** Returns the number of total free entries in the ROB. */
178    unsigned numFreeEntries();
179
180    /** Returns the number of free entries in a specific ROB paritition. */
181    unsigned numFreeEntries(ThreadID tid);
182
183    /** Returns the maximum number of entries for a specific thread. */
184    unsigned getMaxEntries(ThreadID tid)
185    { return maxEntries[tid]; }
186
187    /** Returns the number of entries being used by a specific thread. */
188    unsigned getThreadEntries(ThreadID tid)
189    { return threadEntries[tid]; }
190
191    /** Returns if the ROB is full. */
192    bool isFull()
193    { return numInstsInROB == numEntries; }
194
195    /** Returns if a specific thread's partition is full. */
196    bool isFull(ThreadID tid)
197    { return threadEntries[tid] == numEntries; }
198
199    /** Returns if the ROB is empty. */
200    bool isEmpty() const
201    { return numInstsInROB == 0; }
202
203    /** Returns if a specific thread's partition is empty. */
204    bool isEmpty(ThreadID tid) const
205    { return threadEntries[tid] == 0; }
206
207    /** Executes the squash, marking squashed instructions. */
208    void doSquash(ThreadID tid);
209
210    /** Squashes all instructions younger than the given sequence number for
211     *  the specific thread.
212     */
213    void squash(InstSeqNum squash_num, ThreadID tid);
214
215    /** Updates the head instruction with the new oldest instruction. */
216    void updateHead();
217
218    /** Updates the tail instruction with the new youngest instruction. */
219    void updateTail();
220
221    /** Reads the PC of the oldest head instruction. */
222//    uint64_t readHeadPC();
223
224    /** Reads the PC of the head instruction of a specific thread. */
225//    uint64_t readHeadPC(ThreadID tid);
226
227    /** Reads the next PC of the oldest head instruction. */
228//    uint64_t readHeadNextPC();
229
230    /** Reads the next PC of the head instruction of a specific thread. */
231//    uint64_t readHeadNextPC(ThreadID tid);
232
233    /** Reads the sequence number of the oldest head instruction. */
234//    InstSeqNum readHeadSeqNum();
235
236    /** Reads the sequence number of the head instruction of a specific thread.
237     */
238//    InstSeqNum readHeadSeqNum(ThreadID tid);
239
240    /** Reads the PC of the youngest tail instruction. */
241//    uint64_t readTailPC();
242
243    /** Reads the PC of the tail instruction of a specific thread. */
244//    uint64_t readTailPC(ThreadID tid);
245
246    /** Reads the sequence number of the youngest tail instruction. */
247//    InstSeqNum readTailSeqNum();
248
249    /** Reads the sequence number of tail instruction of a specific thread. */
250//    InstSeqNum readTailSeqNum(ThreadID tid);
251
252    /** Checks if the ROB is still in the process of squashing instructions.
253     *  @retval Whether or not the ROB is done squashing.
254     */
255    bool isDoneSquashing(ThreadID tid) const
256    { return doneSquashing[tid]; }
257
258    /** Checks if the ROB is still in the process of squashing instructions for
259     *  any thread.
260     */
261    bool isDoneSquashing();
262
263    /** This is more of a debugging function than anything.  Use
264     *  numInstsInROB to get the instructions in the ROB unless you are
265     *  double checking that variable.
266     */
267    int countInsts();
268
269    /** This is more of a debugging function than anything.  Use
270     *  threadEntries to get the instructions in the ROB unless you are
271     *  double checking that variable.
272     */
273    int countInsts(ThreadID tid);
274
275    /** Registers statistics. */
276    void regStats();
277
278  private:
279    /** Reset the ROB state */
280    void resetState();
281
282    /** Pointer to the CPU. */
283    O3CPU *cpu;
284
285    /** Active Threads in CPU */
286    std::list<ThreadID> *activeThreads;
287
288    /** Number of instructions in the ROB. */
289    unsigned numEntries;
290
291    /** Entries Per Thread */
292    unsigned threadEntries[Impl::MaxThreads];
293
294    /** Max Insts a Thread Can Have in the ROB */
295    unsigned maxEntries[Impl::MaxThreads];
296
297    /** ROB List of Instructions */
298    std::list<DynInstPtr> instList[Impl::MaxThreads];
299
300    /** Number of instructions that can be squashed in a single cycle. */
301    unsigned squashWidth;
302
303  public:
304    /** Iterator pointing to the instruction which is the last instruction
305     *  in the ROB.  This may at times be invalid (ie when the ROB is empty),
306     *  however it should never be incorrect.
307     */
308    InstIt tail;
309
310    /** Iterator pointing to the instruction which is the first instruction in
311     *  in the ROB*/
312    InstIt head;
313
314  private:
315    /** Iterator used for walking through the list of instructions when
316     *  squashing.  Used so that there is persistent state between cycles;
317     *  when squashing, the instructions are marked as squashed but not
318     *  immediately removed, meaning the tail iterator remains the same before
319     *  and after a squash.
320     *  This will always be set to cpu->instList.end() if it is invalid.
321     */
322    InstIt squashIt[Impl::MaxThreads];
323
324  public:
325    /** Number of instructions in the ROB. */
326    int numInstsInROB;
327
328    /** Dummy instruction returned if there are no insts left. */
329    DynInstPtr dummyInst;
330
331  private:
332    /** The sequence number of the squashed instruction. */
333    InstSeqNum squashedSeqNum[Impl::MaxThreads];
334
335    /** Is the ROB done squashing. */
336    bool doneSquashing[Impl::MaxThreads];
337
338    /** Number of active threads. */
339    ThreadID numThreads;
340
341    // The number of rob_reads
342    Stats::Scalar robReads;
343    // The number of rob_writes
344    Stats::Scalar robWrites;
345};
346
347#endif //__CPU_O3_ROB_HH__
348