rob.hh revision 2831 
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 *          Korey Sewell
30 */
31
32#ifndef __CPU_O3_ROB_HH__
33#define __CPU_O3_ROB_HH__
34
35#include <string>
36#include <utility>
37#include <vector>
38
39/**
40 * ROB class.  The ROB is largely what drives squashing.
41 */
42template <class Impl>
43class ROB
44{
45  protected:
46    typedef TheISA::RegIndex RegIndex;
47  public:
48    //Typedefs from the Impl.
49    typedef typename Impl::O3CPU O3CPU;
50    typedef typename Impl::DynInstPtr DynInstPtr;
51
52    typedef std::pair<RegIndex, PhysRegIndex> UnmapInfo;
53    typedef typename std::list<DynInstPtr>::iterator InstIt;
54
55    /** Possible ROB statuses. */
56    enum Status {
57        Running,
58        Idle,
59        ROBSquashing
60    };
61
62    /** SMT ROB Sharing Policy */
63    enum ROBPolicy{
64        Dynamic,
65        Partitioned,
66        Threshold
67    };
68
69  private:
70    /** Per-thread ROB status. */
71    Status robStatus[Impl::MaxThreads];
72
73    /** ROB resource sharing policy for SMT mode. */
74    ROBPolicy robPolicy;
75
76  public:
77    /** ROB constructor.
78     *  @param _numEntries      Number of entries in ROB.
79     *  @param _squashWidth     Number of instructions that can be squashed in a
80     *                          single cycle.
81     *  @param _smtROBPolicy    ROB Partitioning Scheme for SMT.
82     *  @param _smtROBThreshold Max Resources(by %) a thread can have in the ROB.
83     *  @param _numThreads      The number of active threads.
84     */
85    ROB(unsigned _numEntries, unsigned _squashWidth, std::string smtROBPolicy,
86        unsigned _smtROBThreshold, unsigned _numThreads);
87
88    std::string name() const;
89
90    /** Function to set the CPU pointer, necessary due to which object the ROB
91     *  is created within.
92     *  @param cpu_ptr Pointer to the implementation specific full CPU object.
93     */
94    void setCPU(O3CPU *cpu_ptr);
95
96    /** Sets pointer to the list of active threads.
97     *  @param at_ptr Pointer to the list of active threads.
98     */
99    void setActiveThreads(std::list<unsigned>* at_ptr);
100
101    /** Switches out the ROB. */
102    void switchOut();
103
104    /** Takes over another CPU's thread. */
105    void takeOverFrom();
106
107    /** Function to insert an instruction into the ROB. Note that whatever
108     *  calls this function must ensure that there is enough space within the
109     *  ROB for the new instruction.
110     *  @param inst The instruction being inserted into the ROB.
111     */
112    void insertInst(DynInstPtr &inst);
113
114    /** Returns pointer to the head instruction within the ROB.  There is
115     *  no guarantee as to the return value if the ROB is empty.
116     *  @retval Pointer to the DynInst that is at the head of the ROB.
117     */
118//    DynInstPtr readHeadInst();
119
120    /** Returns a pointer to the head instruction of a specific thread within
121     *  the ROB.
122     *  @return Pointer to the DynInst that is at the head of the ROB.
123     */
124    DynInstPtr readHeadInst(unsigned tid);
125
126    /** Returns pointer to the tail instruction within the ROB.  There is
127     *  no guarantee as to the return value if the ROB is empty.
128     *  @retval Pointer to the DynInst that is at the tail of the ROB.
129     */
130//    DynInstPtr readTailInst();
131
132    /** Returns a pointer to the tail instruction of a specific thread within
133     *  the ROB.
134     *  @return Pointer to the DynInst that is at the tail of the ROB.
135     */
136    DynInstPtr readTailInst(unsigned tid);
137
138    /** Retires the head instruction, removing it from the ROB. */
139//    void retireHead();
140
141    /** Retires the head instruction of a specific thread, removing it from the
142     *  ROB.
143     */
144    void retireHead(unsigned tid);
145
146    /** Is the oldest instruction across all threads ready. */
147//    bool isHeadReady();
148
149    /** Is the oldest instruction across a particular thread ready. */
150    bool isHeadReady(unsigned tid);
151
152    /** Is there any commitable head instruction across all threads ready. */
153    bool canCommit();
154
155    /** Re-adjust ROB partitioning. */
156    void resetEntries();
157
158    /** Number of entries needed For 'num_threads' amount of threads. */
159    int entryAmount(int num_threads);
160
161    /** Returns the number of total free entries in the ROB. */
162    unsigned numFreeEntries();
163
164    /** Returns the number of free entries in a specific ROB paritition. */
165    unsigned numFreeEntries(unsigned tid);
166
167    /** Returns the maximum number of entries for a specific thread. */
168    unsigned getMaxEntries(unsigned tid)
169    { return maxEntries[tid]; }
170
171    /** Returns the number of entries being used by a specific thread. */
172    unsigned getThreadEntries(unsigned tid)
173    { return threadEntries[tid]; }
174
175    /** Returns if the ROB is full. */
176    bool isFull()
177    { return numInstsInROB == numEntries; }
178
179    /** Returns if a specific thread's partition is full. */
180    bool isFull(unsigned tid)
181    { return threadEntries[tid] == numEntries; }
182
183    /** Returns if the ROB is empty. */
184    bool isEmpty()
185    { return numInstsInROB == 0; }
186
187    /** Returns if a specific thread's partition is empty. */
188    bool isEmpty(unsigned tid)
189    { return threadEntries[tid] == 0; }
190
191    /** Executes the squash, marking squashed instructions. */
192    void doSquash(unsigned tid);
193
194    /** Squashes all instructions younger than the given sequence number for
195     *  the specific thread.
196     */
197    void squash(InstSeqNum squash_num, unsigned tid);
198
199    /** Updates the head instruction with the new oldest instruction. */
200    void updateHead();
201
202    /** Updates the tail instruction with the new youngest instruction. */
203    void updateTail();
204
205    /** Reads the PC of the oldest head instruction. */
206//    uint64_t readHeadPC();
207
208    /** Reads the PC of the head instruction of a specific thread. */
209//    uint64_t readHeadPC(unsigned tid);
210
211    /** Reads the next PC of the oldest head instruction. */
212//    uint64_t readHeadNextPC();
213
214    /** Reads the next PC of the head instruction of a specific thread. */
215//    uint64_t readHeadNextPC(unsigned tid);
216
217    /** Reads the sequence number of the oldest head instruction. */
218//    InstSeqNum readHeadSeqNum();
219
220    /** Reads the sequence number of the head instruction of a specific thread.
221     */
222//    InstSeqNum readHeadSeqNum(unsigned tid);
223
224    /** Reads the PC of the youngest tail instruction. */
225//    uint64_t readTailPC();
226
227    /** Reads the PC of the tail instruction of a specific thread. */
228//    uint64_t readTailPC(unsigned tid);
229
230    /** Reads the sequence number of the youngest tail instruction. */
231//    InstSeqNum readTailSeqNum();
232
233    /** Reads the sequence number of tail instruction of a specific thread. */
234//    InstSeqNum readTailSeqNum(unsigned tid);
235
236    /** Checks if the ROB is still in the process of squashing instructions.
237     *  @retval Whether or not the ROB is done squashing.
238     */
239    bool isDoneSquashing(unsigned tid) const
240    { return doneSquashing[tid]; }
241
242    /** Checks if the ROB is still in the process of squashing instructions for
243     *  any thread.
244     */
245    bool isDoneSquashing();
246
247    /** This is more of a debugging function than anything.  Use
248     *  numInstsInROB to get the instructions in the ROB unless you are
249     *  double checking that variable.
250     */
251    int countInsts();
252
253    /** This is more of a debugging function than anything.  Use
254     *  threadEntries to get the instructions in the ROB unless you are
255     *  double checking that variable.
256     */
257    int countInsts(unsigned tid);
258
259  private:
260    /** Pointer to the CPU. */
261    O3CPU *cpu;
262
263    /** Active Threads in CPU */
264    std::list<unsigned>* activeThreads;
265
266    /** Number of instructions in the ROB. */
267    unsigned numEntries;
268
269    /** Entries Per Thread */
270    unsigned threadEntries[Impl::MaxThreads];
271
272    /** Max Insts a Thread Can Have in the ROB */
273    unsigned maxEntries[Impl::MaxThreads];
274
275    /** ROB List of Instructions */
276    std::list<DynInstPtr> instList[Impl::MaxThreads];
277
278    /** Number of instructions that can be squashed in a single cycle. */
279    unsigned squashWidth;
280
281  public:
282    /** Iterator pointing to the instruction which is the last instruction
283     *  in the ROB.  This may at times be invalid (ie when the ROB is empty),
284     *  however it should never be incorrect.
285     */
286    InstIt tail;
287
288    /** Iterator pointing to the instruction which is the first instruction in
289     *  in the ROB*/
290    InstIt head;
291
292  private:
293    /** Iterator used for walking through the list of instructions when
294     *  squashing.  Used so that there is persistent state between cycles;
295     *  when squashing, the instructions are marked as squashed but not
296     *  immediately removed, meaning the tail iterator remains the same before
297     *  and after a squash.
298     *  This will always be set to cpu->instList.end() if it is invalid.
299     */
300    InstIt squashIt[Impl::MaxThreads];
301
302  public:
303    /** Number of instructions in the ROB. */
304    int numInstsInROB;
305
306    /** Dummy instruction returned if there are no insts left. */
307    DynInstPtr dummyInst;
308
309  private:
310    /** The sequence number of the squashed instruction. */
311    InstSeqNum squashedSeqNum;
312
313    /** Is the ROB done squashing. */
314    bool doneSquashing[Impl::MaxThreads];
315
316    /** Number of active threads. */
317    unsigned numThreads;
318};
319
320#endif //__CPU_O3_ROB_HH__
321