rename_map.hh revision 2674:6d4afef73a20
12SN/A/* 21762SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan 32SN/A * All rights reserved. 42SN/A * 52SN/A * Redistribution and use in source and binary forms, with or without 62SN/A * modification, are permitted provided that the following conditions are 72SN/A * met: redistributions of source code must retain the above copyright 82SN/A * notice, this list of conditions and the following disclaimer; 92SN/A * redistributions in binary form must reproduce the above copyright 102SN/A * notice, this list of conditions and the following disclaimer in the 112SN/A * documentation and/or other materials provided with the distribution; 122SN/A * neither the name of the copyright holders nor the names of its 132SN/A * contributors may be used to endorse or promote products derived from 142SN/A * this software without specific prior written permission. 152SN/A * 162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Kevin Lim 292665Ssaidi@eecs.umich.edu */ 302SN/A 312SN/A// Todo: Create destructor. 3211793Sbrandon.potter@amd.com// Have it so that there's a more meaningful name given to the variable 3311793Sbrandon.potter@amd.com// that marks the beginning of the FP registers. 342SN/A 352SN/A#ifndef __CPU_O3_RENAME_MAP_HH__ 362SN/A#define __CPU_O3_RENAME_MAP_HH__ 375882Snate@binkert.org 3811793Sbrandon.potter@amd.com#include <iostream> 399356Snilay@cs.wisc.edu#include <utility> 409983Sstever@gmail.com#include <vector> 4156SN/A 428278SAli.Saidi@ARM.com#include "cpu/o3/free_list.hh" 4311157SDylan.Johnson@ARM.com//For RegIndex 442SN/A#include "arch/isa_traits.hh" 452SN/A 462SN/Aclass SimpleRenameMap 472SN/A{ 482SN/A protected: 492SN/A typedef TheISA::RegIndex RegIndex; 502SN/A public: 519983Sstever@gmail.com /** 522SN/A * Pair of a logical register and a physical register. Tells the 539983Sstever@gmail.com * previous mapping of a logical register to a physical register. 545543Ssaidi@eecs.umich.edu * Used to roll back the rename map to a previous state. 555336Shines@cs.fsu.edu */ 562SN/A typedef std::pair<RegIndex, PhysRegIndex> UnmapInfo; 572SN/A 582SN/A /** 592SN/A * Pair of a physical register and a physical register. Used to 602SN/A * return the physical register that a logical register has been 619983Sstever@gmail.com * renamed to, and the previous physical register that the same 629983Sstever@gmail.com * logical register was previously mapped to. 632SN/A */ 642SN/A typedef std::pair<PhysRegIndex, PhysRegIndex> RenameInfo; 652SN/A 662SN/A public: 672SN/A /** Default constructor. init() must be called prior to use. */ 682SN/A SimpleRenameMap() {}; 692SN/A 702SN/A /** Destructor. */ 712SN/A ~SimpleRenameMap(); 728231Snate@binkert.org 732SN/A /** Initializes rename map with given parameters. */ 742SN/A void init(unsigned _numLogicalIntRegs, 752SN/A unsigned _numPhysicalIntRegs, 762SN/A PhysRegIndex &_int_reg_start, 775336Shines@cs.fsu.edu 782SN/A unsigned _numLogicalFloatRegs, 798231Snate@binkert.org unsigned _numPhysicalFloatRegs, 802SN/A PhysRegIndex &_float_reg_start, 812SN/A 822SN/A unsigned _numMiscRegs, 832SN/A 842SN/A RegIndex _intZeroReg, 852SN/A RegIndex _floatZeroReg, 863645Sbinkertn@umich.edu 879960Sandreas.hansson@arm.com int id, 882SN/A bool bindRegs); 899983Sstever@gmail.com 905606Snate@binkert.org /** Sets the free list used with this rename map. */ 912SN/A void setFreeList(SimpleFreeList *fl_ptr); 922SN/A 9311157SDylan.Johnson@ARM.com //Tell rename map to get a free physical register for a given 9411164SDylan.Johnson@ARM.com //architected register. Not sure it should have a return value, 9511164SDylan.Johnson@ARM.com //but perhaps it should have some sort of fault in case there are 9611164SDylan.Johnson@ARM.com //no free registers. 9711164SDylan.Johnson@ARM.com RenameInfo rename(RegIndex arch_reg); 9811164SDylan.Johnson@ARM.com 9911164SDylan.Johnson@ARM.com PhysRegIndex lookup(RegIndex phys_reg); 10011157SDylan.Johnson@ARM.com 10111157SDylan.Johnson@ARM.com /** 10211157SDylan.Johnson@ARM.com * Marks the given register as ready, meaning that its value has been 10311157SDylan.Johnson@ARM.com * calculated and written to the register file. 10411157SDylan.Johnson@ARM.com * @param ready_reg The index of the physical register that is now ready. 10511157SDylan.Johnson@ARM.com */ 10611157SDylan.Johnson@ARM.com void setEntry(RegIndex arch_reg, PhysRegIndex renamed_reg); 1078278SAli.Saidi@ARM.com 1088278SAli.Saidi@ARM.com int numFreeEntries(); 1098278SAli.Saidi@ARM.com 1108278SAli.Saidi@ARM.com private: 1118278SAli.Saidi@ARM.com /** Rename Map ID */ 1128278SAli.Saidi@ARM.com int id; 1138278SAli.Saidi@ARM.com 1148278SAli.Saidi@ARM.com /** Number of logical integer registers. */ 1158278SAli.Saidi@ARM.com int numLogicalIntRegs; 1168278SAli.Saidi@ARM.com 1178278SAli.Saidi@ARM.com /** Number of physical integer registers. */ 1183645Sbinkertn@umich.edu int numPhysicalIntRegs; 1193645Sbinkertn@umich.edu 1202SN/A /** Number of logical floating point registers. */ 1219983Sstever@gmail.com int numLogicalFloatRegs; 1229983Sstever@gmail.com 1239983Sstever@gmail.com /** Number of physical floating point registers. */ 1242SN/A int numPhysicalFloatRegs; 1252SN/A 1265512SMichael.Adler@intel.com /** Number of miscellaneous registers. */ 1275512SMichael.Adler@intel.com int numMiscRegs; 1285512SMichael.Adler@intel.com 1295512SMichael.Adler@intel.com /** Number of logical integer + float registers. */ 1305512SMichael.Adler@intel.com int numLogicalRegs; 1315512SMichael.Adler@intel.com 1325512SMichael.Adler@intel.com /** Number of physical integer + float registers. */ 1335512SMichael.Adler@intel.com int numPhysicalRegs; 1345512SMichael.Adler@intel.com 1355512SMichael.Adler@intel.com /** The integer zero register. This implementation assumes it is always 1365512SMichael.Adler@intel.com * zero and never can be anything else. 1375512SMichael.Adler@intel.com */ 1385512SMichael.Adler@intel.com RegIndex intZeroReg; 1395512SMichael.Adler@intel.com 1405512SMichael.Adler@intel.com /** The floating point zero register. This implementation assumes it is 1415512SMichael.Adler@intel.com * always zero and never can be anything else. 142 */ 143 RegIndex floatZeroReg; 144 145 class RenameEntry 146 { 147 public: 148 PhysRegIndex physical_reg; 149 bool valid; 150 151 RenameEntry() 152 : physical_reg(0), valid(false) 153 { } 154 }; 155 156 private: 157 /** Integer rename map. */ 158 std::vector<RenameEntry> intRenameMap; 159 160 /** Floating point rename map. */ 161 std::vector<RenameEntry> floatRenameMap; 162 163 private: 164 /** Free list interface. */ 165 SimpleFreeList *freeList; 166}; 167 168#endif //__CPU_O3_RENAME_MAP_HH__ 169