rename_map.cc revision 2665
18706Sandreas.hansson@arm.com/*
27586SAli.Saidi@arm.com * Copyright (c) 2004-2005 The Regents of The University of Michigan
37586SAli.Saidi@arm.com * All rights reserved.
47586SAli.Saidi@arm.com *
57586SAli.Saidi@arm.com * Redistribution and use in source and binary forms, with or without
67586SAli.Saidi@arm.com * modification, are permitted provided that the following conditions are
77586SAli.Saidi@arm.com * met: redistributions of source code must retain the above copyright
87586SAli.Saidi@arm.com * notice, this list of conditions and the following disclaimer;
97586SAli.Saidi@arm.com * redistributions in binary form must reproduce the above copyright
107586SAli.Saidi@arm.com * notice, this list of conditions and the following disclaimer in the
117586SAli.Saidi@arm.com * documentation and/or other materials provided with the distribution;
127586SAli.Saidi@arm.com * neither the name of the copyright holders nor the names of its
137905SBrad.Beckmann@amd.com * contributors may be used to endorse or promote products derived from
145323Sgblack@eecs.umich.edu * this software without specific prior written permission.
152934Sktlim@umich.edu *
162934Sktlim@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172934Sktlim@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182934Sktlim@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192934Sktlim@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202934Sktlim@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212934Sktlim@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222934Sktlim@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232934Sktlim@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242934Sktlim@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252934Sktlim@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262934Sktlim@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272934Sktlim@umich.edu *
282934Sktlim@umich.edu * Authors: Kevin Lim
292934Sktlim@umich.edu */
302934Sktlim@umich.edu
312934Sktlim@umich.edu#include <vector>
322934Sktlim@umich.edu
332934Sktlim@umich.edu#include "cpu/o3/rename_map.hh"
342934Sktlim@umich.edu
352934Sktlim@umich.eduusing namespace std;
362934Sktlim@umich.edu
372934Sktlim@umich.edu// Todo: Consider making functions inline.  Avoid having things that are
382934Sktlim@umich.edu// using the zero register or misc registers from adding on the registers
392934Sktlim@umich.edu// to the free list.  Possibly remove the direct communication between
402934Sktlim@umich.edu// this and the freelist.  Considering making inline bool functions that
412934Sktlim@umich.edu// determine if the register is a logical int, logical fp, physical int,
422934Sktlim@umich.edu// physical fp, etc.
432995Ssaidi@eecs.umich.edu
448528SAli.Saidi@ARM.comSimpleRenameMap::SimpleRenameMap(unsigned _numLogicalIntRegs,
452934Sktlim@umich.edu                                 unsigned _numPhysicalIntRegs,
462934Sktlim@umich.edu                                 unsigned _numLogicalFloatRegs,
472934Sktlim@umich.edu                                 unsigned _numPhysicalFloatRegs,
482934Sktlim@umich.edu                                 unsigned _numMiscRegs,
492934Sktlim@umich.edu                                 RegIndex _intZeroReg,
502934Sktlim@umich.edu                                 RegIndex _floatZeroReg)
512934Sktlim@umich.edu    : numLogicalIntRegs(_numLogicalIntRegs),
522934Sktlim@umich.edu      numPhysicalIntRegs(_numPhysicalIntRegs),
539036Sandreas.hansson@arm.com      numLogicalFloatRegs(_numLogicalFloatRegs),
546122SSteve.Reinhardt@amd.com      numPhysicalFloatRegs(_numPhysicalFloatRegs),
556122SSteve.Reinhardt@amd.com      numMiscRegs(_numMiscRegs),
566122SSteve.Reinhardt@amd.com      intZeroReg(_intZeroReg),
576122SSteve.Reinhardt@amd.com      floatZeroReg(_floatZeroReg)
584520Ssaidi@eecs.umich.edu{
598713Sandreas.hansson@arm.com    DPRINTF(Rename, "Rename: Creating rename map.  Phys: %i / %i, Float: "
604520Ssaidi@eecs.umich.edu            "%i / %i.\n", numLogicalIntRegs, numPhysicalIntRegs,
614982Ssaidi@eecs.umich.edu            numLogicalFloatRegs, numPhysicalFloatRegs);
624520Ssaidi@eecs.umich.edu
634520Ssaidi@eecs.umich.edu    numLogicalRegs = numLogicalIntRegs + numLogicalFloatRegs;
642934Sktlim@umich.edu
652934Sktlim@umich.edu    numPhysicalRegs = numPhysicalIntRegs + numPhysicalFloatRegs;
663005Sstever@eecs.umich.edu
673005Sstever@eecs.umich.edu    //Create the rename maps, and their scoreboards.
683304Sstever@eecs.umich.edu    intRenameMap = new RenameEntry[numLogicalIntRegs];
692995Ssaidi@eecs.umich.edu    floatRenameMap = new RenameEntry[numLogicalRegs];
709036Sandreas.hansson@arm.com
719036Sandreas.hansson@arm.com    // Should combine this into one scoreboard.
728713Sandreas.hansson@arm.com    intScoreboard.resize(numPhysicalIntRegs);
738713Sandreas.hansson@arm.com    floatScoreboard.resize(numPhysicalRegs);
749164Sandreas.hansson@arm.com    miscScoreboard.resize(numPhysicalRegs + numMiscRegs);
758713Sandreas.hansson@arm.com
768931Sandreas.hansson@arm.com    // Initialize the entries in the integer rename map to point to the
778839Sandreas.hansson@arm.com    // physical registers of the same index, and consider each register
788839Sandreas.hansson@arm.com    // ready until the first rename occurs.
798839Sandreas.hansson@arm.com    for (RegIndex index = 0; index < numLogicalIntRegs; ++index)
802934Sktlim@umich.edu    {
812934Sktlim@umich.edu        intRenameMap[index].physical_reg = index;
822995Ssaidi@eecs.umich.edu        intScoreboard[index] = 1;
832934Sktlim@umich.edu    }
842934Sktlim@umich.edu
852934Sktlim@umich.edu    // Initialize the rest of the physical registers (the ones that don't
868839Sandreas.hansson@arm.com    // directly map to a logical register) as unready.
878839Sandreas.hansson@arm.com    for (PhysRegIndex index = numLogicalIntRegs;
888839Sandreas.hansson@arm.com         index < numPhysicalIntRegs;
898839Sandreas.hansson@arm.com         ++index)
908839Sandreas.hansson@arm.com    {
918839Sandreas.hansson@arm.com        intScoreboard[index] = 0;
922995Ssaidi@eecs.umich.edu    }
932934Sktlim@umich.edu
942934Sktlim@umich.edu    int float_reg_idx = numPhysicalIntRegs;
952953Sktlim@umich.edu
965478Snate@binkert.org    // Initialize the entries in the floating point rename map to point to
972934Sktlim@umich.edu    // the physical registers of the same index, and consider each register
983449Shsul@eecs.umich.edu    // ready until the first rename occurs.
992934Sktlim@umich.edu    // Although the index refers purely to architected registers, because
1002934Sktlim@umich.edu    // the floating reg indices come after the integer reg indices, they
1012934Sktlim@umich.edu    // may exceed the size of a normal RegIndex (short).
1028839Sandreas.hansson@arm.com    for (PhysRegIndex index = numLogicalIntRegs;
1038706Sandreas.hansson@arm.com         index < numLogicalRegs; ++index)
1042934Sktlim@umich.edu    {
1052934Sktlim@umich.edu        floatRenameMap[index].physical_reg = float_reg_idx++;
1067014SBrad.Beckmann@amd.com    }
1076765SBrad.Beckmann@amd.com
1086765SBrad.Beckmann@amd.com    for (PhysRegIndex index = numPhysicalIntRegs;
1096765SBrad.Beckmann@amd.com         index < numPhysicalIntRegs + numLogicalFloatRegs; ++index)
1106765SBrad.Beckmann@amd.com    {
1116765SBrad.Beckmann@amd.com        floatScoreboard[index] = 1;
1128931Sandreas.hansson@arm.com    }
1137014SBrad.Beckmann@amd.com
1146765SBrad.Beckmann@amd.com    // Initialize the rest of the physical registers (the ones that don't
1156765SBrad.Beckmann@amd.com    // directly map to a logical register) as unready.
1166765SBrad.Beckmann@amd.com    for (PhysRegIndex index = numPhysicalIntRegs + numLogicalFloatRegs;
1176765SBrad.Beckmann@amd.com         index < numPhysicalRegs;
1186765SBrad.Beckmann@amd.com         ++index)
1196765SBrad.Beckmann@amd.com    {
1209036Sandreas.hansson@arm.com        floatScoreboard[index] = 0;
1216893SBrad.Beckmann@amd.com    }
1226893SBrad.Beckmann@amd.com
1236893SBrad.Beckmann@amd.com    // Initialize the entries in the misc register scoreboard to be ready.
1246893SBrad.Beckmann@amd.com    for (PhysRegIndex index = numPhysicalRegs;
1256893SBrad.Beckmann@amd.com         index < numPhysicalRegs + numMiscRegs; ++index)
1266893SBrad.Beckmann@amd.com    {
1278898Snilay@cs.wisc.edu        miscScoreboard[index] = 1;
1286893SBrad.Beckmann@amd.com    }
1296765SBrad.Beckmann@amd.com}
1306765SBrad.Beckmann@amd.com
1316765SBrad.Beckmann@amd.comSimpleRenameMap::~SimpleRenameMap()
1326765SBrad.Beckmann@amd.com{
1336765SBrad.Beckmann@amd.com    // Delete the rename maps as they were allocated with new.
1346765SBrad.Beckmann@amd.com    delete [] intRenameMap;
1358839Sandreas.hansson@arm.com    delete [] floatRenameMap;
1368839Sandreas.hansson@arm.com}
1378839Sandreas.hansson@arm.com
1388839Sandreas.hansson@arm.comvoid
1396765SBrad.Beckmann@amd.comSimpleRenameMap::setFreeList(SimpleFreeList *fl_ptr)
1406893SBrad.Beckmann@amd.com{
1417633SBrad.Beckmann@amd.com    //Setup the interface to the freelist.
1427633SBrad.Beckmann@amd.com    freeList = fl_ptr;
1436893SBrad.Beckmann@amd.com}
1448929Snilay@cs.wisc.edu
1456765SBrad.Beckmann@amd.com
1466765SBrad.Beckmann@amd.com// Don't allow this stage to fault; force that check to the rename stage.
1476765SBrad.Beckmann@amd.com// Simply ask to rename a logical register and get back a new physical
1486765SBrad.Beckmann@amd.com// register index.
1496765SBrad.Beckmann@amd.comSimpleRenameMap::RenameInfo
1506765SBrad.Beckmann@amd.comSimpleRenameMap::rename(RegIndex arch_reg)
1516765SBrad.Beckmann@amd.com{
1526765SBrad.Beckmann@amd.com    PhysRegIndex renamed_reg;
1536765SBrad.Beckmann@amd.com    PhysRegIndex prev_reg;
1546765SBrad.Beckmann@amd.com
1556765SBrad.Beckmann@amd.com    if (arch_reg < numLogicalIntRegs) {
1566765SBrad.Beckmann@amd.com
1576765SBrad.Beckmann@amd.com        // Record the current physical register that is renamed to the
1583584Ssaidi@eecs.umich.edu        // requested architected register.
1598713Sandreas.hansson@arm.com        prev_reg = intRenameMap[arch_reg].physical_reg;
1608713Sandreas.hansson@arm.com
1618713Sandreas.hansson@arm.com        // If it's not referencing the zero register, then mark the register
1628713Sandreas.hansson@arm.com        // as not ready.
1634486Sbinkertn@umich.edu        if (arch_reg != intZeroReg) {
1644486Sbinkertn@umich.edu            // Get a free physical register to rename to.
1654486Sbinkertn@umich.edu            renamed_reg = freeList->getIntReg();
1664486Sbinkertn@umich.edu
1674486Sbinkertn@umich.edu            // Update the integer rename map.
1684486Sbinkertn@umich.edu            intRenameMap[arch_reg].physical_reg = renamed_reg;
1694486Sbinkertn@umich.edu
1703584Ssaidi@eecs.umich.edu            assert(renamed_reg >= 0 && renamed_reg < numPhysicalIntRegs);
1713584Ssaidi@eecs.umich.edu
1723584Ssaidi@eecs.umich.edu            // Mark register as not ready.
1733584Ssaidi@eecs.umich.edu            intScoreboard[renamed_reg] = false;
1743584Ssaidi@eecs.umich.edu        } else {
1759036Sandreas.hansson@arm.com            // Otherwise return the zero register so nothing bad happens.
1769036Sandreas.hansson@arm.com            renamed_reg = intZeroReg;
1779164Sandreas.hansson@arm.com        }
1783743Sgblack@eecs.umich.edu    } else if (arch_reg < numLogicalRegs) {
1794104Ssaidi@eecs.umich.edu        // Subtract off the base offset for floating point registers.
1803743Sgblack@eecs.umich.edu//        arch_reg = arch_reg - numLogicalIntRegs;
1818931Sandreas.hansson@arm.com
1828931Sandreas.hansson@arm.com        // Record the current physical register that is renamed to the
1838931Sandreas.hansson@arm.com        // requested architected register.
1848931Sandreas.hansson@arm.com        prev_reg = floatRenameMap[arch_reg].physical_reg;
1858839Sandreas.hansson@arm.com
1868839Sandreas.hansson@arm.com        // If it's not referencing the zero register, then mark the register
1878839Sandreas.hansson@arm.com        // as not ready.
1888839Sandreas.hansson@arm.com        if (arch_reg != floatZeroReg) {
1898839Sandreas.hansson@arm.com            // Get a free floating point register to rename to.
1908839Sandreas.hansson@arm.com            renamed_reg = freeList->getFloatReg();
1918839Sandreas.hansson@arm.com
1928839Sandreas.hansson@arm.com            // Update the floating point rename map.
1933584Ssaidi@eecs.umich.edu            floatRenameMap[arch_reg].physical_reg = renamed_reg;
1943898Ssaidi@eecs.umich.edu
1953898Ssaidi@eecs.umich.edu            assert(renamed_reg < numPhysicalRegs &&
1968839Sandreas.hansson@arm.com                   renamed_reg >= numPhysicalIntRegs);
1978713Sandreas.hansson@arm.com
1988713Sandreas.hansson@arm.com            // Mark register as not ready.
1998713Sandreas.hansson@arm.com            floatScoreboard[renamed_reg] = false;
2008713Sandreas.hansson@arm.com        } else {
2018713Sandreas.hansson@arm.com            // Otherwise return the zero register so nothing bad happens.
2028713Sandreas.hansson@arm.com            renamed_reg = floatZeroReg;
2038713Sandreas.hansson@arm.com        }
2048713Sandreas.hansson@arm.com    } else {
2058713Sandreas.hansson@arm.com        // Subtract off the base offset for miscellaneous registers.
2068713Sandreas.hansson@arm.com        arch_reg = arch_reg - numLogicalRegs;
2078713Sandreas.hansson@arm.com
2088713Sandreas.hansson@arm.com        // No renaming happens to the misc. registers.  They are simply the
2098713Sandreas.hansson@arm.com        // registers that come after all the  physical registers; thus
2108713Sandreas.hansson@arm.com        // take the base architected register and add the physical registers
2118713Sandreas.hansson@arm.com        // to it.
2128713Sandreas.hansson@arm.com        renamed_reg = arch_reg + numPhysicalRegs;
2138713Sandreas.hansson@arm.com
2148713Sandreas.hansson@arm.com        // Set the previous register to the same register; mainly it must be
2158713Sandreas.hansson@arm.com        // known that the prev reg was outside the range of normal registers
2164103Ssaidi@eecs.umich.edu        // so the free list can avoid adding it.
2174103Ssaidi@eecs.umich.edu        prev_reg = renamed_reg;
2184103Ssaidi@eecs.umich.edu
2193745Sgblack@eecs.umich.edu        assert(renamed_reg < numPhysicalRegs + numMiscRegs);
2203745Sgblack@eecs.umich.edu
2213745Sgblack@eecs.umich.edu        miscScoreboard[renamed_reg] = false;
2223584Ssaidi@eecs.umich.edu    }
2238839Sandreas.hansson@arm.com
2248706Sandreas.hansson@arm.com    return RenameInfo(renamed_reg, prev_reg);
2253584Ssaidi@eecs.umich.edu}
2263584Ssaidi@eecs.umich.edu
2278061SAli.Saidi@ARM.com//Perhaps give this a pair as a return value, of the physical register
2288061SAli.Saidi@ARM.com//and whether or not it's ready.
2298061SAli.Saidi@ARM.comPhysRegIndex
2307586SAli.Saidi@arm.comSimpleRenameMap::lookup(RegIndex arch_reg)
2317586SAli.Saidi@arm.com{
2327586SAli.Saidi@arm.com    if (arch_reg < numLogicalIntRegs) {
2337586SAli.Saidi@arm.com        return intRenameMap[arch_reg].physical_reg;
2347586SAli.Saidi@arm.com    } else if (arch_reg < numLogicalRegs) {
2357586SAli.Saidi@arm.com        // Subtract off the base FP offset.
2367586SAli.Saidi@arm.com//        arch_reg = arch_reg - numLogicalIntRegs;
2377586SAli.Saidi@arm.com
2387586SAli.Saidi@arm.com        return floatRenameMap[arch_reg].physical_reg;
2397586SAli.Saidi@arm.com    } else {
2409036Sandreas.hansson@arm.com        // Subtract off the misc registers offset.
2419036Sandreas.hansson@arm.com        arch_reg = arch_reg - numLogicalRegs;
2427586SAli.Saidi@arm.com
2439164Sandreas.hansson@arm.com        // Misc. regs don't rename, so simply add the base arch reg to
2448839Sandreas.hansson@arm.com        // the number of physical registers.
2458839Sandreas.hansson@arm.com        return numPhysicalRegs + arch_reg;
2467586SAli.Saidi@arm.com    }
2477586SAli.Saidi@arm.com}
2487586SAli.Saidi@arm.com
2497586SAli.Saidi@arm.combool
2507586SAli.Saidi@arm.comSimpleRenameMap::isReady(PhysRegIndex phys_reg)
2517586SAli.Saidi@arm.com{
2527586SAli.Saidi@arm.com    if (phys_reg < numPhysicalIntRegs) {
2538525SAli.Saidi@ARM.com        return intScoreboard[phys_reg];
2548525SAli.Saidi@ARM.com    } else if (phys_reg < numPhysicalRegs) {
2558870SAli.Saidi@ARM.com
2568870SAli.Saidi@ARM.com        // Subtract off the base FP offset.
2578870SAli.Saidi@ARM.com//        phys_reg = phys_reg - numPhysicalIntRegs;
2587586SAli.Saidi@arm.com
2597586SAli.Saidi@arm.com        return floatScoreboard[phys_reg];
2607586SAli.Saidi@arm.com    } else {
2617586SAli.Saidi@arm.com        // Subtract off the misc registers offset.
2628528SAli.Saidi@ARM.com//        phys_reg = phys_reg - numPhysicalRegs;
2638528SAli.Saidi@ARM.com
2648528SAli.Saidi@ARM.com        return miscScoreboard[phys_reg];
2658528SAli.Saidi@ARM.com    }
2668528SAli.Saidi@ARM.com}
2678528SAli.Saidi@ARM.com
2688528SAli.Saidi@ARM.com// In this implementation the miscellaneous registers do not actually rename,
2698528SAli.Saidi@ARM.com// so this function does not allow you to try to change their mappings.
2708528SAli.Saidi@ARM.comvoid
2718061SAli.Saidi@ARM.comSimpleRenameMap::setEntry(RegIndex arch_reg, PhysRegIndex renamed_reg)
2728061SAli.Saidi@ARM.com{
2738061SAli.Saidi@ARM.com    if (arch_reg < numLogicalIntRegs) {
2748931Sandreas.hansson@arm.com        DPRINTF(Rename, "Rename Map: Integer register %i being set to %i.\n",
2758931Sandreas.hansson@arm.com                (int)arch_reg, renamed_reg);
2768061SAli.Saidi@ARM.com
2778528SAli.Saidi@ARM.com        intRenameMap[arch_reg].physical_reg = renamed_reg;
2787586SAli.Saidi@arm.com    } else {
2798894Ssaidi@eecs.umich.edu        assert(arch_reg < (numLogicalIntRegs + numLogicalFloatRegs));
2808870SAli.Saidi@ARM.com
2818870SAli.Saidi@ARM.com        DPRINTF(Rename, "Rename Map: Float register %i being set to %i.\n",
2828870SAli.Saidi@ARM.com                (int)arch_reg - numLogicalIntRegs, renamed_reg);
2838894Ssaidi@eecs.umich.edu
2848528SAli.Saidi@ARM.com        floatRenameMap[arch_reg].physical_reg = renamed_reg;
2858212SAli.Saidi@ARM.com    }
2868528SAli.Saidi@ARM.com}
2878528SAli.Saidi@ARM.com
2888931Sandreas.hansson@arm.comvoid
2898931Sandreas.hansson@arm.comSimpleRenameMap::squash(vector<RegIndex> freed_regs,
2908931Sandreas.hansson@arm.com                        vector<UnmapInfo> unmaps)
2918931Sandreas.hansson@arm.com{
2928870SAli.Saidi@ARM.com    panic("Not sure this function should be called.");
2938528SAli.Saidi@ARM.com
2948528SAli.Saidi@ARM.com    // Not sure the rename map should be able to access the free list
2958287SAli.Saidi@ARM.com    // like this.
2968643Satgutier@umich.edu    while (!freed_regs.empty()) {
2978595SAli.Saidi@ARM.com        RegIndex free_register = freed_regs.back();
2988212SAli.Saidi@ARM.com
2997586SAli.Saidi@arm.com        if (free_register < numPhysicalIntRegs) {
3008839Sandreas.hansson@arm.com            freeList->addIntReg(free_register);
3018713Sandreas.hansson@arm.com        } else {
3027586SAli.Saidi@arm.com            // Subtract off the base FP dependence tag.
3037586SAli.Saidi@arm.com            free_register = free_register - numPhysicalIntRegs;
3047586SAli.Saidi@arm.com            freeList->addFloatReg(free_register);
3057949SAli.Saidi@ARM.com        }
3067586SAli.Saidi@arm.com
3078839Sandreas.hansson@arm.com        freed_regs.pop_back();
3088706Sandreas.hansson@arm.com    }
3097586SAli.Saidi@arm.com
3107586SAli.Saidi@arm.com    // Take unmap info and roll back the rename map.
3117586SAli.Saidi@arm.com}
3125222Sksewell@umich.edu
3135222Sksewell@umich.eduvoid
3145222Sksewell@umich.eduSimpleRenameMap::markAsReady(PhysRegIndex ready_reg)
3155222Sksewell@umich.edu{
3165222Sksewell@umich.edu    DPRINTF(Rename, "Rename map: Marking register %i as ready.\n",
3175222Sksewell@umich.edu            (int)ready_reg);
3185222Sksewell@umich.edu
3195222Sksewell@umich.edu    if (ready_reg < numPhysicalIntRegs) {
3205222Sksewell@umich.edu        assert(ready_reg >= 0);
3215222Sksewell@umich.edu
3225222Sksewell@umich.edu        intScoreboard[ready_reg] = 1;
3239036Sandreas.hansson@arm.com    } else if (ready_reg < numPhysicalRegs) {
3249036Sandreas.hansson@arm.com
3259164Sandreas.hansson@arm.com        // Subtract off the base FP offset.
3268931Sandreas.hansson@arm.com//        ready_reg = ready_reg - numPhysicalIntRegs;
3278839Sandreas.hansson@arm.com
3288839Sandreas.hansson@arm.com        floatScoreboard[ready_reg] = 1;
3298839Sandreas.hansson@arm.com    } else {
3305222Sksewell@umich.edu        //Subtract off the misc registers offset.
3315222Sksewell@umich.edu//        ready_reg = ready_reg - numPhysicalRegs;
3325222Sksewell@umich.edu
3335222Sksewell@umich.edu        miscScoreboard[ready_reg] = 1;
3345222Sksewell@umich.edu    }
3355222Sksewell@umich.edu}
3368839Sandreas.hansson@arm.com
3378839Sandreas.hansson@arm.comint
3388839Sandreas.hansson@arm.comSimpleRenameMap::numFreeEntries()
3398839Sandreas.hansson@arm.com{
3408839Sandreas.hansson@arm.com    int free_int_regs = freeList->numFreeIntRegs();
3418839Sandreas.hansson@arm.com    int free_float_regs = freeList->numFreeFloatRegs();
3425222Sksewell@umich.edu
3435222Sksewell@umich.edu    if (free_int_regs < free_float_regs) {
3445222Sksewell@umich.edu        return free_int_regs;
3455222Sksewell@umich.edu    } else {
3465478Snate@binkert.org        return free_float_regs;
3475222Sksewell@umich.edu    }
3485222Sksewell@umich.edu}
3495222Sksewell@umich.edu