regfile.hh revision 9086:496304c8017d
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Kevin Lim 29 * Gabe Black 30 */ 31 32#ifndef __CPU_O3_REGFILE_HH__ 33#define __CPU_O3_REGFILE_HH__ 34 35#include <vector> 36 37#include "arch/isa_traits.hh" 38#include "arch/kernel_stats.hh" 39#include "arch/types.hh" 40#include "base/trace.hh" 41#include "config/the_isa.hh" 42#include "cpu/o3/comm.hh" 43#include "debug/IEW.hh" 44 45/** 46 * Simple physical register file class. 47 * Right now this is specific to Alpha until we decide if/how to make things 48 * generic enough to support other ISAs. 49 */ 50template <class Impl> 51class PhysRegFile 52{ 53 protected: 54 typedef TheISA::IntReg IntReg; 55 typedef TheISA::FloatReg FloatReg; 56 typedef TheISA::FloatRegBits FloatRegBits; 57 58 typedef union { 59 FloatReg d; 60 FloatRegBits q; 61 } PhysFloatReg; 62 63 // Note that most of the definitions of the IntReg, FloatReg, etc. exist 64 // within the Impl/ISA class and not within this PhysRegFile class. 65 66 // Will make these registers public for now, but they probably should 67 // be private eventually with some accessor functions. 68 public: 69 typedef typename Impl::O3CPU O3CPU; 70 71 /** 72 * Constructs a physical register file with the specified amount of 73 * integer and floating point registers. 74 */ 75 PhysRegFile(O3CPU *_cpu, unsigned _numPhysicalIntRegs, 76 unsigned _numPhysicalFloatRegs); 77 78 /** 79 * Destructor to free resources 80 */ 81 ~PhysRegFile(); 82 83 //Everything below should be pretty well identical to the normal 84 //register file that exists within AlphaISA class. 85 //The duplication is unfortunate but it's better than having 86 //different ways to access certain registers. 87 88 /** Reads an integer register. */ 89 uint64_t readIntReg(PhysRegIndex reg_idx) 90 { 91 assert(reg_idx < numPhysicalIntRegs); 92 93 DPRINTF(IEW, "RegFile: Access to int register %i, has data " 94 "%#x\n", int(reg_idx), intRegFile[reg_idx]); 95 return intRegFile[reg_idx]; 96 } 97 98 /** Reads a floating point register (double precision). */ 99 FloatReg readFloatReg(PhysRegIndex reg_idx) 100 { 101 // Remove the base Float reg dependency. 102 reg_idx = reg_idx - numPhysicalIntRegs; 103 104 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs); 105 106 FloatReg floatReg = floatRegFile[reg_idx].d; 107 108 DPRINTF(IEW, "RegFile: Access to float register %i, has " 109 "data %#x\n", int(reg_idx), floatRegFile[reg_idx].q); 110 111 return floatReg; 112 } 113 114 FloatRegBits readFloatRegBits(PhysRegIndex reg_idx) 115 { 116 // Remove the base Float reg dependency. 117 reg_idx = reg_idx - numPhysicalIntRegs; 118 119 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs); 120 121 FloatRegBits floatRegBits = floatRegFile[reg_idx].q; 122 123 DPRINTF(IEW, "RegFile: Access to float register %i as int, " 124 "has data %#x\n", int(reg_idx), (uint64_t)floatRegBits); 125 126 return floatRegBits; 127 } 128 129 /** Sets an integer register to the given value. */ 130 void setIntReg(PhysRegIndex reg_idx, uint64_t val) 131 { 132 assert(reg_idx < numPhysicalIntRegs); 133 134 DPRINTF(IEW, "RegFile: Setting int register %i to %#x\n", 135 int(reg_idx), val); 136 137 if (reg_idx != TheISA::ZeroReg) 138 intRegFile[reg_idx] = val; 139 } 140 141 /** Sets a double precision floating point register to the given value. */ 142 void setFloatReg(PhysRegIndex reg_idx, FloatReg val) 143 { 144 // Remove the base Float reg dependency. 145 reg_idx = reg_idx - numPhysicalIntRegs; 146 147 assert(reg_idx < numPhysicalFloatRegs); 148 149 DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n", 150 int(reg_idx), (uint64_t)val); 151 152#if THE_ISA == ALPHA_ISA 153 if (reg_idx != TheISA::ZeroReg) 154#endif 155 floatRegFile[reg_idx].d = val; 156 } 157 158 void setFloatRegBits(PhysRegIndex reg_idx, FloatRegBits val) 159 { 160 // Remove the base Float reg dependency. 161 reg_idx = reg_idx - numPhysicalIntRegs; 162 163 assert(reg_idx < numPhysicalFloatRegs); 164 165 DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n", 166 int(reg_idx), (uint64_t)val); 167 168 floatRegFile[reg_idx].q = val; 169 } 170 171 public: 172 /** (signed) integer register file. */ 173 IntReg *intRegFile; 174 175 /** Floating point register file. */ 176 PhysFloatReg *floatRegFile; 177 178 private: 179 int intrflag; // interrupt flag 180 181 private: 182 /** CPU pointer. */ 183 O3CPU *cpu; 184 185 public: 186 /** Number of physical integer registers. */ 187 unsigned numPhysicalIntRegs; 188 /** Number of physical floating point registers. */ 189 unsigned numPhysicalFloatRegs; 190}; 191 192template <class Impl> 193PhysRegFile<Impl>::PhysRegFile(O3CPU *_cpu, unsigned _numPhysicalIntRegs, 194 unsigned _numPhysicalFloatRegs) 195 : cpu(_cpu), numPhysicalIntRegs(_numPhysicalIntRegs), 196 numPhysicalFloatRegs(_numPhysicalFloatRegs) 197{ 198 intRegFile = new IntReg[numPhysicalIntRegs]; 199 floatRegFile = new PhysFloatReg[numPhysicalFloatRegs]; 200 201 memset(intRegFile, 0, sizeof(IntReg) * numPhysicalIntRegs); 202 memset(floatRegFile, 0, sizeof(PhysFloatReg) * numPhysicalFloatRegs); 203} 204 205template <class Impl> 206PhysRegFile<Impl>::~PhysRegFile() 207{ 208 delete intRegFile; 209 delete floatRegFile; 210} 211 212#endif 213