regfile.hh revision 8794:e2ac2b7164dd
113511Sgabeblack@google.com/* 213511Sgabeblack@google.com * Copyright (c) 2004-2005 The Regents of The University of Michigan 313511Sgabeblack@google.com * All rights reserved. 413511Sgabeblack@google.com * 513511Sgabeblack@google.com * Redistribution and use in source and binary forms, with or without 613511Sgabeblack@google.com * modification, are permitted provided that the following conditions are 713511Sgabeblack@google.com * met: redistributions of source code must retain the above copyright 813511Sgabeblack@google.com * notice, this list of conditions and the following disclaimer; 913511Sgabeblack@google.com * redistributions in binary form must reproduce the above copyright 1013511Sgabeblack@google.com * notice, this list of conditions and the following disclaimer in the 1113511Sgabeblack@google.com * documentation and/or other materials provided with the distribution; 1213511Sgabeblack@google.com * neither the name of the copyright holders nor the names of its 1313511Sgabeblack@google.com * contributors may be used to endorse or promote products derived from 1413511Sgabeblack@google.com * this software without specific prior written permission. 1513511Sgabeblack@google.com * 1613511Sgabeblack@google.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1713511Sgabeblack@google.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1813511Sgabeblack@google.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1913511Sgabeblack@google.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2013511Sgabeblack@google.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2113511Sgabeblack@google.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2213511Sgabeblack@google.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2313511Sgabeblack@google.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2413511Sgabeblack@google.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2513511Sgabeblack@google.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2613511Sgabeblack@google.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2713511Sgabeblack@google.com * 2813511Sgabeblack@google.com * Authors: Kevin Lim 2913511Sgabeblack@google.com * Gabe Black 3013511Sgabeblack@google.com */ 3113511Sgabeblack@google.com 3213511Sgabeblack@google.com#ifndef __CPU_O3_REGFILE_HH__ 3313511Sgabeblack@google.com#define __CPU_O3_REGFILE_HH__ 3413511Sgabeblack@google.com 3513511Sgabeblack@google.com#include <vector> 3613511Sgabeblack@google.com 3713511Sgabeblack@google.com#include "arch/isa_traits.hh" 3813511Sgabeblack@google.com#include "arch/kernel_stats.hh" 3913511Sgabeblack@google.com#include "arch/types.hh" 4013511Sgabeblack@google.com#include "base/trace.hh" 4113511Sgabeblack@google.com#include "config/the_isa.hh" 4213511Sgabeblack@google.com#include "cpu/o3/comm.hh" 4313511Sgabeblack@google.com#include "debug/IEW.hh" 4413511Sgabeblack@google.com 4513511Sgabeblack@google.com/** 4613511Sgabeblack@google.com * Simple physical register file class. 4713511Sgabeblack@google.com * Right now this is specific to Alpha until we decide if/how to make things 4813511Sgabeblack@google.com * generic enough to support other ISAs. 4913511Sgabeblack@google.com */ 5013511Sgabeblack@google.comtemplate <class Impl> 5113511Sgabeblack@google.comclass PhysRegFile 5213511Sgabeblack@google.com{ 5313511Sgabeblack@google.com protected: 5413511Sgabeblack@google.com typedef TheISA::IntReg IntReg; 5513511Sgabeblack@google.com typedef TheISA::FloatReg FloatReg; 5613511Sgabeblack@google.com typedef TheISA::FloatRegBits FloatRegBits; 5713511Sgabeblack@google.com 5813511Sgabeblack@google.com typedef union { 5913511Sgabeblack@google.com FloatReg d; 6013511Sgabeblack@google.com FloatRegBits q; 6113511Sgabeblack@google.com } PhysFloatReg; 6213511Sgabeblack@google.com 6313511Sgabeblack@google.com // Note that most of the definitions of the IntReg, FloatReg, etc. exist 6413511Sgabeblack@google.com // within the Impl/ISA class and not within this PhysRegFile class. 6513511Sgabeblack@google.com 6613511Sgabeblack@google.com // Will make these registers public for now, but they probably should 6713511Sgabeblack@google.com // be private eventually with some accessor functions. 6813511Sgabeblack@google.com public: 6913511Sgabeblack@google.com typedef typename Impl::O3CPU O3CPU; 7013511Sgabeblack@google.com 7113511Sgabeblack@google.com /** 7213511Sgabeblack@google.com * Constructs a physical register file with the specified amount of 7313511Sgabeblack@google.com * integer and floating point registers. 7413511Sgabeblack@google.com */ 7513511Sgabeblack@google.com PhysRegFile(O3CPU *_cpu, unsigned _numPhysicalIntRegs, 7613511Sgabeblack@google.com unsigned _numPhysicalFloatRegs); 7713511Sgabeblack@google.com 7813511Sgabeblack@google.com //Everything below should be pretty well identical to the normal 7913511Sgabeblack@google.com //register file that exists within AlphaISA class. 8013511Sgabeblack@google.com //The duplication is unfortunate but it's better than having 8113511Sgabeblack@google.com //different ways to access certain registers. 8213511Sgabeblack@google.com 8313511Sgabeblack@google.com /** Reads an integer register. */ 8413511Sgabeblack@google.com uint64_t readIntReg(PhysRegIndex reg_idx) 8513511Sgabeblack@google.com { 8613511Sgabeblack@google.com assert(reg_idx < numPhysicalIntRegs); 8713511Sgabeblack@google.com 8813511Sgabeblack@google.com DPRINTF(IEW, "RegFile: Access to int register %i, has data " 8913511Sgabeblack@google.com "%#x\n", int(reg_idx), intRegFile[reg_idx]); 9013511Sgabeblack@google.com return intRegFile[reg_idx]; 9113511Sgabeblack@google.com } 9213511Sgabeblack@google.com 9313511Sgabeblack@google.com /** Reads a floating point register (double precision). */ 9413511Sgabeblack@google.com FloatReg readFloatReg(PhysRegIndex reg_idx) 95 { 96 // Remove the base Float reg dependency. 97 reg_idx = reg_idx - numPhysicalIntRegs; 98 99 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs); 100 101 FloatReg floatReg = floatRegFile[reg_idx].d; 102 103 DPRINTF(IEW, "RegFile: Access to float register %i, has " 104 "data %#x\n", int(reg_idx), floatRegFile[reg_idx].q); 105 106 return floatReg; 107 } 108 109 FloatRegBits readFloatRegBits(PhysRegIndex reg_idx) 110 { 111 // Remove the base Float reg dependency. 112 reg_idx = reg_idx - numPhysicalIntRegs; 113 114 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs); 115 116 FloatRegBits floatRegBits = floatRegFile[reg_idx].q; 117 118 DPRINTF(IEW, "RegFile: Access to float register %i as int, " 119 "has data %#x\n", int(reg_idx), (uint64_t)floatRegBits); 120 121 return floatRegBits; 122 } 123 124 /** Sets an integer register to the given value. */ 125 void setIntReg(PhysRegIndex reg_idx, uint64_t val) 126 { 127 assert(reg_idx < numPhysicalIntRegs); 128 129 DPRINTF(IEW, "RegFile: Setting int register %i to %#x\n", 130 int(reg_idx), val); 131 132 if (reg_idx != TheISA::ZeroReg) 133 intRegFile[reg_idx] = val; 134 } 135 136 /** Sets a double precision floating point register to the given value. */ 137 void setFloatReg(PhysRegIndex reg_idx, FloatReg val) 138 { 139 // Remove the base Float reg dependency. 140 reg_idx = reg_idx - numPhysicalIntRegs; 141 142 assert(reg_idx < numPhysicalFloatRegs); 143 144 DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n", 145 int(reg_idx), (uint64_t)val); 146 147#if THE_ISA == ALPHA_ISA 148 if (reg_idx != TheISA::ZeroReg) 149#endif 150 floatRegFile[reg_idx].d = val; 151 } 152 153 void setFloatRegBits(PhysRegIndex reg_idx, FloatRegBits val) 154 { 155 // Remove the base Float reg dependency. 156 reg_idx = reg_idx - numPhysicalIntRegs; 157 158 assert(reg_idx < numPhysicalFloatRegs); 159 160 DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n", 161 int(reg_idx), (uint64_t)val); 162 163 floatRegFile[reg_idx].q = val; 164 } 165 166 public: 167 /** (signed) integer register file. */ 168 IntReg *intRegFile; 169 170 /** Floating point register file. */ 171 PhysFloatReg *floatRegFile; 172 173 private: 174 int intrflag; // interrupt flag 175 176 private: 177 /** CPU pointer. */ 178 O3CPU *cpu; 179 180 public: 181 /** Number of physical integer registers. */ 182 unsigned numPhysicalIntRegs; 183 /** Number of physical floating point registers. */ 184 unsigned numPhysicalFloatRegs; 185}; 186 187template <class Impl> 188PhysRegFile<Impl>::PhysRegFile(O3CPU *_cpu, unsigned _numPhysicalIntRegs, 189 unsigned _numPhysicalFloatRegs) 190 : cpu(_cpu), numPhysicalIntRegs(_numPhysicalIntRegs), 191 numPhysicalFloatRegs(_numPhysicalFloatRegs) 192{ 193 intRegFile = new IntReg[numPhysicalIntRegs]; 194 floatRegFile = new PhysFloatReg[numPhysicalFloatRegs]; 195 196 memset(intRegFile, 0, sizeof(IntReg) * numPhysicalIntRegs); 197 memset(floatRegFile, 0, sizeof(PhysFloatReg) * numPhysicalFloatRegs); 198} 199 200#endif 201