regfile.hh revision 6329:5d8b91875859
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Kevin Lim 29 * Gabe Black 30 */ 31 32#ifndef __CPU_O3_REGFILE_HH__ 33#define __CPU_O3_REGFILE_HH__ 34 35#include "arch/isa_traits.hh" 36#include "arch/types.hh" 37#include "base/trace.hh" 38#include "config/full_system.hh" 39#include "cpu/o3/comm.hh" 40 41#if FULL_SYSTEM 42#include "arch/kernel_stats.hh" 43#endif 44 45#include <vector> 46 47/** 48 * Simple physical register file class. 49 * Right now this is specific to Alpha until we decide if/how to make things 50 * generic enough to support other ISAs. 51 */ 52template <class Impl> 53class PhysRegFile 54{ 55 protected: 56 typedef TheISA::IntReg IntReg; 57 typedef TheISA::FloatReg FloatReg; 58 typedef TheISA::FloatRegBits FloatRegBits; 59 60 typedef union { 61 FloatReg d; 62 FloatRegBits q; 63 } PhysFloatReg; 64 65 // Note that most of the definitions of the IntReg, FloatReg, etc. exist 66 // within the Impl/ISA class and not within this PhysRegFile class. 67 68 // Will make these registers public for now, but they probably should 69 // be private eventually with some accessor functions. 70 public: 71 typedef typename Impl::O3CPU O3CPU; 72 73 /** 74 * Constructs a physical register file with the specified amount of 75 * integer and floating point registers. 76 */ 77 PhysRegFile(O3CPU *_cpu, unsigned _numPhysicalIntRegs, 78 unsigned _numPhysicalFloatRegs); 79 80 //Everything below should be pretty well identical to the normal 81 //register file that exists within AlphaISA class. 82 //The duplication is unfortunate but it's better than having 83 //different ways to access certain registers. 84 85 /** Reads an integer register. */ 86 uint64_t readIntReg(PhysRegIndex reg_idx) 87 { 88 assert(reg_idx < numPhysicalIntRegs); 89 90 DPRINTF(IEW, "RegFile: Access to int register %i, has data " 91 "%#x\n", int(reg_idx), intRegFile[reg_idx]); 92 return intRegFile[reg_idx]; 93 } 94 95 /** Reads a floating point register (double precision). */ 96 FloatReg readFloatReg(PhysRegIndex reg_idx) 97 { 98 // Remove the base Float reg dependency. 99 reg_idx = reg_idx - numPhysicalIntRegs; 100 101 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs); 102 103 FloatReg floatReg = floatRegFile[reg_idx].d; 104 105 DPRINTF(IEW, "RegFile: Access to float register %i, has " 106 "data %#x\n", int(reg_idx), floatRegFile[reg_idx].q); 107 108 return floatReg; 109 } 110 111 FloatRegBits readFloatRegBits(PhysRegIndex reg_idx) 112 { 113 // Remove the base Float reg dependency. 114 reg_idx = reg_idx - numPhysicalIntRegs; 115 116 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs); 117 118 FloatRegBits floatRegBits = floatRegFile[reg_idx].q; 119 120 DPRINTF(IEW, "RegFile: Access to float register %i as int, " 121 "has data %#x\n", int(reg_idx), (uint64_t)floatRegBits); 122 123 return floatRegBits; 124 } 125 126 /** Sets an integer register to the given value. */ 127 void setIntReg(PhysRegIndex reg_idx, uint64_t val) 128 { 129 assert(reg_idx < numPhysicalIntRegs); 130 131 DPRINTF(IEW, "RegFile: Setting int register %i to %#x\n", 132 int(reg_idx), val); 133 134 if (reg_idx != TheISA::ZeroReg) 135 intRegFile[reg_idx] = val; 136 } 137 138 /** Sets a double precision floating point register to the given value. */ 139 void setFloatReg(PhysRegIndex reg_idx, FloatReg val) 140 { 141 // Remove the base Float reg dependency. 142 reg_idx = reg_idx - numPhysicalIntRegs; 143 144 assert(reg_idx < numPhysicalFloatRegs); 145 146 DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n", 147 int(reg_idx), (uint64_t)val); 148 149#if THE_ISA == ALPHA_ISA 150 if (reg_idx != TheISA::ZeroReg) 151#endif 152 floatRegFile[reg_idx].d = val; 153 } 154 155 void setFloatRegBits(PhysRegIndex reg_idx, FloatRegBits val) 156 { 157 // Remove the base Float reg dependency. 158 reg_idx = reg_idx - numPhysicalIntRegs; 159 160 assert(reg_idx < numPhysicalFloatRegs); 161 162 DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n", 163 int(reg_idx), (uint64_t)val); 164 165 floatRegFile[reg_idx].q = val; 166 } 167 168 public: 169 /** (signed) integer register file. */ 170 IntReg *intRegFile; 171 172 /** Floating point register file. */ 173 PhysFloatReg *floatRegFile; 174 175#if FULL_SYSTEM 176 private: 177 int intrflag; // interrupt flag 178#endif 179 180 private: 181 /** CPU pointer. */ 182 O3CPU *cpu; 183 184 public: 185 /** Number of physical integer registers. */ 186 unsigned numPhysicalIntRegs; 187 /** Number of physical floating point registers. */ 188 unsigned numPhysicalFloatRegs; 189}; 190 191template <class Impl> 192PhysRegFile<Impl>::PhysRegFile(O3CPU *_cpu, unsigned _numPhysicalIntRegs, 193 unsigned _numPhysicalFloatRegs) 194 : cpu(_cpu), numPhysicalIntRegs(_numPhysicalIntRegs), 195 numPhysicalFloatRegs(_numPhysicalFloatRegs) 196{ 197 intRegFile = new IntReg[numPhysicalIntRegs]; 198 floatRegFile = new PhysFloatReg[numPhysicalFloatRegs]; 199 200 memset(intRegFile, 0, sizeof(IntReg) * numPhysicalIntRegs); 201 memset(floatRegFile, 0, sizeof(PhysFloatReg) * numPhysicalFloatRegs); 202} 203 204#endif 205