regfile.hh revision 2292
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#ifndef __CPU_O3_REGFILE_HH__ 30#define __CPU_O3_REGFILE_HH__ 31 32#include "arch/isa_traits.hh" 33#include "arch/faults.hh" 34#include "base/trace.hh" 35#include "config/full_system.hh" 36#include "cpu/o3/comm.hh" 37 38#if FULL_SYSTEM 39#include "kern/kernel_stats.hh" 40 41#endif 42 43#include <vector> 44 45/** 46 * Simple physical register file class. 47 * This really only depends on the ISA, and not the Impl. Things that are 48 * in the ifdef FULL_SYSTEM are pretty dependent on the ISA, and probably 49 * should go in the AlphaFullCPU. 50 */ 51template <class Impl> 52class PhysRegFile 53{ 54 protected: 55 typedef TheISA::IntReg IntReg; 56 typedef TheISA::FloatReg FloatReg; 57 typedef TheISA::MiscRegFile MiscRegFile; 58 typedef TheISA::MiscReg MiscReg; 59 // Note that most of the definitions of the IntReg, FloatReg, etc. exist 60 // within the Impl/ISA class and not within this PhysRegFile class. 61 62 // Will make these registers public for now, but they probably should 63 // be private eventually with some accessor functions. 64 public: 65 typedef typename Impl::FullCPU FullCPU; 66 67 /** 68 * Constructs a physical register file with the specified amount of 69 * integer and floating point registers. 70 */ 71 PhysRegFile(unsigned _numPhysicalIntRegs, 72 unsigned _numPhysicalFloatRegs); 73 74 //Everything below should be pretty well identical to the normal 75 //register file that exists within AlphaISA class. 76 //The duplication is unfortunate but it's better than having 77 //different ways to access certain registers. 78 79 //Add these in later when everything else is in place 80// void serialize(std::ostream &os); 81// void unserialize(Checkpoint *cp, const std::string §ion); 82 83 /** Reads an integer register. */ 84 uint64_t readIntReg(PhysRegIndex reg_idx) 85 { 86 assert(reg_idx < numPhysicalIntRegs); 87 88 DPRINTF(IEW, "RegFile: Access to int register %i, has data " 89 "%i\n", int(reg_idx), intRegFile[reg_idx]); 90 return intRegFile[reg_idx]; 91 } 92 93 /** Reads a floating point register (single precision). */ 94 float readFloatRegSingle(PhysRegIndex reg_idx) 95 { 96 // Remove the base Float reg dependency. 97 reg_idx = reg_idx - numPhysicalIntRegs; 98 99 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs); 100 101 DPRINTF(IEW, "RegFile: Access to float register %i as single, has " 102 "data %8.8f\n", int(reg_idx), (float)floatRegFile[reg_idx].d); 103 104 return (float)floatRegFile[reg_idx].d; 105 } 106 107 /** Reads a floating point register (double precision). */ 108 double readFloatRegDouble(PhysRegIndex reg_idx) 109 { 110 // Remove the base Float reg dependency. 111 reg_idx = reg_idx - numPhysicalIntRegs; 112 113 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs); 114 115 DPRINTF(IEW, "RegFile: Access to float register %i as double, has " 116 " data %8.8f\n", int(reg_idx), floatRegFile[reg_idx].d); 117 118 return floatRegFile[reg_idx].d; 119 } 120 121 /** Reads a floating point register as an integer. */ 122 uint64_t readFloatRegInt(PhysRegIndex reg_idx) 123 { 124 // Remove the base Float reg dependency. 125 reg_idx = reg_idx - numPhysicalIntRegs; 126 127 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs); 128 129 DPRINTF(IEW, "RegFile: Access to float register %i as int, has data " 130 "%lli\n", int(reg_idx), floatRegFile[reg_idx].q); 131 132 return floatRegFile[reg_idx].q; 133 } 134 135 /** Sets an integer register to the given value. */ 136 void setIntReg(PhysRegIndex reg_idx, uint64_t val) 137 { 138 assert(reg_idx < numPhysicalIntRegs); 139 140 DPRINTF(IEW, "RegFile: Setting int register %i to %lli\n", 141 int(reg_idx), val); 142 143 if (reg_idx != TheISA::ZeroReg) 144 intRegFile[reg_idx] = val; 145 } 146 147 /** Sets a single precision floating point register to the given value. */ 148 void setFloatRegSingle(PhysRegIndex reg_idx, float val) 149 { 150 // Remove the base Float reg dependency. 151 reg_idx = reg_idx - numPhysicalIntRegs; 152 153 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs); 154 155 DPRINTF(IEW, "RegFile: Setting float register %i to %8.8f\n", 156 int(reg_idx), val); 157 158 if (reg_idx != TheISA::ZeroReg) 159 floatRegFile[reg_idx].d = (double)val; 160 } 161 162 /** Sets a double precision floating point register to the given value. */ 163 void setFloatRegDouble(PhysRegIndex reg_idx, double val) 164 { 165 // Remove the base Float reg dependency. 166 reg_idx = reg_idx - numPhysicalIntRegs; 167 168 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs); 169 170 DPRINTF(IEW, "RegFile: Setting float register %i to %8.8f\n", 171 int(reg_idx), val); 172 173 if (reg_idx != TheISA::ZeroReg) 174 floatRegFile[reg_idx].d = val; 175 } 176 177 /** Sets a floating point register to the given integer value. */ 178 void setFloatRegInt(PhysRegIndex reg_idx, uint64_t val) 179 { 180 // Remove the base Float reg dependency. 181 reg_idx = reg_idx - numPhysicalIntRegs; 182 183 assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs); 184 185 DPRINTF(IEW, "RegFile: Setting float register %i to %lli\n", 186 int(reg_idx), val); 187 188 if (reg_idx != TheISA::ZeroReg) 189 floatRegFile[reg_idx].q = val; 190 } 191 192 //Consider leaving this stuff and below in some implementation specific 193 //file as opposed to the general register file. Or have a derived class. 194 MiscReg readMiscReg(int misc_reg, unsigned thread_id) 195 { 196 return miscRegs[thread_id].readReg(misc_reg); 197 } 198 199 MiscReg readMiscRegWithEffect(int misc_reg, Fault &fault, 200 unsigned thread_id) 201 { 202 return miscRegs[thread_id].readRegWithEffect(misc_reg, fault, 203 cpu->xcProxies[thread_id]); 204 } 205 206 Fault setMiscReg(int misc_reg, const MiscReg &val, unsigned thread_id) 207 { 208 return miscRegs[thread_id].setReg(misc_reg, val); 209 } 210 211 Fault setMiscRegWithEffect(int misc_reg, const MiscReg &val, 212 unsigned thread_id) 213 { 214 return miscRegs[thread_id].setRegWithEffect(misc_reg, val, 215 cpu->xcProxies[thread_id]); 216 } 217 218#if FULL_SYSTEM 219 int readIntrFlag() { return intrflag; } 220 /** Sets an interrupt flag. */ 221 void setIntrFlag(int val) { intrflag = val; } 222#endif 223 224 public: 225 /** (signed) integer register file. */ 226 std::vector<IntReg> intRegFile; 227 228 /** Floating point register file. */ 229 std::vector<FloatReg> floatRegFile; 230 231 /** Miscellaneous register file. */ 232 MiscRegFile miscRegs[Impl::MaxThreads]; 233 234#if FULL_SYSTEM 235 private: 236 int intrflag; // interrupt flag 237#endif 238 239 private: 240 /** CPU pointer. */ 241 FullCPU *cpu; 242 243 public: 244 /** Sets the CPU pointer. */ 245 void setCPU(FullCPU *cpu_ptr) { cpu = cpu_ptr; } 246 247 /** Number of physical integer registers. */ 248 unsigned numPhysicalIntRegs; 249 /** Number of physical floating point registers. */ 250 unsigned numPhysicalFloatRegs; 251}; 252 253template <class Impl> 254PhysRegFile<Impl>::PhysRegFile(unsigned _numPhysicalIntRegs, 255 unsigned _numPhysicalFloatRegs) 256 : numPhysicalIntRegs(_numPhysicalIntRegs), 257 numPhysicalFloatRegs(_numPhysicalFloatRegs) 258{ 259 intRegFile.resize(numPhysicalIntRegs); 260 floatRegFile.resize(numPhysicalFloatRegs); 261 262 //memset(intRegFile, 0, sizeof(*intRegFile)); 263 //memset(floatRegFile, 0, sizeof(*floatRegFile)); 264} 265 266#endif 267