lsq_impl.hh revision 3647
12292SN/A/*
22727Sktlim@umich.edu * Copyright (c) 2005-2006 The Regents of The University of Michigan
32292SN/A * All rights reserved.
42292SN/A *
52292SN/A * Redistribution and use in source and binary forms, with or without
62292SN/A * modification, are permitted provided that the following conditions are
72292SN/A * met: redistributions of source code must retain the above copyright
82292SN/A * notice, this list of conditions and the following disclaimer;
92292SN/A * redistributions in binary form must reproduce the above copyright
102292SN/A * notice, this list of conditions and the following disclaimer in the
112292SN/A * documentation and/or other materials provided with the distribution;
122292SN/A * neither the name of the copyright holders nor the names of its
132292SN/A * contributors may be used to endorse or promote products derived from
142292SN/A * this software without specific prior written permission.
152292SN/A *
162292SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172292SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182292SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192292SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202292SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212292SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222292SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232292SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242292SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252292SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262292SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272689Sktlim@umich.edu *
282689Sktlim@umich.edu * Authors: Korey Sewell
292292SN/A */
302292SN/A
312329SN/A#include <algorithm>
322980Sgblack@eecs.umich.edu#include <list>
332329SN/A#include <string>
342329SN/A
352292SN/A#include "cpu/o3/lsq.hh"
362292SN/A
372292SN/Atemplate <class Impl>
382907Sktlim@umich.eduTick
392907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvAtomic(PacketPtr pkt)
402907Sktlim@umich.edu{
412907Sktlim@umich.edu    panic("O3CPU model does not work with atomic mode!");
422907Sktlim@umich.edu    return curTick;
432907Sktlim@umich.edu}
442907Sktlim@umich.edu
452907Sktlim@umich.edutemplate <class Impl>
462907Sktlim@umich.eduvoid
472907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvFunctional(PacketPtr pkt)
482907Sktlim@umich.edu{
493639Sktlim@umich.edu    DPRINTF(LSQ, "LSQ doesn't update things on a recvFunctional.");
502907Sktlim@umich.edu}
512907Sktlim@umich.edu
522907Sktlim@umich.edutemplate <class Impl>
532907Sktlim@umich.eduvoid
542907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvStatusChange(Status status)
552907Sktlim@umich.edu{
563647Srdreslin@umich.edu    if (status == RangeChange) {
573647Srdreslin@umich.edu        if (!snoopRangeSent) {
583647Srdreslin@umich.edu            snoopRangeSent = true;
593647Srdreslin@umich.edu            sendStatusChange(Port::RangeChange);
603647Srdreslin@umich.edu        }
612907Sktlim@umich.edu        return;
623647Srdreslin@umich.edu    }
632907Sktlim@umich.edu    panic("O3CPU doesn't expect recvStatusChange callback!");
642907Sktlim@umich.edu}
652907Sktlim@umich.edu
662907Sktlim@umich.edutemplate <class Impl>
672907Sktlim@umich.edubool
682907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvTiming(PacketPtr pkt)
692907Sktlim@umich.edu{
703310Srdreslin@umich.edu    if (pkt->isResponse()) {
713310Srdreslin@umich.edu        lsq->thread[pkt->req->getThreadNum()].completeDataAccess(pkt);
723310Srdreslin@umich.edu    }
733310Srdreslin@umich.edu    else {
743310Srdreslin@umich.edu    //else it is a coherence request, maybe you need to do something
753339Srdreslin@umich.edu        warn("Recieved a coherence request (Invalidate?), 03CPU doesn't"
763310Srdreslin@umich.edu             "update LSQ for these\n");
773310Srdreslin@umich.edu    }
782907Sktlim@umich.edu    return true;
792907Sktlim@umich.edu}
802907Sktlim@umich.edu
812907Sktlim@umich.edutemplate <class Impl>
822907Sktlim@umich.eduvoid
832907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvRetry()
842907Sktlim@umich.edu{
853014Srdreslin@umich.edu    if (lsq->retryTid == -1)
863014Srdreslin@umich.edu    {
873014Srdreslin@umich.edu        //Squashed, so drop it
883014Srdreslin@umich.edu        return;
893014Srdreslin@umich.edu    }
902907Sktlim@umich.edu    lsq->thread[lsq->retryTid].recvRetry();
912907Sktlim@umich.edu    // Speculatively clear the retry Tid.  This will get set again if
922907Sktlim@umich.edu    // the LSQUnit was unable to complete its access.
932907Sktlim@umich.edu    lsq->retryTid = -1;
942907Sktlim@umich.edu}
952907Sktlim@umich.edu
962907Sktlim@umich.edutemplate <class Impl>
972292SN/ALSQ<Impl>::LSQ(Params *params)
982907Sktlim@umich.edu    : dcachePort(this), LQEntries(params->LQEntries),
992907Sktlim@umich.edu      SQEntries(params->SQEntries), numThreads(params->numberOfThreads),
1002907Sktlim@umich.edu      retryTid(-1)
1012292SN/A{
1022292SN/A    DPRINTF(LSQ, "Creating LSQ object.\n");
1032292SN/A
1043647Srdreslin@umich.edu    dcachePort.snoopRangeSent = false;
1053647Srdreslin@umich.edu
1062292SN/A    //**********************************************/
1072292SN/A    //************ Handle SMT Parameters ***********/
1082292SN/A    //**********************************************/
1092980Sgblack@eecs.umich.edu    std::string policy = params->smtLSQPolicy;
1102292SN/A
1112292SN/A    //Convert string to lowercase
1122292SN/A    std::transform(policy.begin(), policy.end(), policy.begin(),
1132292SN/A                   (int(*)(int)) tolower);
1142292SN/A
1152292SN/A    //Figure out fetch policy
1162292SN/A    if (policy == "dynamic") {
1172292SN/A        lsqPolicy = Dynamic;
1182292SN/A
1192292SN/A        maxLQEntries = LQEntries;
1202292SN/A        maxSQEntries = SQEntries;
1212292SN/A
1222292SN/A        DPRINTF(LSQ, "LSQ sharing policy set to Dynamic\n");
1232292SN/A
1242292SN/A    } else if (policy == "partitioned") {
1252292SN/A        lsqPolicy = Partitioned;
1262292SN/A
1272292SN/A        //@todo:make work if part_amt doesnt divide evenly.
1282292SN/A        maxLQEntries = LQEntries / numThreads;
1292292SN/A        maxSQEntries = SQEntries / numThreads;
1302292SN/A
1312292SN/A        DPRINTF(Fetch, "LSQ sharing policy set to Partitioned: "
1322292SN/A                "%i entries per LQ | %i entries per SQ",
1332292SN/A                maxLQEntries,maxSQEntries);
1342292SN/A
1352292SN/A    } else if (policy == "threshold") {
1362292SN/A        lsqPolicy = Threshold;
1372292SN/A
1382292SN/A        assert(params->smtLSQThreshold > LQEntries);
1392292SN/A        assert(params->smtLSQThreshold > SQEntries);
1402292SN/A
1412292SN/A        //Divide up by threshold amount
1422292SN/A        //@todo: Should threads check the max and the total
1432292SN/A        //amount of the LSQ
1442292SN/A        maxLQEntries  = params->smtLSQThreshold;
1452292SN/A        maxSQEntries  = params->smtLSQThreshold;
1462292SN/A
1472292SN/A        DPRINTF(LSQ, "LSQ sharing policy set to Threshold: "
1482292SN/A                "%i entries per LQ | %i entries per SQ",
1492292SN/A                maxLQEntries,maxSQEntries);
1502292SN/A
1512292SN/A    } else {
1522292SN/A        assert(0 && "Invalid LSQ Sharing Policy.Options Are:{Dynamic,"
1532292SN/A                    "Partitioned, Threshold}");
1542292SN/A    }
1552292SN/A
1562292SN/A    //Initialize LSQs
1572292SN/A    for (int tid=0; tid < numThreads; tid++) {
1582907Sktlim@umich.edu        thread[tid].init(params, this, maxLQEntries, maxSQEntries, tid);
1592907Sktlim@umich.edu        thread[tid].setDcachePort(&dcachePort);
1602292SN/A    }
1612292SN/A}
1622292SN/A
1632292SN/A
1642292SN/Atemplate<class Impl>
1652292SN/Astd::string
1662292SN/ALSQ<Impl>::name() const
1672292SN/A{
1682292SN/A    return iewStage->name() + ".lsq";
1692292SN/A}
1702292SN/A
1712292SN/Atemplate<class Impl>
1722292SN/Avoid
1732727Sktlim@umich.eduLSQ<Impl>::regStats()
1742727Sktlim@umich.edu{
1752727Sktlim@umich.edu    //Initialize LSQs
1762727Sktlim@umich.edu    for (int tid=0; tid < numThreads; tid++) {
1772727Sktlim@umich.edu        thread[tid].regStats();
1782727Sktlim@umich.edu    }
1792727Sktlim@umich.edu}
1802727Sktlim@umich.edu
1812727Sktlim@umich.edutemplate<class Impl>
1822727Sktlim@umich.eduvoid
1832980Sgblack@eecs.umich.eduLSQ<Impl>::setActiveThreads(std::list<unsigned> *at_ptr)
1842292SN/A{
1852292SN/A    activeThreads = at_ptr;
1862292SN/A    assert(activeThreads != 0);
1872292SN/A}
1882292SN/A
1892292SN/Atemplate<class Impl>
1902292SN/Avoid
1912733Sktlim@umich.eduLSQ<Impl>::setCPU(O3CPU *cpu_ptr)
1922292SN/A{
1932292SN/A    cpu = cpu_ptr;
1942292SN/A
1952907Sktlim@umich.edu    dcachePort.setName(name());
1962907Sktlim@umich.edu
1972292SN/A    for (int tid=0; tid < numThreads; tid++) {
1982292SN/A        thread[tid].setCPU(cpu_ptr);
1992292SN/A    }
2002292SN/A}
2012292SN/A
2022292SN/Atemplate<class Impl>
2032292SN/Avoid
2042292SN/ALSQ<Impl>::setIEW(IEW *iew_ptr)
2052292SN/A{
2062292SN/A    iewStage = iew_ptr;
2072292SN/A
2082292SN/A    for (int tid=0; tid < numThreads; tid++) {
2092292SN/A        thread[tid].setIEW(iew_ptr);
2102292SN/A    }
2112292SN/A}
2122292SN/A
2132292SN/Atemplate <class Impl>
2142307SN/Avoid
2152307SN/ALSQ<Impl>::switchOut()
2162307SN/A{
2172307SN/A    for (int tid = 0; tid < numThreads; tid++) {
2182307SN/A        thread[tid].switchOut();
2192307SN/A    }
2202307SN/A}
2212307SN/A
2222307SN/Atemplate <class Impl>
2232307SN/Avoid
2242307SN/ALSQ<Impl>::takeOverFrom()
2252307SN/A{
2262307SN/A    for (int tid = 0; tid < numThreads; tid++) {
2272307SN/A        thread[tid].takeOverFrom();
2282307SN/A    }
2292307SN/A}
2302307SN/A
2312307SN/Atemplate <class Impl>
2322292SN/Aint
2332292SN/ALSQ<Impl>::entryAmount(int num_threads)
2342292SN/A{
2352292SN/A    if (lsqPolicy == Partitioned) {
2362292SN/A        return LQEntries / num_threads;
2372292SN/A    } else {
2382292SN/A        return 0;
2392292SN/A    }
2402292SN/A}
2412292SN/A
2422292SN/Atemplate <class Impl>
2432292SN/Avoid
2442292SN/ALSQ<Impl>::resetEntries()
2452292SN/A{
2462292SN/A    if (lsqPolicy != Dynamic || numThreads > 1) {
2472292SN/A        int active_threads = (*activeThreads).size();
2482292SN/A
2492980Sgblack@eecs.umich.edu        std::list<unsigned>::iterator threads  = (*activeThreads).begin();
2502980Sgblack@eecs.umich.edu        std::list<unsigned>::iterator list_end = (*activeThreads).end();
2512292SN/A
2522292SN/A        int maxEntries;
2532292SN/A
2542292SN/A        if (lsqPolicy == Partitioned) {
2552292SN/A            maxEntries = LQEntries / active_threads;
2562292SN/A        } else if (lsqPolicy == Threshold && active_threads == 1) {
2572292SN/A            maxEntries = LQEntries;
2582292SN/A        } else {
2592292SN/A            maxEntries = LQEntries;
2602292SN/A        }
2612292SN/A
2622292SN/A        while (threads != list_end) {
2632292SN/A            resizeEntries(maxEntries,*threads++);
2642292SN/A        }
2652292SN/A    }
2662292SN/A}
2672292SN/A
2682292SN/Atemplate<class Impl>
2692292SN/Avoid
2702292SN/ALSQ<Impl>::removeEntries(unsigned tid)
2712292SN/A{
2722292SN/A    thread[tid].clearLQ();
2732292SN/A    thread[tid].clearSQ();
2742292SN/A}
2752292SN/A
2762292SN/Atemplate<class Impl>
2772292SN/Avoid
2782292SN/ALSQ<Impl>::resizeEntries(unsigned size,unsigned tid)
2792292SN/A{
2802292SN/A    thread[tid].resizeLQ(size);
2812292SN/A    thread[tid].resizeSQ(size);
2822292SN/A}
2832292SN/A
2842292SN/Atemplate<class Impl>
2852292SN/Avoid
2862292SN/ALSQ<Impl>::tick()
2872292SN/A{
2882980Sgblack@eecs.umich.edu    std::list<unsigned>::iterator active_threads = (*activeThreads).begin();
2892292SN/A
2902292SN/A    while (active_threads != (*activeThreads).end()) {
2912292SN/A        unsigned tid = *active_threads++;
2922292SN/A
2932292SN/A        thread[tid].tick();
2942292SN/A    }
2952292SN/A}
2962292SN/A
2972292SN/Atemplate<class Impl>
2982292SN/Avoid
2992292SN/ALSQ<Impl>::insertLoad(DynInstPtr &load_inst)
3002292SN/A{
3012292SN/A    unsigned tid = load_inst->threadNumber;
3022292SN/A
3032292SN/A    thread[tid].insertLoad(load_inst);
3042292SN/A}
3052292SN/A
3062292SN/Atemplate<class Impl>
3072292SN/Avoid
3082292SN/ALSQ<Impl>::insertStore(DynInstPtr &store_inst)
3092292SN/A{
3102292SN/A    unsigned tid = store_inst->threadNumber;
3112292SN/A
3122292SN/A    thread[tid].insertStore(store_inst);
3132292SN/A}
3142292SN/A
3152292SN/Atemplate<class Impl>
3162292SN/AFault
3172292SN/ALSQ<Impl>::executeLoad(DynInstPtr &inst)
3182292SN/A{
3192292SN/A    unsigned tid = inst->threadNumber;
3202292SN/A
3212292SN/A    return thread[tid].executeLoad(inst);
3222292SN/A}
3232292SN/A
3242292SN/Atemplate<class Impl>
3252292SN/AFault
3262292SN/ALSQ<Impl>::executeStore(DynInstPtr &inst)
3272292SN/A{
3282292SN/A    unsigned tid = inst->threadNumber;
3292292SN/A
3302292SN/A    return thread[tid].executeStore(inst);
3312292SN/A}
3322292SN/A
3332292SN/Atemplate<class Impl>
3342292SN/Avoid
3352292SN/ALSQ<Impl>::writebackStores()
3362292SN/A{
3372980Sgblack@eecs.umich.edu    std::list<unsigned>::iterator active_threads = (*activeThreads).begin();
3382292SN/A
3392292SN/A    while (active_threads != (*activeThreads).end()) {
3402292SN/A        unsigned tid = *active_threads++;
3412292SN/A
3422292SN/A        if (numStoresToWB(tid) > 0) {
3432329SN/A            DPRINTF(Writeback,"[tid:%i] Writing back stores. %i stores "
3442329SN/A                "available for Writeback.\n", tid, numStoresToWB(tid));
3452292SN/A        }
3462292SN/A
3472292SN/A        thread[tid].writebackStores();
3482292SN/A    }
3492292SN/A}
3502292SN/A
3512292SN/Atemplate<class Impl>
3522292SN/Abool
3532292SN/ALSQ<Impl>::violation()
3542292SN/A{
3552292SN/A    /* Answers: Does Anybody Have a Violation?*/
3562980Sgblack@eecs.umich.edu    std::list<unsigned>::iterator active_threads = (*activeThreads).begin();
3572292SN/A
3582292SN/A    while (active_threads != (*activeThreads).end()) {
3592292SN/A        unsigned tid = *active_threads++;
3602292SN/A        if (thread[tid].violation())
3612292SN/A            return true;
3622292SN/A    }
3632292SN/A
3642292SN/A    return false;
3652292SN/A}
3662292SN/A
3672292SN/Atemplate<class Impl>
3682292SN/Aint
3692292SN/ALSQ<Impl>::getCount()
3702292SN/A{
3712292SN/A    unsigned total = 0;
3722292SN/A
3732980Sgblack@eecs.umich.edu    std::list<unsigned>::iterator active_threads = (*activeThreads).begin();
3742292SN/A
3752292SN/A    while (active_threads != (*activeThreads).end()) {
3762292SN/A        unsigned tid = *active_threads++;
3772292SN/A        total += getCount(tid);
3782292SN/A    }
3792292SN/A
3802292SN/A    return total;
3812292SN/A}
3822292SN/A
3832292SN/Atemplate<class Impl>
3842292SN/Aint
3852292SN/ALSQ<Impl>::numLoads()
3862292SN/A{
3872292SN/A    unsigned total = 0;
3882292SN/A
3892980Sgblack@eecs.umich.edu    std::list<unsigned>::iterator active_threads = (*activeThreads).begin();
3902292SN/A
3912292SN/A    while (active_threads != (*activeThreads).end()) {
3922292SN/A        unsigned tid = *active_threads++;
3932292SN/A        total += numLoads(tid);
3942292SN/A    }
3952292SN/A
3962292SN/A    return total;
3972292SN/A}
3982292SN/A
3992292SN/Atemplate<class Impl>
4002292SN/Aint
4012292SN/ALSQ<Impl>::numStores()
4022292SN/A{
4032292SN/A    unsigned total = 0;
4042292SN/A
4052980Sgblack@eecs.umich.edu    std::list<unsigned>::iterator active_threads = (*activeThreads).begin();
4062292SN/A
4072292SN/A    while (active_threads != (*activeThreads).end()) {
4082292SN/A        unsigned tid = *active_threads++;
4092292SN/A        total += thread[tid].numStores();
4102292SN/A    }
4112292SN/A
4122292SN/A    return total;
4132292SN/A}
4142292SN/A
4152292SN/Atemplate<class Impl>
4162292SN/Aint
4172292SN/ALSQ<Impl>::numLoadsReady()
4182292SN/A{
4192292SN/A    unsigned total = 0;
4202292SN/A
4212980Sgblack@eecs.umich.edu    std::list<unsigned>::iterator active_threads = (*activeThreads).begin();
4222292SN/A
4232292SN/A    while (active_threads != (*activeThreads).end()) {
4242292SN/A        unsigned tid = *active_threads++;
4252292SN/A        total += thread[tid].numLoadsReady();
4262292SN/A    }
4272292SN/A
4282292SN/A    return total;
4292292SN/A}
4302292SN/A
4312292SN/Atemplate<class Impl>
4322292SN/Aunsigned
4332292SN/ALSQ<Impl>::numFreeEntries()
4342292SN/A{
4352292SN/A    unsigned total = 0;
4362292SN/A
4372980Sgblack@eecs.umich.edu    std::list<unsigned>::iterator active_threads = (*activeThreads).begin();
4382292SN/A
4392292SN/A    while (active_threads != (*activeThreads).end()) {
4402292SN/A        unsigned tid = *active_threads++;
4412292SN/A        total += thread[tid].numFreeEntries();
4422292SN/A    }
4432292SN/A
4442292SN/A    return total;
4452292SN/A}
4462292SN/A
4472292SN/Atemplate<class Impl>
4482292SN/Aunsigned
4492292SN/ALSQ<Impl>::numFreeEntries(unsigned tid)
4502292SN/A{
4512292SN/A    //if( lsqPolicy == Dynamic )
4522292SN/A    //return numFreeEntries();
4532292SN/A    //else
4542292SN/A        return thread[tid].numFreeEntries();
4552292SN/A}
4562292SN/A
4572292SN/Atemplate<class Impl>
4582292SN/Abool
4592292SN/ALSQ<Impl>::isFull()
4602292SN/A{
4612980Sgblack@eecs.umich.edu    std::list<unsigned>::iterator active_threads = (*activeThreads).begin();
4622292SN/A
4632292SN/A    while (active_threads != (*activeThreads).end()) {
4642292SN/A        unsigned tid = *active_threads++;
4652292SN/A        if (! (thread[tid].lqFull() || thread[tid].sqFull()) )
4662292SN/A            return false;
4672292SN/A    }
4682292SN/A
4692292SN/A    return true;
4702292SN/A}
4712292SN/A
4722292SN/Atemplate<class Impl>
4732292SN/Abool
4742292SN/ALSQ<Impl>::isFull(unsigned tid)
4752292SN/A{
4762292SN/A    //@todo: Change to Calculate All Entries for
4772292SN/A    //Dynamic Policy
4782292SN/A    if( lsqPolicy == Dynamic )
4792292SN/A        return isFull();
4802292SN/A    else
4812292SN/A        return thread[tid].lqFull() || thread[tid].sqFull();
4822292SN/A}
4832292SN/A
4842292SN/Atemplate<class Impl>
4852292SN/Abool
4862292SN/ALSQ<Impl>::lqFull()
4872292SN/A{
4882980Sgblack@eecs.umich.edu    std::list<unsigned>::iterator active_threads = (*activeThreads).begin();
4892292SN/A
4902292SN/A    while (active_threads != (*activeThreads).end()) {
4912292SN/A        unsigned tid = *active_threads++;
4922292SN/A        if (!thread[tid].lqFull())
4932292SN/A            return false;
4942292SN/A    }
4952292SN/A
4962292SN/A    return true;
4972292SN/A}
4982292SN/A
4992292SN/Atemplate<class Impl>
5002292SN/Abool
5012292SN/ALSQ<Impl>::lqFull(unsigned tid)
5022292SN/A{
5032292SN/A    //@todo: Change to Calculate All Entries for
5042292SN/A    //Dynamic Policy
5052292SN/A    if( lsqPolicy == Dynamic )
5062292SN/A        return lqFull();
5072292SN/A    else
5082292SN/A        return thread[tid].lqFull();
5092292SN/A}
5102292SN/A
5112292SN/Atemplate<class Impl>
5122292SN/Abool
5132292SN/ALSQ<Impl>::sqFull()
5142292SN/A{
5152980Sgblack@eecs.umich.edu    std::list<unsigned>::iterator active_threads = (*activeThreads).begin();
5162292SN/A
5172292SN/A    while (active_threads != (*activeThreads).end()) {
5182292SN/A        unsigned tid = *active_threads++;
5192292SN/A        if (!sqFull(tid))
5202292SN/A            return false;
5212292SN/A    }
5222292SN/A
5232292SN/A    return true;
5242292SN/A}
5252292SN/A
5262292SN/Atemplate<class Impl>
5272292SN/Abool
5282292SN/ALSQ<Impl>::sqFull(unsigned tid)
5292292SN/A{
5302292SN/A     //@todo: Change to Calculate All Entries for
5312292SN/A    //Dynamic Policy
5322292SN/A    if( lsqPolicy == Dynamic )
5332292SN/A        return sqFull();
5342292SN/A    else
5352292SN/A        return thread[tid].sqFull();
5362292SN/A}
5372292SN/A
5382292SN/Atemplate<class Impl>
5392292SN/Abool
5402292SN/ALSQ<Impl>::isStalled()
5412292SN/A{
5422980Sgblack@eecs.umich.edu    std::list<unsigned>::iterator active_threads = (*activeThreads).begin();
5432292SN/A
5442292SN/A    while (active_threads != (*activeThreads).end()) {
5452292SN/A        unsigned tid = *active_threads++;
5462292SN/A        if (!thread[tid].isStalled())
5472292SN/A            return false;
5482292SN/A    }
5492292SN/A
5502292SN/A    return true;
5512292SN/A}
5522292SN/A
5532292SN/Atemplate<class Impl>
5542292SN/Abool
5552292SN/ALSQ<Impl>::isStalled(unsigned tid)
5562292SN/A{
5572292SN/A    if( lsqPolicy == Dynamic )
5582292SN/A        return isStalled();
5592292SN/A    else
5602292SN/A        return thread[tid].isStalled();
5612292SN/A}
5622292SN/A
5632292SN/Atemplate<class Impl>
5642292SN/Abool
5652292SN/ALSQ<Impl>::hasStoresToWB()
5662292SN/A{
5672980Sgblack@eecs.umich.edu    std::list<unsigned>::iterator active_threads = (*activeThreads).begin();
5682292SN/A
5692864Sktlim@umich.edu    if ((*activeThreads).empty())
5702864Sktlim@umich.edu        return false;
5712864Sktlim@umich.edu
5722292SN/A    while (active_threads != (*activeThreads).end()) {
5732292SN/A        unsigned tid = *active_threads++;
5742292SN/A        if (!hasStoresToWB(tid))
5752292SN/A            return false;
5762292SN/A    }
5772292SN/A
5782292SN/A    return true;
5792292SN/A}
5802292SN/A
5812292SN/Atemplate<class Impl>
5822292SN/Abool
5832292SN/ALSQ<Impl>::willWB()
5842292SN/A{
5852980Sgblack@eecs.umich.edu    std::list<unsigned>::iterator active_threads = (*activeThreads).begin();
5862292SN/A
5872292SN/A    while (active_threads != (*activeThreads).end()) {
5882292SN/A        unsigned tid = *active_threads++;
5892292SN/A        if (!willWB(tid))
5902292SN/A            return false;
5912292SN/A    }
5922292SN/A
5932292SN/A    return true;
5942292SN/A}
5952292SN/A
5962292SN/Atemplate<class Impl>
5972292SN/Avoid
5982292SN/ALSQ<Impl>::dumpInsts()
5992292SN/A{
6002980Sgblack@eecs.umich.edu    std::list<unsigned>::iterator active_threads = (*activeThreads).begin();
6012292SN/A
6022292SN/A    while (active_threads != (*activeThreads).end()) {
6032292SN/A        unsigned tid = *active_threads++;
6042292SN/A        thread[tid].dumpInsts();
6052292SN/A    }
6062292SN/A}
607