lsq_impl.hh revision 13710
12292SN/A/* 213590Srekai.gonzalezalberquilla@arm.com * Copyright (c) 2011-2012, 2014, 2017-2018 ARM Limited 310239Sbinhpham@cs.rutgers.edu * Copyright (c) 2013 Advanced Micro Devices, Inc. 48707Sandreas.hansson@arm.com * All rights reserved 58707Sandreas.hansson@arm.com * 68707Sandreas.hansson@arm.com * The license below extends only to copyright in the software and shall 78707Sandreas.hansson@arm.com * not be construed as granting a license to any other intellectual 88707Sandreas.hansson@arm.com * property including but not limited to intellectual property relating 98707Sandreas.hansson@arm.com * to a hardware implementation of the functionality of the software 108707Sandreas.hansson@arm.com * licensed hereunder. You may use the software subject to the license 118707Sandreas.hansson@arm.com * terms below provided that you ensure that this notice is replicated 128707Sandreas.hansson@arm.com * unmodified and in its entirety in all distributions of the software, 138707Sandreas.hansson@arm.com * modified or unmodified, in source code or in binary form. 148707Sandreas.hansson@arm.com * 152727Sktlim@umich.edu * Copyright (c) 2005-2006 The Regents of The University of Michigan 162292SN/A * All rights reserved. 172292SN/A * 182292SN/A * Redistribution and use in source and binary forms, with or without 192292SN/A * modification, are permitted provided that the following conditions are 202292SN/A * met: redistributions of source code must retain the above copyright 212292SN/A * notice, this list of conditions and the following disclaimer; 222292SN/A * redistributions in binary form must reproduce the above copyright 232292SN/A * notice, this list of conditions and the following disclaimer in the 242292SN/A * documentation and/or other materials provided with the distribution; 252292SN/A * neither the name of the copyright holders nor the names of its 262292SN/A * contributors may be used to endorse or promote products derived from 272292SN/A * this software without specific prior written permission. 282292SN/A * 292292SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 302292SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 312292SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 322292SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 332292SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 342292SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 352292SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 362292SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 372292SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 382292SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 392292SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 402689Sktlim@umich.edu * 412689Sktlim@umich.edu * Authors: Korey Sewell 422292SN/A */ 432292SN/A 449944Smatt.horsnell@ARM.com#ifndef __CPU_O3_LSQ_IMPL_HH__ 459944Smatt.horsnell@ARM.com#define __CPU_O3_LSQ_IMPL_HH__ 469944Smatt.horsnell@ARM.com 472329SN/A#include <algorithm> 482980Sgblack@eecs.umich.edu#include <list> 492329SN/A#include <string> 502329SN/A 5113449Sgabeblack@google.com#include "base/logging.hh" 522292SN/A#include "cpu/o3/lsq.hh" 539444SAndreas.Sandberg@ARM.com#include "debug/Drain.hh" 548232Snate@binkert.org#include "debug/Fetch.hh" 558232Snate@binkert.org#include "debug/LSQ.hh" 568232Snate@binkert.org#include "debug/Writeback.hh" 576221Snate@binkert.org#include "params/DerivO3CPU.hh" 582292SN/A 596221Snate@binkert.orgusing namespace std; 605529Snate@binkert.org 612292SN/Atemplate <class Impl> 625529Snate@binkert.orgLSQ<Impl>::LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params) 638707Sandreas.hansson@arm.com : cpu(cpu_ptr), iewStage(iew_ptr), 6413590Srekai.gonzalezalberquilla@arm.com _cacheBlocked(false), 6513590Srekai.gonzalezalberquilla@arm.com cacheStorePorts(params->cacheStorePorts), usedStorePorts(0), 6613710Sgabor.dozsa@arm.com cacheLoadPorts(params->cacheLoadPorts), usedLoadPorts(0), 6713560Snikos.nikoleris@arm.com lsqPolicy(params->smtLSQPolicy), 684329Sktlim@umich.edu LQEntries(params->LQEntries), 694329Sktlim@umich.edu SQEntries(params->SQEntries), 7013472Srekai.gonzalezalberquilla@arm.com maxLQEntries(maxLSQAllocation(lsqPolicy, LQEntries, params->numThreads, 7113472Srekai.gonzalezalberquilla@arm.com params->smtLSQThreshold)), 7213472Srekai.gonzalezalberquilla@arm.com maxSQEntries(maxLSQAllocation(lsqPolicy, SQEntries, params->numThreads, 7313472Srekai.gonzalezalberquilla@arm.com params->smtLSQThreshold)), 7410333Smitch.hayenga@arm.com numThreads(params->numThreads) 752292SN/A{ 769868Sjthestness@gmail.com assert(numThreads > 0 && numThreads <= Impl::MaxThreads); 779868Sjthestness@gmail.com 782292SN/A //**********************************************/ 792292SN/A //************ Handle SMT Parameters ***********/ 802292SN/A //**********************************************/ 812292SN/A 8213590Srekai.gonzalezalberquilla@arm.com /* Run SMT olicy checks. */ 8313590Srekai.gonzalezalberquilla@arm.com if (lsqPolicy == SMTQueuePolicy::Dynamic) { 842292SN/A DPRINTF(LSQ, "LSQ sharing policy set to Dynamic\n"); 8513560Snikos.nikoleris@arm.com } else if (lsqPolicy == SMTQueuePolicy::Partitioned) { 862292SN/A DPRINTF(Fetch, "LSQ sharing policy set to Partitioned: " 878346Sksewell@umich.edu "%i entries per LQ | %i entries per SQ\n", 882292SN/A maxLQEntries,maxSQEntries); 8913560Snikos.nikoleris@arm.com } else if (lsqPolicy == SMTQueuePolicy::Threshold) { 902292SN/A 9113590Srekai.gonzalezalberquilla@arm.com assert(params->smtLSQThreshold > params->LQEntries); 9213590Srekai.gonzalezalberquilla@arm.com assert(params->smtLSQThreshold > params->SQEntries); 932292SN/A 942292SN/A DPRINTF(LSQ, "LSQ sharing policy set to Threshold: " 958346Sksewell@umich.edu "%i entries per LQ | %i entries per SQ\n", 962292SN/A maxLQEntries,maxSQEntries); 972292SN/A } else { 9813449Sgabeblack@google.com panic("Invalid LSQ sharing policy. Options are: Dynamic, " 9913449Sgabeblack@google.com "Partitioned, Threshold"); 1002292SN/A } 1012292SN/A 10213472Srekai.gonzalezalberquilla@arm.com thread.reserve(numThreads); 1036221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; tid++) { 10413472Srekai.gonzalezalberquilla@arm.com thread.emplace_back(maxLQEntries, maxSQEntries); 10513472Srekai.gonzalezalberquilla@arm.com thread[tid].init(cpu, iew_ptr, params, this, tid); 1068850Sandreas.hansson@arm.com thread[tid].setDcachePort(&cpu_ptr->getDataPort()); 1072292SN/A } 1082292SN/A} 1092292SN/A 1102292SN/A 1112292SN/Atemplate<class Impl> 1122292SN/Astd::string 1132292SN/ALSQ<Impl>::name() const 1142292SN/A{ 1152292SN/A return iewStage->name() + ".lsq"; 1162292SN/A} 1172292SN/A 1182292SN/Atemplate<class Impl> 1192292SN/Avoid 1202727Sktlim@umich.eduLSQ<Impl>::regStats() 1212727Sktlim@umich.edu{ 1222727Sktlim@umich.edu //Initialize LSQs 1236221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; tid++) { 1242727Sktlim@umich.edu thread[tid].regStats(); 1252727Sktlim@umich.edu } 1262727Sktlim@umich.edu} 1272727Sktlim@umich.edu 1282727Sktlim@umich.edutemplate<class Impl> 1292727Sktlim@umich.eduvoid 1306221Snate@binkert.orgLSQ<Impl>::setActiveThreads(list<ThreadID> *at_ptr) 1312292SN/A{ 1322292SN/A activeThreads = at_ptr; 1332292SN/A assert(activeThreads != 0); 1342292SN/A} 1352292SN/A 1362292SN/Atemplate <class Impl> 1372307SN/Avoid 1389444SAndreas.Sandberg@ARM.comLSQ<Impl>::drainSanityCheck() const 1392307SN/A{ 1409444SAndreas.Sandberg@ARM.com assert(isDrained()); 1419444SAndreas.Sandberg@ARM.com 1429444SAndreas.Sandberg@ARM.com for (ThreadID tid = 0; tid < numThreads; tid++) 1439444SAndreas.Sandberg@ARM.com thread[tid].drainSanityCheck(); 1449444SAndreas.Sandberg@ARM.com} 1459444SAndreas.Sandberg@ARM.com 1469444SAndreas.Sandberg@ARM.comtemplate <class Impl> 1479444SAndreas.Sandberg@ARM.combool 1489444SAndreas.Sandberg@ARM.comLSQ<Impl>::isDrained() const 1499444SAndreas.Sandberg@ARM.com{ 1509444SAndreas.Sandberg@ARM.com bool drained(true); 1519444SAndreas.Sandberg@ARM.com 1529444SAndreas.Sandberg@ARM.com if (!lqEmpty()) { 1539444SAndreas.Sandberg@ARM.com DPRINTF(Drain, "Not drained, LQ not empty.\n"); 1549444SAndreas.Sandberg@ARM.com drained = false; 1552307SN/A } 1569444SAndreas.Sandberg@ARM.com 1579444SAndreas.Sandberg@ARM.com if (!sqEmpty()) { 1589444SAndreas.Sandberg@ARM.com DPRINTF(Drain, "Not drained, SQ not empty.\n"); 1599444SAndreas.Sandberg@ARM.com drained = false; 1609444SAndreas.Sandberg@ARM.com } 1619444SAndreas.Sandberg@ARM.com 1629444SAndreas.Sandberg@ARM.com return drained; 1632307SN/A} 1642307SN/A 1652307SN/Atemplate <class Impl> 1662307SN/Avoid 1672307SN/ALSQ<Impl>::takeOverFrom() 1682307SN/A{ 16913590Srekai.gonzalezalberquilla@arm.com usedStorePorts = 0; 17013590Srekai.gonzalezalberquilla@arm.com _cacheBlocked = false; 17113590Srekai.gonzalezalberquilla@arm.com 1726221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; tid++) { 1732307SN/A thread[tid].takeOverFrom(); 1742307SN/A } 1752307SN/A} 1762307SN/A 17713710Sgabor.dozsa@arm.comtemplate <class Impl> 17813710Sgabor.dozsa@arm.comvoid 17913710Sgabor.dozsa@arm.comLSQ<Impl>::tick() 18013710Sgabor.dozsa@arm.com{ 18113710Sgabor.dozsa@arm.com // Re-issue loads which got blocked on the per-cycle load ports limit. 18213710Sgabor.dozsa@arm.com if (usedLoadPorts == cacheLoadPorts && !_cacheBlocked) 18313710Sgabor.dozsa@arm.com iewStage->cacheUnblocked(); 18413710Sgabor.dozsa@arm.com 18513710Sgabor.dozsa@arm.com usedLoadPorts = 0; 18613710Sgabor.dozsa@arm.com usedStorePorts = 0; 18713710Sgabor.dozsa@arm.com} 18813710Sgabor.dozsa@arm.com 18913590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 19013590Srekai.gonzalezalberquilla@arm.combool 19113590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::cacheBlocked() const 1922292SN/A{ 19313590Srekai.gonzalezalberquilla@arm.com return _cacheBlocked; 1942292SN/A} 1952292SN/A 1962292SN/Atemplate<class Impl> 1972292SN/Avoid 19813590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::cacheBlocked(bool v) 1992292SN/A{ 20013590Srekai.gonzalezalberquilla@arm.com _cacheBlocked = v; 20113590Srekai.gonzalezalberquilla@arm.com} 20213590Srekai.gonzalezalberquilla@arm.com 20313590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 20413590Srekai.gonzalezalberquilla@arm.combool 20513710Sgabor.dozsa@arm.comLSQ<Impl>::cachePortAvailable(bool is_load) const 20613590Srekai.gonzalezalberquilla@arm.com{ 20713710Sgabor.dozsa@arm.com bool ret; 20813710Sgabor.dozsa@arm.com if (is_load) { 20913710Sgabor.dozsa@arm.com ret = usedLoadPorts < cacheLoadPorts; 21013710Sgabor.dozsa@arm.com } else { 21113710Sgabor.dozsa@arm.com ret = usedStorePorts < cacheStorePorts; 21213710Sgabor.dozsa@arm.com } 21313710Sgabor.dozsa@arm.com return ret; 2142292SN/A} 2152292SN/A 2162292SN/Atemplate<class Impl> 2172292SN/Avoid 21813710Sgabor.dozsa@arm.comLSQ<Impl>::cachePortBusy(bool is_load) 2192292SN/A{ 22013710Sgabor.dozsa@arm.com assert(cachePortAvailable(is_load)); 22113710Sgabor.dozsa@arm.com if (is_load) { 22213710Sgabor.dozsa@arm.com usedLoadPorts++; 22313710Sgabor.dozsa@arm.com } else { 22413710Sgabor.dozsa@arm.com usedStorePorts++; 22513710Sgabor.dozsa@arm.com } 2262292SN/A} 2272292SN/A 2282292SN/Atemplate<class Impl> 2292292SN/Avoid 23013429Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::insertLoad(const DynInstPtr &load_inst) 2312292SN/A{ 2326221Snate@binkert.org ThreadID tid = load_inst->threadNumber; 2332292SN/A 2342292SN/A thread[tid].insertLoad(load_inst); 2352292SN/A} 2362292SN/A 2372292SN/Atemplate<class Impl> 2382292SN/Avoid 23913429Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::insertStore(const DynInstPtr &store_inst) 2402292SN/A{ 2416221Snate@binkert.org ThreadID tid = store_inst->threadNumber; 2422292SN/A 2432292SN/A thread[tid].insertStore(store_inst); 2442292SN/A} 2452292SN/A 2462292SN/Atemplate<class Impl> 2472292SN/AFault 24813429Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::executeLoad(const DynInstPtr &inst) 2492292SN/A{ 2506221Snate@binkert.org ThreadID tid = inst->threadNumber; 2512292SN/A 2522292SN/A return thread[tid].executeLoad(inst); 2532292SN/A} 2542292SN/A 2552292SN/Atemplate<class Impl> 2562292SN/AFault 25713429Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::executeStore(const DynInstPtr &inst) 2582292SN/A{ 2596221Snate@binkert.org ThreadID tid = inst->threadNumber; 2602292SN/A 2612292SN/A return thread[tid].executeStore(inst); 2622292SN/A} 2632292SN/A 2642292SN/Atemplate<class Impl> 2652292SN/Avoid 2662292SN/ALSQ<Impl>::writebackStores() 2672292SN/A{ 2686221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 2696221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 2702292SN/A 2713867Sbinkertn@umich.edu while (threads != end) { 2726221Snate@binkert.org ThreadID tid = *threads++; 2732292SN/A 2742292SN/A if (numStoresToWB(tid) > 0) { 2752329SN/A DPRINTF(Writeback,"[tid:%i] Writing back stores. %i stores " 2762329SN/A "available for Writeback.\n", tid, numStoresToWB(tid)); 2772292SN/A } 2782292SN/A 2792292SN/A thread[tid].writebackStores(); 2802292SN/A } 2812292SN/A} 2822292SN/A 2832292SN/Atemplate<class Impl> 2842292SN/Abool 2852292SN/ALSQ<Impl>::violation() 2862292SN/A{ 2872292SN/A /* Answers: Does Anybody Have a Violation?*/ 2886221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 2896221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 2902292SN/A 2913867Sbinkertn@umich.edu while (threads != end) { 2926221Snate@binkert.org ThreadID tid = *threads++; 2933867Sbinkertn@umich.edu 2942292SN/A if (thread[tid].violation()) 2952292SN/A return true; 2962292SN/A } 2972292SN/A 2982292SN/A return false; 2992292SN/A} 3002292SN/A 3018707Sandreas.hansson@arm.comtemplate <class Impl> 3028707Sandreas.hansson@arm.comvoid 30310713Sandreas.hansson@arm.comLSQ<Impl>::recvReqRetry() 3048707Sandreas.hansson@arm.com{ 30510333Smitch.hayenga@arm.com iewStage->cacheUnblocked(); 30613590Srekai.gonzalezalberquilla@arm.com cacheBlocked(false); 30710333Smitch.hayenga@arm.com 30810333Smitch.hayenga@arm.com for (ThreadID tid : *activeThreads) { 30910333Smitch.hayenga@arm.com thread[tid].recvRetry(); 3108707Sandreas.hansson@arm.com } 3118707Sandreas.hansson@arm.com} 3128707Sandreas.hansson@arm.com 3138707Sandreas.hansson@arm.comtemplate <class Impl> 31413590Srekai.gonzalezalberquilla@arm.comvoid 31513590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::completeDataAccess(PacketPtr pkt) 31613590Srekai.gonzalezalberquilla@arm.com{ 31713590Srekai.gonzalezalberquilla@arm.com auto senderState = dynamic_cast<LSQSenderState*>(pkt->senderState); 31813590Srekai.gonzalezalberquilla@arm.com thread[cpu->contextToThread(senderState->contextId())] 31913590Srekai.gonzalezalberquilla@arm.com .completeDataAccess(pkt); 32013590Srekai.gonzalezalberquilla@arm.com} 32113590Srekai.gonzalezalberquilla@arm.com 32213590Srekai.gonzalezalberquilla@arm.comtemplate <class Impl> 3238707Sandreas.hansson@arm.combool 3248975Sandreas.hansson@arm.comLSQ<Impl>::recvTimingResp(PacketPtr pkt) 3258707Sandreas.hansson@arm.com{ 3268707Sandreas.hansson@arm.com if (pkt->isError()) 3278707Sandreas.hansson@arm.com DPRINTF(LSQ, "Got error packet back for address: %#X\n", 3288707Sandreas.hansson@arm.com pkt->getAddr()); 32910575SMarco.Elver@ARM.com 33013590Srekai.gonzalezalberquilla@arm.com auto senderState = dynamic_cast<LSQSenderState*>(pkt->senderState); 33113590Srekai.gonzalezalberquilla@arm.com panic_if(!senderState, "Got packet back with unknown sender state\n"); 33213590Srekai.gonzalezalberquilla@arm.com 33313590Srekai.gonzalezalberquilla@arm.com thread[cpu->contextToThread(senderState->contextId())].recvTimingResp(pkt); 33410575SMarco.Elver@ARM.com 33510575SMarco.Elver@ARM.com if (pkt->isInvalidate()) { 33610575SMarco.Elver@ARM.com // This response also contains an invalidate; e.g. this can be the case 33710575SMarco.Elver@ARM.com // if cmd is ReadRespWithInvalidate. 33810575SMarco.Elver@ARM.com // 33910575SMarco.Elver@ARM.com // The calling order between completeDataAccess and checkSnoop matters. 34010575SMarco.Elver@ARM.com // By calling checkSnoop after completeDataAccess, we ensure that the 34110575SMarco.Elver@ARM.com // fault set by checkSnoop is not lost. Calling writeback (more 34210575SMarco.Elver@ARM.com // specifically inst->completeAcc) in completeDataAccess overwrites 34310575SMarco.Elver@ARM.com // fault, and in case this instruction requires squashing (as 34410575SMarco.Elver@ARM.com // determined by checkSnoop), the ReExec fault set by checkSnoop would 34510575SMarco.Elver@ARM.com // be lost otherwise. 34610575SMarco.Elver@ARM.com 34710575SMarco.Elver@ARM.com DPRINTF(LSQ, "received invalidation with response for addr:%#x\n", 34810575SMarco.Elver@ARM.com pkt->getAddr()); 34910575SMarco.Elver@ARM.com 35010575SMarco.Elver@ARM.com for (ThreadID tid = 0; tid < numThreads; tid++) { 35110575SMarco.Elver@ARM.com thread[tid].checkSnoop(pkt); 35210575SMarco.Elver@ARM.com } 35310575SMarco.Elver@ARM.com } 35413590Srekai.gonzalezalberquilla@arm.com // Update the LSQRequest state (this may delete the request) 35513590Srekai.gonzalezalberquilla@arm.com senderState->request()->packetReplied(); 35610575SMarco.Elver@ARM.com 3578948Sandreas.hansson@arm.com return true; 3588948Sandreas.hansson@arm.com} 3598707Sandreas.hansson@arm.com 3608948Sandreas.hansson@arm.comtemplate <class Impl> 3618975Sandreas.hansson@arm.comvoid 3628975Sandreas.hansson@arm.comLSQ<Impl>::recvTimingSnoopReq(PacketPtr pkt) 3638948Sandreas.hansson@arm.com{ 3648948Sandreas.hansson@arm.com DPRINTF(LSQ, "received pkt for addr:%#x %s\n", pkt->getAddr(), 3658948Sandreas.hansson@arm.com pkt->cmdString()); 3668948Sandreas.hansson@arm.com 3678948Sandreas.hansson@arm.com // must be a snoop 3688948Sandreas.hansson@arm.com if (pkt->isInvalidate()) { 3698948Sandreas.hansson@arm.com DPRINTF(LSQ, "received invalidation for addr:%#x\n", 3708948Sandreas.hansson@arm.com pkt->getAddr()); 3718948Sandreas.hansson@arm.com for (ThreadID tid = 0; tid < numThreads; tid++) { 3728948Sandreas.hansson@arm.com thread[tid].checkSnoop(pkt); 3738707Sandreas.hansson@arm.com } 3748707Sandreas.hansson@arm.com } 3758707Sandreas.hansson@arm.com} 3768707Sandreas.hansson@arm.com 3772292SN/Atemplate<class Impl> 3782292SN/Aint 3792292SN/ALSQ<Impl>::getCount() 3802292SN/A{ 3812292SN/A unsigned total = 0; 3822292SN/A 3836221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 3846221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 3852292SN/A 3863867Sbinkertn@umich.edu while (threads != end) { 3876221Snate@binkert.org ThreadID tid = *threads++; 3883867Sbinkertn@umich.edu 3892292SN/A total += getCount(tid); 3902292SN/A } 3912292SN/A 3922292SN/A return total; 3932292SN/A} 3942292SN/A 3952292SN/Atemplate<class Impl> 3962292SN/Aint 3972292SN/ALSQ<Impl>::numLoads() 3982292SN/A{ 3992292SN/A unsigned total = 0; 4002292SN/A 4016221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 4026221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 4032292SN/A 4043867Sbinkertn@umich.edu while (threads != end) { 4056221Snate@binkert.org ThreadID tid = *threads++; 4063867Sbinkertn@umich.edu 4072292SN/A total += numLoads(tid); 4082292SN/A } 4092292SN/A 4102292SN/A return total; 4112292SN/A} 4122292SN/A 4132292SN/Atemplate<class Impl> 4142292SN/Aint 4152292SN/ALSQ<Impl>::numStores() 4162292SN/A{ 4172292SN/A unsigned total = 0; 4182292SN/A 4196221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 4206221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 4212292SN/A 4223867Sbinkertn@umich.edu while (threads != end) { 4236221Snate@binkert.org ThreadID tid = *threads++; 4243867Sbinkertn@umich.edu 4252292SN/A total += thread[tid].numStores(); 4262292SN/A } 4272292SN/A 4282292SN/A return total; 4292292SN/A} 4302292SN/A 4312292SN/Atemplate<class Impl> 4322292SN/Aunsigned 43310239Sbinhpham@cs.rutgers.eduLSQ<Impl>::numFreeLoadEntries() 4342292SN/A{ 4352292SN/A unsigned total = 0; 4362292SN/A 4376221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 4386221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 4392292SN/A 4403867Sbinkertn@umich.edu while (threads != end) { 4416221Snate@binkert.org ThreadID tid = *threads++; 4423867Sbinkertn@umich.edu 44310239Sbinhpham@cs.rutgers.edu total += thread[tid].numFreeLoadEntries(); 4442292SN/A } 4452292SN/A 4462292SN/A return total; 4472292SN/A} 4482292SN/A 4492292SN/Atemplate<class Impl> 4502292SN/Aunsigned 45110239Sbinhpham@cs.rutgers.eduLSQ<Impl>::numFreeStoreEntries() 4522292SN/A{ 45310239Sbinhpham@cs.rutgers.edu unsigned total = 0; 45410239Sbinhpham@cs.rutgers.edu 45510239Sbinhpham@cs.rutgers.edu list<ThreadID>::iterator threads = activeThreads->begin(); 45610239Sbinhpham@cs.rutgers.edu list<ThreadID>::iterator end = activeThreads->end(); 45710239Sbinhpham@cs.rutgers.edu 45810239Sbinhpham@cs.rutgers.edu while (threads != end) { 45910239Sbinhpham@cs.rutgers.edu ThreadID tid = *threads++; 46010239Sbinhpham@cs.rutgers.edu 46110239Sbinhpham@cs.rutgers.edu total += thread[tid].numFreeStoreEntries(); 46210239Sbinhpham@cs.rutgers.edu } 46310239Sbinhpham@cs.rutgers.edu 46410239Sbinhpham@cs.rutgers.edu return total; 46510239Sbinhpham@cs.rutgers.edu} 46610239Sbinhpham@cs.rutgers.edu 46710239Sbinhpham@cs.rutgers.edutemplate<class Impl> 46810239Sbinhpham@cs.rutgers.eduunsigned 46910239Sbinhpham@cs.rutgers.eduLSQ<Impl>::numFreeLoadEntries(ThreadID tid) 47010239Sbinhpham@cs.rutgers.edu{ 47110239Sbinhpham@cs.rutgers.edu return thread[tid].numFreeLoadEntries(); 47210239Sbinhpham@cs.rutgers.edu} 47310239Sbinhpham@cs.rutgers.edu 47410239Sbinhpham@cs.rutgers.edutemplate<class Impl> 47510239Sbinhpham@cs.rutgers.eduunsigned 47610239Sbinhpham@cs.rutgers.eduLSQ<Impl>::numFreeStoreEntries(ThreadID tid) 47710239Sbinhpham@cs.rutgers.edu{ 47810239Sbinhpham@cs.rutgers.edu return thread[tid].numFreeStoreEntries(); 4792292SN/A} 4802292SN/A 4812292SN/Atemplate<class Impl> 4822292SN/Abool 4832292SN/ALSQ<Impl>::isFull() 4842292SN/A{ 4856221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 4866221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 4872292SN/A 4883867Sbinkertn@umich.edu while (threads != end) { 4896221Snate@binkert.org ThreadID tid = *threads++; 4903867Sbinkertn@umich.edu 4913867Sbinkertn@umich.edu if (!(thread[tid].lqFull() || thread[tid].sqFull())) 4922292SN/A return false; 4932292SN/A } 4942292SN/A 4952292SN/A return true; 4962292SN/A} 4972292SN/A 4982292SN/Atemplate<class Impl> 4992292SN/Abool 5006221Snate@binkert.orgLSQ<Impl>::isFull(ThreadID tid) 5012292SN/A{ 5022292SN/A //@todo: Change to Calculate All Entries for 5032292SN/A //Dynamic Policy 50413560Snikos.nikoleris@arm.com if (lsqPolicy == SMTQueuePolicy::Dynamic) 5052292SN/A return isFull(); 5062292SN/A else 5072292SN/A return thread[tid].lqFull() || thread[tid].sqFull(); 5082292SN/A} 5092292SN/A 5102292SN/Atemplate<class Impl> 5112292SN/Abool 5129444SAndreas.Sandberg@ARM.comLSQ<Impl>::isEmpty() const 5139444SAndreas.Sandberg@ARM.com{ 5149444SAndreas.Sandberg@ARM.com return lqEmpty() && sqEmpty(); 5159444SAndreas.Sandberg@ARM.com} 5169444SAndreas.Sandberg@ARM.com 5179444SAndreas.Sandberg@ARM.comtemplate<class Impl> 5189444SAndreas.Sandberg@ARM.combool 5199444SAndreas.Sandberg@ARM.comLSQ<Impl>::lqEmpty() const 5209444SAndreas.Sandberg@ARM.com{ 5219444SAndreas.Sandberg@ARM.com list<ThreadID>::const_iterator threads = activeThreads->begin(); 5229444SAndreas.Sandberg@ARM.com list<ThreadID>::const_iterator end = activeThreads->end(); 5239444SAndreas.Sandberg@ARM.com 5249444SAndreas.Sandberg@ARM.com while (threads != end) { 5259444SAndreas.Sandberg@ARM.com ThreadID tid = *threads++; 5269444SAndreas.Sandberg@ARM.com 5279444SAndreas.Sandberg@ARM.com if (!thread[tid].lqEmpty()) 5289444SAndreas.Sandberg@ARM.com return false; 5299444SAndreas.Sandberg@ARM.com } 5309444SAndreas.Sandberg@ARM.com 5319444SAndreas.Sandberg@ARM.com return true; 5329444SAndreas.Sandberg@ARM.com} 5339444SAndreas.Sandberg@ARM.com 5349444SAndreas.Sandberg@ARM.comtemplate<class Impl> 5359444SAndreas.Sandberg@ARM.combool 5369444SAndreas.Sandberg@ARM.comLSQ<Impl>::sqEmpty() const 5379444SAndreas.Sandberg@ARM.com{ 5389444SAndreas.Sandberg@ARM.com list<ThreadID>::const_iterator threads = activeThreads->begin(); 5399444SAndreas.Sandberg@ARM.com list<ThreadID>::const_iterator end = activeThreads->end(); 5409444SAndreas.Sandberg@ARM.com 5419444SAndreas.Sandberg@ARM.com while (threads != end) { 5429444SAndreas.Sandberg@ARM.com ThreadID tid = *threads++; 5439444SAndreas.Sandberg@ARM.com 5449444SAndreas.Sandberg@ARM.com if (!thread[tid].sqEmpty()) 5459444SAndreas.Sandberg@ARM.com return false; 5469444SAndreas.Sandberg@ARM.com } 5479444SAndreas.Sandberg@ARM.com 5489444SAndreas.Sandberg@ARM.com return true; 5499444SAndreas.Sandberg@ARM.com} 5509444SAndreas.Sandberg@ARM.com 5519444SAndreas.Sandberg@ARM.comtemplate<class Impl> 5529444SAndreas.Sandberg@ARM.combool 5532292SN/ALSQ<Impl>::lqFull() 5542292SN/A{ 5556221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 5566221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 5572292SN/A 5583867Sbinkertn@umich.edu while (threads != end) { 5596221Snate@binkert.org ThreadID tid = *threads++; 5603867Sbinkertn@umich.edu 5612292SN/A if (!thread[tid].lqFull()) 5622292SN/A return false; 5632292SN/A } 5642292SN/A 5652292SN/A return true; 5662292SN/A} 5672292SN/A 5682292SN/Atemplate<class Impl> 5692292SN/Abool 5706221Snate@binkert.orgLSQ<Impl>::lqFull(ThreadID tid) 5712292SN/A{ 5722292SN/A //@todo: Change to Calculate All Entries for 5732292SN/A //Dynamic Policy 57413560Snikos.nikoleris@arm.com if (lsqPolicy == SMTQueuePolicy::Dynamic) 5752292SN/A return lqFull(); 5762292SN/A else 5772292SN/A return thread[tid].lqFull(); 5782292SN/A} 5792292SN/A 5802292SN/Atemplate<class Impl> 5812292SN/Abool 5822292SN/ALSQ<Impl>::sqFull() 5832292SN/A{ 5846221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 5856221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 5862292SN/A 5873867Sbinkertn@umich.edu while (threads != end) { 5886221Snate@binkert.org ThreadID tid = *threads++; 5893867Sbinkertn@umich.edu 5902292SN/A if (!sqFull(tid)) 5912292SN/A return false; 5922292SN/A } 5932292SN/A 5942292SN/A return true; 5952292SN/A} 5962292SN/A 5972292SN/Atemplate<class Impl> 5982292SN/Abool 5996221Snate@binkert.orgLSQ<Impl>::sqFull(ThreadID tid) 6002292SN/A{ 6012292SN/A //@todo: Change to Calculate All Entries for 6022292SN/A //Dynamic Policy 60313560Snikos.nikoleris@arm.com if (lsqPolicy == SMTQueuePolicy::Dynamic) 6042292SN/A return sqFull(); 6052292SN/A else 6062292SN/A return thread[tid].sqFull(); 6072292SN/A} 6082292SN/A 6092292SN/Atemplate<class Impl> 6102292SN/Abool 6112292SN/ALSQ<Impl>::isStalled() 6122292SN/A{ 6136221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 6146221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 6152292SN/A 6163867Sbinkertn@umich.edu while (threads != end) { 6176221Snate@binkert.org ThreadID tid = *threads++; 6183867Sbinkertn@umich.edu 6192292SN/A if (!thread[tid].isStalled()) 6202292SN/A return false; 6212292SN/A } 6222292SN/A 6232292SN/A return true; 6242292SN/A} 6252292SN/A 6262292SN/Atemplate<class Impl> 6272292SN/Abool 6286221Snate@binkert.orgLSQ<Impl>::isStalled(ThreadID tid) 6292292SN/A{ 63013560Snikos.nikoleris@arm.com if (lsqPolicy == SMTQueuePolicy::Dynamic) 6312292SN/A return isStalled(); 6322292SN/A else 6332292SN/A return thread[tid].isStalled(); 6342292SN/A} 6352292SN/A 6362292SN/Atemplate<class Impl> 6372292SN/Abool 6382292SN/ALSQ<Impl>::hasStoresToWB() 6392292SN/A{ 6406221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 6416221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 6422292SN/A 6433867Sbinkertn@umich.edu while (threads != end) { 6446221Snate@binkert.org ThreadID tid = *threads++; 6453867Sbinkertn@umich.edu 6465557Sktlim@umich.edu if (hasStoresToWB(tid)) 6475557Sktlim@umich.edu return true; 6482292SN/A } 6492292SN/A 6505557Sktlim@umich.edu return false; 6512292SN/A} 6522292SN/A 6532292SN/Atemplate<class Impl> 6542292SN/Abool 6552292SN/ALSQ<Impl>::willWB() 6562292SN/A{ 6576221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 6586221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 6592292SN/A 6603867Sbinkertn@umich.edu while (threads != end) { 6616221Snate@binkert.org ThreadID tid = *threads++; 6623867Sbinkertn@umich.edu 6635557Sktlim@umich.edu if (willWB(tid)) 6645557Sktlim@umich.edu return true; 6652292SN/A } 6662292SN/A 6675557Sktlim@umich.edu return false; 6682292SN/A} 6692292SN/A 6702292SN/Atemplate<class Impl> 6712292SN/Avoid 6729440SAndreas.Sandberg@ARM.comLSQ<Impl>::dumpInsts() const 6732292SN/A{ 6749440SAndreas.Sandberg@ARM.com list<ThreadID>::const_iterator threads = activeThreads->begin(); 6759440SAndreas.Sandberg@ARM.com list<ThreadID>::const_iterator end = activeThreads->end(); 6762292SN/A 6773867Sbinkertn@umich.edu while (threads != end) { 6786221Snate@binkert.org ThreadID tid = *threads++; 6793867Sbinkertn@umich.edu 6802292SN/A thread[tid].dumpInsts(); 6812292SN/A } 6822292SN/A} 6839944Smatt.horsnell@ARM.com 68413590Srekai.gonzalezalberquilla@arm.comstatic Addr 68513590Srekai.gonzalezalberquilla@arm.comaddrBlockOffset(Addr addr, unsigned int block_size) 68613590Srekai.gonzalezalberquilla@arm.com{ 68713590Srekai.gonzalezalberquilla@arm.com return addr & (block_size - 1); 68813590Srekai.gonzalezalberquilla@arm.com} 68913590Srekai.gonzalezalberquilla@arm.com 69013590Srekai.gonzalezalberquilla@arm.comstatic Addr 69113590Srekai.gonzalezalberquilla@arm.comaddrBlockAlign(Addr addr, uint64_t block_size) 69213590Srekai.gonzalezalberquilla@arm.com{ 69313590Srekai.gonzalezalberquilla@arm.com return addr & ~(block_size - 1); 69413590Srekai.gonzalezalberquilla@arm.com} 69513590Srekai.gonzalezalberquilla@arm.com 69613590Srekai.gonzalezalberquilla@arm.comstatic bool 69713590Srekai.gonzalezalberquilla@arm.comtransferNeedsBurst(Addr addr, uint64_t size, uint64_t block_size) 69813590Srekai.gonzalezalberquilla@arm.com{ 69913590Srekai.gonzalezalberquilla@arm.com return (addrBlockOffset(addr, block_size) + size) > block_size; 70013590Srekai.gonzalezalberquilla@arm.com} 70113590Srekai.gonzalezalberquilla@arm.com 70213590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 70313590Srekai.gonzalezalberquilla@arm.comFault 70413590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::pushRequest(const DynInstPtr& inst, bool isLoad, uint8_t *data, 70513590Srekai.gonzalezalberquilla@arm.com unsigned int size, Addr addr, Request::Flags flags, 70613652Sqtt2@cornell.edu uint64_t *res, AtomicOpFunctor *amo_op) 70713590Srekai.gonzalezalberquilla@arm.com{ 70813652Sqtt2@cornell.edu // This comming request can be either load, store or atomic. 70913652Sqtt2@cornell.edu // Atomic request has a corresponding pointer to its atomic memory 71013652Sqtt2@cornell.edu // operation 71113688Sgiacomo.travaglini@arm.com bool isAtomic M5_VAR_USED = !isLoad && amo_op; 71213652Sqtt2@cornell.edu 71313590Srekai.gonzalezalberquilla@arm.com ThreadID tid = cpu->contextToThread(inst->contextId()); 71413590Srekai.gonzalezalberquilla@arm.com auto cacheLineSize = cpu->cacheLineSize(); 71513590Srekai.gonzalezalberquilla@arm.com bool needs_burst = transferNeedsBurst(addr, size, cacheLineSize); 71613590Srekai.gonzalezalberquilla@arm.com LSQRequest* req = nullptr; 71713590Srekai.gonzalezalberquilla@arm.com 71813652Sqtt2@cornell.edu // Atomic requests that access data across cache line boundary are 71913652Sqtt2@cornell.edu // currently not allowed since the cache does not guarantee corresponding 72013652Sqtt2@cornell.edu // atomic memory operations to be executed atomically across a cache line. 72113652Sqtt2@cornell.edu // For ISAs such as x86 that supports cross-cache-line atomic instructions, 72213652Sqtt2@cornell.edu // the cache needs to be modified to perform atomic update to both cache 72313652Sqtt2@cornell.edu // lines. For now, such cross-line update is not supported. 72413652Sqtt2@cornell.edu assert(!isAtomic || (isAtomic && !needs_burst)); 72513652Sqtt2@cornell.edu 72613590Srekai.gonzalezalberquilla@arm.com if (inst->translationStarted()) { 72713590Srekai.gonzalezalberquilla@arm.com req = inst->savedReq; 72813590Srekai.gonzalezalberquilla@arm.com assert(req); 72913590Srekai.gonzalezalberquilla@arm.com } else { 73013590Srekai.gonzalezalberquilla@arm.com if (needs_burst) { 73113590Srekai.gonzalezalberquilla@arm.com req = new SplitDataRequest(&thread[tid], inst, isLoad, addr, 73213590Srekai.gonzalezalberquilla@arm.com size, flags, data, res); 73313590Srekai.gonzalezalberquilla@arm.com } else { 73413590Srekai.gonzalezalberquilla@arm.com req = new SingleDataRequest(&thread[tid], inst, isLoad, addr, 73513652Sqtt2@cornell.edu size, flags, data, res, amo_op); 73613590Srekai.gonzalezalberquilla@arm.com } 73713590Srekai.gonzalezalberquilla@arm.com assert(req); 73813590Srekai.gonzalezalberquilla@arm.com inst->setRequest(); 73913590Srekai.gonzalezalberquilla@arm.com req->taskId(cpu->taskId()); 74013590Srekai.gonzalezalberquilla@arm.com 74113590Srekai.gonzalezalberquilla@arm.com req->initiateTranslation(); 74213590Srekai.gonzalezalberquilla@arm.com } 74313590Srekai.gonzalezalberquilla@arm.com 74413590Srekai.gonzalezalberquilla@arm.com /* This is the place were instructions get the effAddr. */ 74513590Srekai.gonzalezalberquilla@arm.com if (req->isTranslationComplete()) { 74613590Srekai.gonzalezalberquilla@arm.com if (inst->getFault() == NoFault) { 74713590Srekai.gonzalezalberquilla@arm.com inst->effAddr = req->getVaddr(); 74813590Srekai.gonzalezalberquilla@arm.com inst->effSize = size; 74913590Srekai.gonzalezalberquilla@arm.com inst->effAddrValid(true); 75013590Srekai.gonzalezalberquilla@arm.com 75113590Srekai.gonzalezalberquilla@arm.com if (cpu->checker) { 75213590Srekai.gonzalezalberquilla@arm.com inst->reqToVerify = std::make_shared<Request>(*req->request()); 75313590Srekai.gonzalezalberquilla@arm.com } 75413590Srekai.gonzalezalberquilla@arm.com if (isLoad) 75513590Srekai.gonzalezalberquilla@arm.com inst->getFault() = cpu->read(req, inst->lqIdx); 75613590Srekai.gonzalezalberquilla@arm.com else 75713590Srekai.gonzalezalberquilla@arm.com inst->getFault() = cpu->write(req, data, inst->sqIdx); 75813590Srekai.gonzalezalberquilla@arm.com } else if (isLoad) { 75913590Srekai.gonzalezalberquilla@arm.com // Commit will have to clean up whatever happened. Set this 76013590Srekai.gonzalezalberquilla@arm.com // instruction as executed. 76113590Srekai.gonzalezalberquilla@arm.com inst->setExecuted(); 76213590Srekai.gonzalezalberquilla@arm.com } 76313590Srekai.gonzalezalberquilla@arm.com } 76413590Srekai.gonzalezalberquilla@arm.com 76513590Srekai.gonzalezalberquilla@arm.com if (inst->traceData) 76613590Srekai.gonzalezalberquilla@arm.com inst->traceData->setMem(addr, size, flags); 76713590Srekai.gonzalezalberquilla@arm.com 76813590Srekai.gonzalezalberquilla@arm.com return inst->getFault(); 76913590Srekai.gonzalezalberquilla@arm.com} 77013590Srekai.gonzalezalberquilla@arm.com 77113590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 77213590Srekai.gonzalezalberquilla@arm.comvoid 77313590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::SingleDataRequest::finish(const Fault &fault, const RequestPtr &req, 77413590Srekai.gonzalezalberquilla@arm.com ThreadContext* tc, BaseTLB::Mode mode) 77513590Srekai.gonzalezalberquilla@arm.com{ 77613590Srekai.gonzalezalberquilla@arm.com _fault.push_back(fault); 77713590Srekai.gonzalezalberquilla@arm.com numInTranslationFragments = 0; 77813590Srekai.gonzalezalberquilla@arm.com numTranslatedFragments = 1; 77913590Srekai.gonzalezalberquilla@arm.com /* If the instruction has been squahsed, let the request know 78013590Srekai.gonzalezalberquilla@arm.com * as it may have to self-destruct. */ 78113590Srekai.gonzalezalberquilla@arm.com if (_inst->isSquashed()) { 78213590Srekai.gonzalezalberquilla@arm.com this->squashTranslation(); 78313590Srekai.gonzalezalberquilla@arm.com } else { 78413590Srekai.gonzalezalberquilla@arm.com _inst->strictlyOrdered(req->isStrictlyOrdered()); 78513590Srekai.gonzalezalberquilla@arm.com 78613590Srekai.gonzalezalberquilla@arm.com flags.set(Flag::TranslationFinished); 78713590Srekai.gonzalezalberquilla@arm.com if (fault == NoFault) { 78813590Srekai.gonzalezalberquilla@arm.com _inst->physEffAddr = req->getPaddr(); 78913590Srekai.gonzalezalberquilla@arm.com _inst->memReqFlags = req->getFlags(); 79013590Srekai.gonzalezalberquilla@arm.com if (req->isCondSwap()) { 79113590Srekai.gonzalezalberquilla@arm.com assert(_res); 79213590Srekai.gonzalezalberquilla@arm.com req->setExtraData(*_res); 79313590Srekai.gonzalezalberquilla@arm.com } 79413590Srekai.gonzalezalberquilla@arm.com setState(State::Request); 79513590Srekai.gonzalezalberquilla@arm.com } else { 79613590Srekai.gonzalezalberquilla@arm.com setState(State::Fault); 79713590Srekai.gonzalezalberquilla@arm.com } 79813590Srekai.gonzalezalberquilla@arm.com 79913590Srekai.gonzalezalberquilla@arm.com LSQRequest::_inst->fault = fault; 80013590Srekai.gonzalezalberquilla@arm.com LSQRequest::_inst->translationCompleted(true); 80113590Srekai.gonzalezalberquilla@arm.com } 80213590Srekai.gonzalezalberquilla@arm.com} 80313590Srekai.gonzalezalberquilla@arm.com 80413590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 80513590Srekai.gonzalezalberquilla@arm.comvoid 80613590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::SplitDataRequest::finish(const Fault &fault, const RequestPtr &req, 80713590Srekai.gonzalezalberquilla@arm.com ThreadContext* tc, BaseTLB::Mode mode) 80813590Srekai.gonzalezalberquilla@arm.com{ 80913590Srekai.gonzalezalberquilla@arm.com _fault.push_back(fault); 81013590Srekai.gonzalezalberquilla@arm.com assert(req == _requests[numTranslatedFragments] || this->isDelayed()); 81113590Srekai.gonzalezalberquilla@arm.com 81213590Srekai.gonzalezalberquilla@arm.com numInTranslationFragments--; 81313590Srekai.gonzalezalberquilla@arm.com numTranslatedFragments++; 81413590Srekai.gonzalezalberquilla@arm.com 81513590Srekai.gonzalezalberquilla@arm.com mainReq->setFlags(req->getFlags()); 81613590Srekai.gonzalezalberquilla@arm.com 81713590Srekai.gonzalezalberquilla@arm.com if (numTranslatedFragments == _requests.size()) { 81813590Srekai.gonzalezalberquilla@arm.com if (_inst->isSquashed()) { 81913590Srekai.gonzalezalberquilla@arm.com this->squashTranslation(); 82013590Srekai.gonzalezalberquilla@arm.com } else { 82113590Srekai.gonzalezalberquilla@arm.com _inst->strictlyOrdered(mainReq->isStrictlyOrdered()); 82213590Srekai.gonzalezalberquilla@arm.com flags.set(Flag::TranslationFinished); 82313590Srekai.gonzalezalberquilla@arm.com auto fault_it = _fault.begin(); 82413590Srekai.gonzalezalberquilla@arm.com /* Ffwd to the first NoFault. */ 82513590Srekai.gonzalezalberquilla@arm.com while (fault_it != _fault.end() && *fault_it == NoFault) 82613590Srekai.gonzalezalberquilla@arm.com fault_it++; 82713590Srekai.gonzalezalberquilla@arm.com /* If none of the fragments faulted: */ 82813590Srekai.gonzalezalberquilla@arm.com if (fault_it == _fault.end()) { 82913590Srekai.gonzalezalberquilla@arm.com _inst->physEffAddr = request(0)->getPaddr(); 83013590Srekai.gonzalezalberquilla@arm.com 83113590Srekai.gonzalezalberquilla@arm.com _inst->memReqFlags = mainReq->getFlags(); 83213590Srekai.gonzalezalberquilla@arm.com if (mainReq->isCondSwap()) { 83313590Srekai.gonzalezalberquilla@arm.com assert(_res); 83413590Srekai.gonzalezalberquilla@arm.com mainReq->setExtraData(*_res); 83513590Srekai.gonzalezalberquilla@arm.com } 83613590Srekai.gonzalezalberquilla@arm.com setState(State::Request); 83713590Srekai.gonzalezalberquilla@arm.com _inst->fault = NoFault; 83813590Srekai.gonzalezalberquilla@arm.com } else { 83913590Srekai.gonzalezalberquilla@arm.com setState(State::Fault); 84013590Srekai.gonzalezalberquilla@arm.com _inst->fault = *fault_it; 84113590Srekai.gonzalezalberquilla@arm.com } 84213590Srekai.gonzalezalberquilla@arm.com _inst->translationCompleted(true); 84313590Srekai.gonzalezalberquilla@arm.com } 84413590Srekai.gonzalezalberquilla@arm.com } 84513590Srekai.gonzalezalberquilla@arm.com} 84613590Srekai.gonzalezalberquilla@arm.com 84713590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 84813590Srekai.gonzalezalberquilla@arm.comvoid 84913590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::SingleDataRequest::initiateTranslation() 85013590Srekai.gonzalezalberquilla@arm.com{ 85113590Srekai.gonzalezalberquilla@arm.com _inst->translationStarted(true); 85213590Srekai.gonzalezalberquilla@arm.com setState(State::Translation); 85313590Srekai.gonzalezalberquilla@arm.com flags.set(Flag::TranslationStarted); 85413590Srekai.gonzalezalberquilla@arm.com 85513590Srekai.gonzalezalberquilla@arm.com _inst->savedReq = this; 85613590Srekai.gonzalezalberquilla@arm.com sendFragmentToTranslation(0); 85713590Srekai.gonzalezalberquilla@arm.com 85813590Srekai.gonzalezalberquilla@arm.com if (isTranslationComplete()) { 85913590Srekai.gonzalezalberquilla@arm.com } 86013590Srekai.gonzalezalberquilla@arm.com} 86113590Srekai.gonzalezalberquilla@arm.com 86213590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 86313590Srekai.gonzalezalberquilla@arm.comPacketPtr 86413590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::SplitDataRequest::mainPacket() 86513590Srekai.gonzalezalberquilla@arm.com{ 86613590Srekai.gonzalezalberquilla@arm.com return _mainPacket; 86713590Srekai.gonzalezalberquilla@arm.com} 86813590Srekai.gonzalezalberquilla@arm.com 86913590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 87013590Srekai.gonzalezalberquilla@arm.comRequestPtr 87113590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::SplitDataRequest::mainRequest() 87213590Srekai.gonzalezalberquilla@arm.com{ 87313590Srekai.gonzalezalberquilla@arm.com return mainReq; 87413590Srekai.gonzalezalberquilla@arm.com} 87513590Srekai.gonzalezalberquilla@arm.com 87613590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 87713590Srekai.gonzalezalberquilla@arm.comvoid 87813590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::SplitDataRequest::initiateTranslation() 87913590Srekai.gonzalezalberquilla@arm.com{ 88013590Srekai.gonzalezalberquilla@arm.com _inst->translationStarted(true); 88113590Srekai.gonzalezalberquilla@arm.com setState(State::Translation); 88213590Srekai.gonzalezalberquilla@arm.com flags.set(Flag::TranslationStarted); 88313590Srekai.gonzalezalberquilla@arm.com 88413590Srekai.gonzalezalberquilla@arm.com unsigned int cacheLineSize = _port.cacheLineSize(); 88513590Srekai.gonzalezalberquilla@arm.com Addr base_addr = _addr; 88613590Srekai.gonzalezalberquilla@arm.com Addr next_addr = addrBlockAlign(_addr + cacheLineSize, cacheLineSize); 88713590Srekai.gonzalezalberquilla@arm.com Addr final_addr = addrBlockAlign(_addr + _size, cacheLineSize); 88813590Srekai.gonzalezalberquilla@arm.com uint32_t size_so_far = 0; 88913590Srekai.gonzalezalberquilla@arm.com 89013590Srekai.gonzalezalberquilla@arm.com mainReq = std::make_shared<Request>(_inst->getASID(), base_addr, 89113590Srekai.gonzalezalberquilla@arm.com _size, _flags, _inst->masterId(), 89213590Srekai.gonzalezalberquilla@arm.com _inst->instAddr(), _inst->contextId()); 89313590Srekai.gonzalezalberquilla@arm.com 89413590Srekai.gonzalezalberquilla@arm.com // Paddr is not used in mainReq. However, we will accumulate the flags 89513590Srekai.gonzalezalberquilla@arm.com // from the sub requests into mainReq by calling setFlags() in finish(). 89613590Srekai.gonzalezalberquilla@arm.com // setFlags() assumes that paddr is set so flip the paddr valid bit here to 89713590Srekai.gonzalezalberquilla@arm.com // avoid a potential assert in setFlags() when we call it from finish(). 89813590Srekai.gonzalezalberquilla@arm.com mainReq->setPaddr(0); 89913590Srekai.gonzalezalberquilla@arm.com 90013590Srekai.gonzalezalberquilla@arm.com /* Get the pre-fix, possibly unaligned. */ 90113590Srekai.gonzalezalberquilla@arm.com _requests.push_back(std::make_shared<Request>(_inst->getASID(), base_addr, 90213590Srekai.gonzalezalberquilla@arm.com next_addr - base_addr, _flags, _inst->masterId(), 90313590Srekai.gonzalezalberquilla@arm.com _inst->instAddr(), _inst->contextId())); 90413590Srekai.gonzalezalberquilla@arm.com size_so_far = next_addr - base_addr; 90513590Srekai.gonzalezalberquilla@arm.com 90613590Srekai.gonzalezalberquilla@arm.com /* We are block aligned now, reading whole blocks. */ 90713590Srekai.gonzalezalberquilla@arm.com base_addr = next_addr; 90813590Srekai.gonzalezalberquilla@arm.com while (base_addr != final_addr) { 90913590Srekai.gonzalezalberquilla@arm.com _requests.push_back(std::make_shared<Request>(_inst->getASID(), 91013590Srekai.gonzalezalberquilla@arm.com base_addr, cacheLineSize, _flags, _inst->masterId(), 91113590Srekai.gonzalezalberquilla@arm.com _inst->instAddr(), _inst->contextId())); 91213590Srekai.gonzalezalberquilla@arm.com size_so_far += cacheLineSize; 91313590Srekai.gonzalezalberquilla@arm.com base_addr += cacheLineSize; 91413590Srekai.gonzalezalberquilla@arm.com } 91513590Srekai.gonzalezalberquilla@arm.com 91613590Srekai.gonzalezalberquilla@arm.com /* Deal with the tail. */ 91713590Srekai.gonzalezalberquilla@arm.com if (size_so_far < _size) { 91813590Srekai.gonzalezalberquilla@arm.com _requests.push_back(std::make_shared<Request>(_inst->getASID(), 91913590Srekai.gonzalezalberquilla@arm.com base_addr, _size - size_so_far, _flags, _inst->masterId(), 92013590Srekai.gonzalezalberquilla@arm.com _inst->instAddr(), _inst->contextId())); 92113590Srekai.gonzalezalberquilla@arm.com } 92213590Srekai.gonzalezalberquilla@arm.com 92313590Srekai.gonzalezalberquilla@arm.com /* Setup the requests and send them to translation. */ 92413590Srekai.gonzalezalberquilla@arm.com for (auto& r: _requests) { 92513590Srekai.gonzalezalberquilla@arm.com r->setReqInstSeqNum(_inst->seqNum); 92613590Srekai.gonzalezalberquilla@arm.com r->taskId(_taskId); 92713590Srekai.gonzalezalberquilla@arm.com } 92813590Srekai.gonzalezalberquilla@arm.com this->_inst->savedReq = this; 92913590Srekai.gonzalezalberquilla@arm.com numInTranslationFragments = 0; 93013590Srekai.gonzalezalberquilla@arm.com numTranslatedFragments = 0; 93113590Srekai.gonzalezalberquilla@arm.com 93213590Srekai.gonzalezalberquilla@arm.com for (uint32_t i = 0; i < _requests.size(); i++) { 93313590Srekai.gonzalezalberquilla@arm.com sendFragmentToTranslation(i); 93413590Srekai.gonzalezalberquilla@arm.com } 93513590Srekai.gonzalezalberquilla@arm.com} 93613590Srekai.gonzalezalberquilla@arm.com 93713590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 93813590Srekai.gonzalezalberquilla@arm.comvoid 93913590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::LSQRequest::sendFragmentToTranslation(int i) 94013590Srekai.gonzalezalberquilla@arm.com{ 94113590Srekai.gonzalezalberquilla@arm.com numInTranslationFragments++; 94213590Srekai.gonzalezalberquilla@arm.com _port.dTLB()->translateTiming( 94313590Srekai.gonzalezalberquilla@arm.com this->request(i), 94413590Srekai.gonzalezalberquilla@arm.com this->_inst->thread->getTC(), this, 94513590Srekai.gonzalezalberquilla@arm.com this->isLoad() ? BaseTLB::Read : BaseTLB::Write); 94613590Srekai.gonzalezalberquilla@arm.com} 94713590Srekai.gonzalezalberquilla@arm.com 94813590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 94913590Srekai.gonzalezalberquilla@arm.combool 95013590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::SingleDataRequest::recvTimingResp(PacketPtr pkt) 95113590Srekai.gonzalezalberquilla@arm.com{ 95213590Srekai.gonzalezalberquilla@arm.com assert(_numOutstandingPackets == 1); 95313590Srekai.gonzalezalberquilla@arm.com auto state = dynamic_cast<LSQSenderState*>(pkt->senderState); 95413590Srekai.gonzalezalberquilla@arm.com setState(State::Complete); 95513590Srekai.gonzalezalberquilla@arm.com flags.set(Flag::Complete); 95613590Srekai.gonzalezalberquilla@arm.com state->outstanding--; 95713590Srekai.gonzalezalberquilla@arm.com assert(pkt == _packets.front()); 95813590Srekai.gonzalezalberquilla@arm.com _port.completeDataAccess(pkt); 95913590Srekai.gonzalezalberquilla@arm.com return true; 96013590Srekai.gonzalezalberquilla@arm.com} 96113590Srekai.gonzalezalberquilla@arm.com 96213590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 96313590Srekai.gonzalezalberquilla@arm.combool 96413590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::SplitDataRequest::recvTimingResp(PacketPtr pkt) 96513590Srekai.gonzalezalberquilla@arm.com{ 96613590Srekai.gonzalezalberquilla@arm.com auto state = dynamic_cast<LSQSenderState*>(pkt->senderState); 96713590Srekai.gonzalezalberquilla@arm.com uint32_t pktIdx = 0; 96813590Srekai.gonzalezalberquilla@arm.com while (pktIdx < _packets.size() && pkt != _packets[pktIdx]) 96913590Srekai.gonzalezalberquilla@arm.com pktIdx++; 97013590Srekai.gonzalezalberquilla@arm.com assert(pktIdx < _packets.size()); 97113590Srekai.gonzalezalberquilla@arm.com assert(pkt->req == _requests[pktIdx]); 97213590Srekai.gonzalezalberquilla@arm.com assert(pkt == _packets[pktIdx]); 97313590Srekai.gonzalezalberquilla@arm.com numReceivedPackets++; 97413590Srekai.gonzalezalberquilla@arm.com state->outstanding--; 97513590Srekai.gonzalezalberquilla@arm.com if (numReceivedPackets == _packets.size()) { 97613590Srekai.gonzalezalberquilla@arm.com setState(State::Complete); 97713590Srekai.gonzalezalberquilla@arm.com flags.set(Flag::Complete); 97813590Srekai.gonzalezalberquilla@arm.com /* Assemble packets. */ 97913590Srekai.gonzalezalberquilla@arm.com PacketPtr resp = isLoad() 98013590Srekai.gonzalezalberquilla@arm.com ? Packet::createRead(mainReq) 98113590Srekai.gonzalezalberquilla@arm.com : Packet::createWrite(mainReq); 98213590Srekai.gonzalezalberquilla@arm.com if (isLoad()) 98313590Srekai.gonzalezalberquilla@arm.com resp->dataStatic(_inst->memData); 98413590Srekai.gonzalezalberquilla@arm.com else 98513590Srekai.gonzalezalberquilla@arm.com resp->dataStatic(_data); 98613590Srekai.gonzalezalberquilla@arm.com resp->senderState = _senderState; 98713590Srekai.gonzalezalberquilla@arm.com _port.completeDataAccess(resp); 98813590Srekai.gonzalezalberquilla@arm.com delete resp; 98913590Srekai.gonzalezalberquilla@arm.com } 99013590Srekai.gonzalezalberquilla@arm.com return true; 99113590Srekai.gonzalezalberquilla@arm.com} 99213590Srekai.gonzalezalberquilla@arm.com 99313590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 99413590Srekai.gonzalezalberquilla@arm.comvoid 99513590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::SingleDataRequest::buildPackets() 99613590Srekai.gonzalezalberquilla@arm.com{ 99713590Srekai.gonzalezalberquilla@arm.com assert(_senderState); 99813590Srekai.gonzalezalberquilla@arm.com /* Retries do not create new packets. */ 99913590Srekai.gonzalezalberquilla@arm.com if (_packets.size() == 0) { 100013590Srekai.gonzalezalberquilla@arm.com _packets.push_back( 100113590Srekai.gonzalezalberquilla@arm.com isLoad() 100213590Srekai.gonzalezalberquilla@arm.com ? Packet::createRead(request()) 100313590Srekai.gonzalezalberquilla@arm.com : Packet::createWrite(request())); 100413590Srekai.gonzalezalberquilla@arm.com _packets.back()->dataStatic(_inst->memData); 100513590Srekai.gonzalezalberquilla@arm.com _packets.back()->senderState = _senderState; 100613590Srekai.gonzalezalberquilla@arm.com } 100713590Srekai.gonzalezalberquilla@arm.com assert(_packets.size() == 1); 100813590Srekai.gonzalezalberquilla@arm.com} 100913590Srekai.gonzalezalberquilla@arm.com 101013590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 101113590Srekai.gonzalezalberquilla@arm.comvoid 101213590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::SplitDataRequest::buildPackets() 101313590Srekai.gonzalezalberquilla@arm.com{ 101413590Srekai.gonzalezalberquilla@arm.com /* Extra data?? */ 101513590Srekai.gonzalezalberquilla@arm.com ptrdiff_t offset = 0; 101613590Srekai.gonzalezalberquilla@arm.com if (_packets.size() == 0) { 101713590Srekai.gonzalezalberquilla@arm.com /* New stuff */ 101813590Srekai.gonzalezalberquilla@arm.com if (isLoad()) { 101913590Srekai.gonzalezalberquilla@arm.com _mainPacket = Packet::createRead(mainReq); 102013590Srekai.gonzalezalberquilla@arm.com _mainPacket->dataStatic(_inst->memData); 102113590Srekai.gonzalezalberquilla@arm.com } 102213590Srekai.gonzalezalberquilla@arm.com for (auto& r: _requests) { 102313590Srekai.gonzalezalberquilla@arm.com PacketPtr pkt = isLoad() ? Packet::createRead(r) 102413590Srekai.gonzalezalberquilla@arm.com : Packet::createWrite(r); 102513590Srekai.gonzalezalberquilla@arm.com if (isLoad()) { 102613590Srekai.gonzalezalberquilla@arm.com pkt->dataStatic(_inst->memData + offset); 102713590Srekai.gonzalezalberquilla@arm.com } else { 102813590Srekai.gonzalezalberquilla@arm.com uint8_t* req_data = new uint8_t[r->getSize()]; 102913590Srekai.gonzalezalberquilla@arm.com std::memcpy(req_data, 103013590Srekai.gonzalezalberquilla@arm.com _inst->memData + offset, 103113590Srekai.gonzalezalberquilla@arm.com r->getSize()); 103213590Srekai.gonzalezalberquilla@arm.com pkt->dataDynamic(req_data); 103313590Srekai.gonzalezalberquilla@arm.com } 103413590Srekai.gonzalezalberquilla@arm.com offset += r->getSize(); 103513590Srekai.gonzalezalberquilla@arm.com pkt->senderState = _senderState; 103613590Srekai.gonzalezalberquilla@arm.com _packets.push_back(pkt); 103713590Srekai.gonzalezalberquilla@arm.com } 103813590Srekai.gonzalezalberquilla@arm.com } 103913590Srekai.gonzalezalberquilla@arm.com assert(_packets.size() == _requests.size()); 104013590Srekai.gonzalezalberquilla@arm.com} 104113590Srekai.gonzalezalberquilla@arm.com 104213590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 104313590Srekai.gonzalezalberquilla@arm.comvoid 104413590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::SingleDataRequest::sendPacketToCache() 104513590Srekai.gonzalezalberquilla@arm.com{ 104613590Srekai.gonzalezalberquilla@arm.com assert(_numOutstandingPackets == 0); 104713590Srekai.gonzalezalberquilla@arm.com if (lsqUnit()->trySendPacket(isLoad(), _packets.at(0))) 104813590Srekai.gonzalezalberquilla@arm.com _numOutstandingPackets = 1; 104913590Srekai.gonzalezalberquilla@arm.com} 105013590Srekai.gonzalezalberquilla@arm.com 105113590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 105213590Srekai.gonzalezalberquilla@arm.comvoid 105313590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::SplitDataRequest::sendPacketToCache() 105413590Srekai.gonzalezalberquilla@arm.com{ 105513590Srekai.gonzalezalberquilla@arm.com /* Try to send the packets. */ 105613590Srekai.gonzalezalberquilla@arm.com while (numReceivedPackets + _numOutstandingPackets < _packets.size() && 105713590Srekai.gonzalezalberquilla@arm.com lsqUnit()->trySendPacket(isLoad(), 105813590Srekai.gonzalezalberquilla@arm.com _packets.at(numReceivedPackets + _numOutstandingPackets))) { 105913590Srekai.gonzalezalberquilla@arm.com _numOutstandingPackets++; 106013590Srekai.gonzalezalberquilla@arm.com } 106113590Srekai.gonzalezalberquilla@arm.com} 106213590Srekai.gonzalezalberquilla@arm.com 106313590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 106413590Srekai.gonzalezalberquilla@arm.comvoid 106513590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::SingleDataRequest::handleIprWrite(ThreadContext *thread, 106613590Srekai.gonzalezalberquilla@arm.com PacketPtr pkt) 106713590Srekai.gonzalezalberquilla@arm.com{ 106813590Srekai.gonzalezalberquilla@arm.com TheISA::handleIprWrite(thread, pkt); 106913590Srekai.gonzalezalberquilla@arm.com} 107013590Srekai.gonzalezalberquilla@arm.com 107113590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 107213590Srekai.gonzalezalberquilla@arm.comvoid 107313590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::SplitDataRequest::handleIprWrite(ThreadContext *thread, 107413590Srekai.gonzalezalberquilla@arm.com PacketPtr mainPkt) 107513590Srekai.gonzalezalberquilla@arm.com{ 107613590Srekai.gonzalezalberquilla@arm.com unsigned offset = 0; 107713590Srekai.gonzalezalberquilla@arm.com for (auto r: _requests) { 107813590Srekai.gonzalezalberquilla@arm.com PacketPtr pkt = new Packet(r, MemCmd::WriteReq); 107913590Srekai.gonzalezalberquilla@arm.com pkt->dataStatic(mainPkt->getPtr<uint8_t>() + offset); 108013590Srekai.gonzalezalberquilla@arm.com TheISA::handleIprWrite(thread, pkt); 108113590Srekai.gonzalezalberquilla@arm.com offset += r->getSize(); 108213590Srekai.gonzalezalberquilla@arm.com delete pkt; 108313590Srekai.gonzalezalberquilla@arm.com } 108413590Srekai.gonzalezalberquilla@arm.com} 108513590Srekai.gonzalezalberquilla@arm.com 108613590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 108713590Srekai.gonzalezalberquilla@arm.comCycles 108813590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::SingleDataRequest::handleIprRead(ThreadContext *thread, 108913590Srekai.gonzalezalberquilla@arm.com PacketPtr pkt) 109013590Srekai.gonzalezalberquilla@arm.com{ 109113590Srekai.gonzalezalberquilla@arm.com return TheISA::handleIprRead(thread, pkt); 109213590Srekai.gonzalezalberquilla@arm.com} 109313590Srekai.gonzalezalberquilla@arm.com 109413590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 109513590Srekai.gonzalezalberquilla@arm.comCycles 109613590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::SplitDataRequest::handleIprRead(ThreadContext *thread, 109713590Srekai.gonzalezalberquilla@arm.com PacketPtr mainPkt) 109813590Srekai.gonzalezalberquilla@arm.com{ 109913590Srekai.gonzalezalberquilla@arm.com Cycles delay(0); 110013590Srekai.gonzalezalberquilla@arm.com unsigned offset = 0; 110113590Srekai.gonzalezalberquilla@arm.com 110213590Srekai.gonzalezalberquilla@arm.com for (auto r: _requests) { 110313590Srekai.gonzalezalberquilla@arm.com PacketPtr pkt = new Packet(r, MemCmd::ReadReq); 110413590Srekai.gonzalezalberquilla@arm.com pkt->dataStatic(mainPkt->getPtr<uint8_t>() + offset); 110513590Srekai.gonzalezalberquilla@arm.com Cycles d = TheISA::handleIprRead(thread, pkt); 110613590Srekai.gonzalezalberquilla@arm.com if (d > delay) 110713590Srekai.gonzalezalberquilla@arm.com delay = d; 110813590Srekai.gonzalezalberquilla@arm.com offset += r->getSize(); 110913590Srekai.gonzalezalberquilla@arm.com delete pkt; 111013590Srekai.gonzalezalberquilla@arm.com } 111113590Srekai.gonzalezalberquilla@arm.com return delay; 111213590Srekai.gonzalezalberquilla@arm.com} 111313590Srekai.gonzalezalberquilla@arm.com 111413590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 111513590Srekai.gonzalezalberquilla@arm.combool 111613590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::SingleDataRequest::isCacheBlockHit(Addr blockAddr, Addr blockMask) 111713590Srekai.gonzalezalberquilla@arm.com{ 111813590Srekai.gonzalezalberquilla@arm.com return ( (LSQRequest::_requests[0]->getPaddr() & blockMask) == blockAddr); 111913590Srekai.gonzalezalberquilla@arm.com} 112013590Srekai.gonzalezalberquilla@arm.com 112113590Srekai.gonzalezalberquilla@arm.comtemplate<class Impl> 112213590Srekai.gonzalezalberquilla@arm.combool 112313590Srekai.gonzalezalberquilla@arm.comLSQ<Impl>::SplitDataRequest::isCacheBlockHit(Addr blockAddr, Addr blockMask) 112413590Srekai.gonzalezalberquilla@arm.com{ 112513590Srekai.gonzalezalberquilla@arm.com bool is_hit = false; 112613590Srekai.gonzalezalberquilla@arm.com for (auto &r: _requests) { 112713590Srekai.gonzalezalberquilla@arm.com if ((r->getPaddr() & blockMask) == blockAddr) { 112813590Srekai.gonzalezalberquilla@arm.com is_hit = true; 112913590Srekai.gonzalezalberquilla@arm.com break; 113013590Srekai.gonzalezalberquilla@arm.com } 113113590Srekai.gonzalezalberquilla@arm.com } 113213590Srekai.gonzalezalberquilla@arm.com return is_hit; 113313590Srekai.gonzalezalberquilla@arm.com} 113413590Srekai.gonzalezalberquilla@arm.com 11359944Smatt.horsnell@ARM.com#endif//__CPU_O3_LSQ_IMPL_HH__ 1136