impl.hh revision 3760
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 */ 30 31#ifndef __CPU_O3_SPARC_IMPL_HH__ 32#define __CPU_O3_SPARC_IMPL_HH__ 33 34#include "arch/sparc/isa_traits.hh" 35 36#include "cpu/o3/sparc/params.hh" 37#include "cpu/o3/cpu_policy.hh" 38 39 40// Forward declarations. 41template <class Impl> 42class SparcDynInst; 43 44template <class Impl> 45class SparcO3CPU; 46 47/** Implementation specific struct that defines several key types to the 48 * CPU, the stages within the CPU, the time buffers, and the DynInst. 49 * The struct defines the ISA, the CPU policy, the specific DynInst, the 50 * specific O3CPU, and all of the structs from the time buffers to do 51 * communication. 52 * This is one of the key things that must be defined for each hardware 53 * specific CPU implementation. 54 */ 55struct SparcSimpleImpl 56{ 57 /** The type of MachInst. */ 58 typedef TheISA::MachInst MachInst; 59 60 /** The CPU policy to be used, which defines all of the CPU stages. */ 61 typedef SimpleCPUPolicy<SparcSimpleImpl> CPUPol; 62 63 /** The DynInst type to be used. */ 64 typedef SparcDynInst<SparcSimpleImpl> DynInst; 65 66 /** The refcounted DynInst pointer to be used. In most cases this is 67 * what should be used, and not DynInst *. 68 */ 69 typedef RefCountingPtr<DynInst> DynInstPtr; 70 71 /** The O3CPU type to be used. */ 72 typedef SparcO3CPU<SparcSimpleImpl> O3CPU; 73 74 /** Same typedef, but for CPUType. BaseDynInst may not always use 75 * an O3 CPU, so it's clearer to call it CPUType instead in that 76 * case. 77 */ 78 typedef O3CPU CPUType; 79 80 /** The Params to be passed to each stage. */ 81 typedef SparcSimpleParams Params; 82 83 enum { 84 MaxWidth = 8, 85 MaxThreads = 4 86 }; 87}; 88 89/** The O3Impl to be used. */ 90typedef SparcSimpleImpl O3CPUImpl; 91 92#endif // __CPU_O3_SPARC_IMPL_HH__ 93