free_list.hh revision 5364 
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31#ifndef __CPU_O3_FREE_LIST_HH__
32#define __CPU_O3_FREE_LIST_HH__
33
34#include <iostream>
35#include <queue>
36
37#include "arch/isa_traits.hh"
38#include "base/misc.hh"
39#include "base/trace.hh"
40#include "base/traceflags.hh"
41#include "cpu/o3/comm.hh"
42
43/**
44 * FreeList class that simply holds the list of free integer and floating
45 * point registers.  Can request for a free register of either type, and
46 * also send back free registers of either type.  This is a very simple
47 * class, but it should be sufficient for most implementations.  Like all
48 * other classes, it assumes that the indices for the floating point
49 * registers starts after the integer registers end.  Hence the variable
50 * numPhysicalIntRegs is logically equivalent to the baseFP dependency.
51 * Note that while this most likely should be called FreeList, the name
52 * "FreeList" is used in a typedef within the CPU Policy, and therefore no
53 * class can be named simply "FreeList".
54 * @todo: Give a better name to the base FP dependency.
55 */
56class SimpleFreeList
57{
58  private:
59    /** The list of free integer registers. */
60    std::queue<PhysRegIndex> freeIntRegs;
61
62    /** The list of free floating point registers. */
63    std::queue<PhysRegIndex> freeFloatRegs;
64
65    /** Number of logical integer registers. */
66    int numLogicalIntRegs;
67
68    /** Number of physical integer registers. */
69    int numPhysicalIntRegs;
70
71    /** Number of logical floating point registers. */
72    int numLogicalFloatRegs;
73
74    /** Number of physical floating point registers. */
75    int numPhysicalFloatRegs;
76
77    /** Total number of physical registers. */
78    int numPhysicalRegs;
79
80  public:
81    /** Constructs a free list.
82     *  @param activeThreads Number of active threads.
83     *  @param _numLogicalIntRegs Number of logical integer registers.
84     *  @param _numPhysicalIntRegs Number of physical integer registers.
85     *  @param _numLogicalFloatRegs Number of logical fp registers.
86     *  @param _numPhysicalFloatRegs Number of physical fp registers.
87     */
88    SimpleFreeList(unsigned activeThreads,
89                   unsigned _numLogicalIntRegs,
90                   unsigned _numPhysicalIntRegs,
91                   unsigned _numLogicalFloatRegs,
92                   unsigned _numPhysicalFloatRegs);
93
94    /** Gives the name of the freelist. */
95    std::string name() const;
96
97    /** Gets a free integer register. */
98    inline PhysRegIndex getIntReg();
99
100    /** Gets a free fp register. */
101    inline PhysRegIndex getFloatReg();
102
103    /** Adds a register back to the free list. */
104    inline void addReg(PhysRegIndex freed_reg);
105
106    /** Adds an integer register back to the free list. */
107    inline void addIntReg(PhysRegIndex freed_reg);
108
109    /** Adds a fp register back to the free list. */
110    inline void addFloatReg(PhysRegIndex freed_reg);
111
112    /** Checks if there are any free integer registers. */
113    bool hasFreeIntRegs()
114    { return !freeIntRegs.empty(); }
115
116    /** Checks if there are any free fp registers. */
117    bool hasFreeFloatRegs()
118    { return !freeFloatRegs.empty(); }
119
120    /** Returns the number of free integer registers. */
121    int numFreeIntRegs()
122    { return freeIntRegs.size(); }
123
124    /** Returns the number of free fp registers. */
125    int numFreeFloatRegs()
126    { return freeFloatRegs.size(); }
127};
128
129inline PhysRegIndex
130SimpleFreeList::getIntReg()
131{
132    DPRINTF(FreeList, "Trying to get free integer register.\n");
133
134    if (freeIntRegs.empty()) {
135        panic("No free integer registers!");
136    }
137
138    PhysRegIndex free_reg = freeIntRegs.front();
139
140    freeIntRegs.pop();
141
142    return(free_reg);
143}
144
145inline PhysRegIndex
146SimpleFreeList::getFloatReg()
147{
148    DPRINTF(FreeList, "Trying to get free float register.\n");
149
150    if (freeFloatRegs.empty()) {
151        panic("No free integer registers!");
152    }
153
154    PhysRegIndex free_reg = freeFloatRegs.front();
155
156    freeFloatRegs.pop();
157
158    return(free_reg);
159}
160
161inline void
162SimpleFreeList::addReg(PhysRegIndex freed_reg)
163{
164    DPRINTF(FreeList,"Freeing register %i.\n", freed_reg);
165    //Might want to add in a check for whether or not this register is
166    //already in there.  A bit vector or something similar would be useful.
167    if (freed_reg < numPhysicalIntRegs) {
168        if (freed_reg != TheISA::ZeroReg)
169            freeIntRegs.push(freed_reg);
170    } else if (freed_reg < numPhysicalRegs) {
171#if THE_ISA == ALPHA_ISA
172        if (freed_reg != (TheISA::ZeroReg + numPhysicalIntRegs))
173#endif
174            freeFloatRegs.push(freed_reg);
175    }
176
177    // These assert conditions ensure that the number of free
178    // registers are not more than the # of total Physical  Registers.
179    // If this were false, it would mean that registers
180    // have been freed twice, overflowing the free register
181    // pool and potentially crashing SMT workloads.
182    // ----
183    // Comment out for now so as to not potentially break
184    // CMP and single-threaded workloads
185    // ----
186    // assert(freeIntRegs.size() <= numPhysicalIntRegs);
187    // assert(freeFloatRegs.size() <= numPhysicalFloatRegs);
188}
189
190inline void
191SimpleFreeList::addIntReg(PhysRegIndex freed_reg)
192{
193    DPRINTF(FreeList,"Freeing int register %i.\n", freed_reg);
194
195    freeIntRegs.push(freed_reg);
196}
197
198inline void
199SimpleFreeList::addFloatReg(PhysRegIndex freed_reg)
200{
201    DPRINTF(FreeList,"Freeing float register %i.\n", freed_reg);
202
203    freeFloatRegs.push(freed_reg);
204}
205
206#endif // __CPU_O3_FREE_LIST_HH__
207