free_list.hh revision 2107
15132Sgblack@eecs.umich.edu/* 25132Sgblack@eecs.umich.edu * Copyright (c) 2004-2005 The Regents of The University of Michigan 35132Sgblack@eecs.umich.edu * All rights reserved. 45132Sgblack@eecs.umich.edu * 57087Snate@binkert.org * Redistribution and use in source and binary forms, with or without 67087Snate@binkert.org * modification, are permitted provided that the following conditions are 77087Snate@binkert.org * met: redistributions of source code must retain the above copyright 87087Snate@binkert.org * notice, this list of conditions and the following disclaimer; 97087Snate@binkert.org * redistributions in binary form must reproduce the above copyright 107087Snate@binkert.org * notice, this list of conditions and the following disclaimer in the 117087Snate@binkert.org * documentation and/or other materials provided with the distribution; 127087Snate@binkert.org * neither the name of the copyright holders nor the names of its 135132Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 147087Snate@binkert.org * this software without specific prior written permission. 157087Snate@binkert.org * 167087Snate@binkert.org * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 177087Snate@binkert.org * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 187087Snate@binkert.org * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 197087Snate@binkert.org * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 207087Snate@binkert.org * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 217087Snate@binkert.org * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 225132Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 237087Snate@binkert.org * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 245132Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 255132Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 265132Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 275132Sgblack@eecs.umich.edu */ 285132Sgblack@eecs.umich.edu 295132Sgblack@eecs.umich.edu#ifndef __CPU_O3_CPU_FREE_LIST_HH__ 305132Sgblack@eecs.umich.edu#define __CPU_O3_CPU_FREE_LIST_HH__ 315132Sgblack@eecs.umich.edu 325132Sgblack@eecs.umich.edu#include <iostream> 335132Sgblack@eecs.umich.edu#include <queue> 345132Sgblack@eecs.umich.edu 355132Sgblack@eecs.umich.edu#include "arch/isa_traits.hh" 365132Sgblack@eecs.umich.edu#include "base/trace.hh" 375132Sgblack@eecs.umich.edu#include "base/traceflags.hh" 385132Sgblack@eecs.umich.edu#include "cpu/o3/comm.hh" 395132Sgblack@eecs.umich.edu 405612Sgblack@eecs.umich.edu/** 415625Sgblack@eecs.umich.edu * FreeList class that simply holds the list of free integer and floating 427629Sgblack@eecs.umich.edu * point registers. Can request for a free register of either type, and 435132Sgblack@eecs.umich.edu * also send back free registers of either type. This is a very simple 445132Sgblack@eecs.umich.edu * class, but it should be sufficient for most implementations. Like all 455625Sgblack@eecs.umich.edu * other classes, it assumes that the indices for the floating point 465132Sgblack@eecs.umich.edu * registers starts after the integer registers end. Hence the variable 475132Sgblack@eecs.umich.edu * numPhysicalIntRegs is logically equivalent to the baseFP dependency. 485132Sgblack@eecs.umich.edu * Note that 495299Sgblack@eecs.umich.edu * while this most likely should be called FreeList, the name "FreeList" 505132Sgblack@eecs.umich.edu * is used in a typedef within the CPU Policy, and therefore no class 515132Sgblack@eecs.umich.edu * can be named simply "FreeList". 525132Sgblack@eecs.umich.edu * @todo: Give a better name to the base FP dependency. 535132Sgblack@eecs.umich.edu */ 545132Sgblack@eecs.umich.educlass SimpleFreeList 555299Sgblack@eecs.umich.edu{ 565299Sgblack@eecs.umich.edu private: 575132Sgblack@eecs.umich.edu /** The list of free integer registers. */ 585625Sgblack@eecs.umich.edu std::queue<PhysRegIndex> freeIntRegs; 595625Sgblack@eecs.umich.edu 605625Sgblack@eecs.umich.edu /** The list of free floating point registers. */ 615627Sgblack@eecs.umich.edu std::queue<PhysRegIndex> freeFloatRegs; 625627Sgblack@eecs.umich.edu 637704Sgblack@eecs.umich.edu /** Number of logical integer registers. */ 647704Sgblack@eecs.umich.edu int numLogicalIntRegs; 657704Sgblack@eecs.umich.edu 667704Sgblack@eecs.umich.edu /** Number of physical integer registers. */ 675132Sgblack@eecs.umich.edu int numPhysicalIntRegs; 686220Sgblack@eecs.umich.edu 696220Sgblack@eecs.umich.edu /** Number of logical floating point registers. */ 706220Sgblack@eecs.umich.edu int numLogicalFloatRegs; 716220Sgblack@eecs.umich.edu 726220Sgblack@eecs.umich.edu /** Number of physical floating point registers. */ 736220Sgblack@eecs.umich.edu int numPhysicalFloatRegs; 746220Sgblack@eecs.umich.edu 756220Sgblack@eecs.umich.edu /** Total number of physical registers. */ 766220Sgblack@eecs.umich.edu int numPhysicalRegs; 776220Sgblack@eecs.umich.edu 786220Sgblack@eecs.umich.edu /** DEBUG stuff below. */ 796220Sgblack@eecs.umich.edu std::vector<int> freeIntRegsScoreboard; 806222Sgblack@eecs.umich.edu 816222Sgblack@eecs.umich.edu std::vector<bool> freeFloatRegsScoreboard; 826222Sgblack@eecs.umich.edu 836222Sgblack@eecs.umich.edu public: 846222Sgblack@eecs.umich.edu SimpleFreeList(unsigned _numLogicalIntRegs, 856222Sgblack@eecs.umich.edu unsigned _numPhysicalIntRegs, 866222Sgblack@eecs.umich.edu unsigned _numLogicalFloatRegs, 876222Sgblack@eecs.umich.edu unsigned _numPhysicalFloatRegs); 886222Sgblack@eecs.umich.edu 896222Sgblack@eecs.umich.edu inline PhysRegIndex getIntReg(); 906220Sgblack@eecs.umich.edu 916220Sgblack@eecs.umich.edu inline PhysRegIndex getFloatReg(); 926220Sgblack@eecs.umich.edu 936222Sgblack@eecs.umich.edu inline void addReg(PhysRegIndex freed_reg); 946220Sgblack@eecs.umich.edu 956222Sgblack@eecs.umich.edu inline void addIntReg(PhysRegIndex freed_reg); 966220Sgblack@eecs.umich.edu 976220Sgblack@eecs.umich.edu inline void addFloatReg(PhysRegIndex freed_reg); 986222Sgblack@eecs.umich.edu 996220Sgblack@eecs.umich.edu bool hasFreeIntRegs() 1006220Sgblack@eecs.umich.edu { return !freeIntRegs.empty(); } 1016220Sgblack@eecs.umich.edu 1026220Sgblack@eecs.umich.edu bool hasFreeFloatRegs() 1036222Sgblack@eecs.umich.edu { return !freeFloatRegs.empty(); } 1046220Sgblack@eecs.umich.edu 1056220Sgblack@eecs.umich.edu int numFreeIntRegs() 1066220Sgblack@eecs.umich.edu { return freeIntRegs.size(); } 1076220Sgblack@eecs.umich.edu 1086220Sgblack@eecs.umich.edu int numFreeFloatRegs() 1096220Sgblack@eecs.umich.edu { return freeFloatRegs.size(); } 1106220Sgblack@eecs.umich.edu}; 1116220Sgblack@eecs.umich.edu 1126220Sgblack@eecs.umich.eduinline PhysRegIndex 1136220Sgblack@eecs.umich.eduSimpleFreeList::getIntReg() 1145299Sgblack@eecs.umich.edu{ 1157532Ssteve.reinhardt@amd.com DPRINTF(Rename, "FreeList: Trying to get free integer register.\n"); 1165299Sgblack@eecs.umich.edu if (freeIntRegs.empty()) { 1177532Ssteve.reinhardt@amd.com panic("No free integer registers!"); 1187532Ssteve.reinhardt@amd.com } 1196220Sgblack@eecs.umich.edu 1205299Sgblack@eecs.umich.edu PhysRegIndex free_reg = freeIntRegs.front(); 1215299Sgblack@eecs.umich.edu 1225299Sgblack@eecs.umich.edu freeIntRegs.pop(); 1235299Sgblack@eecs.umich.edu 1245299Sgblack@eecs.umich.edu // DEBUG 1255299Sgblack@eecs.umich.edu assert(freeIntRegsScoreboard[free_reg]); 1265299Sgblack@eecs.umich.edu freeIntRegsScoreboard[free_reg] = 0; 1275299Sgblack@eecs.umich.edu 1285299Sgblack@eecs.umich.edu return(free_reg); 1295299Sgblack@eecs.umich.edu} 1305299Sgblack@eecs.umich.edu 1315299Sgblack@eecs.umich.eduinline PhysRegIndex 1325299Sgblack@eecs.umich.eduSimpleFreeList::getFloatReg() 1335299Sgblack@eecs.umich.edu{ 1345299Sgblack@eecs.umich.edu DPRINTF(Rename, "FreeList: Trying to get free float register.\n"); 1355299Sgblack@eecs.umich.edu if (freeFloatRegs.empty()) { 1365299Sgblack@eecs.umich.edu panic("No free integer registers!"); 1375299Sgblack@eecs.umich.edu } 1385299Sgblack@eecs.umich.edu 1395299Sgblack@eecs.umich.edu PhysRegIndex free_reg = freeFloatRegs.front(); 1405299Sgblack@eecs.umich.edu 1416220Sgblack@eecs.umich.edu freeFloatRegs.pop(); 1425299Sgblack@eecs.umich.edu 1435299Sgblack@eecs.umich.edu // DEBUG 1445299Sgblack@eecs.umich.edu assert(freeFloatRegsScoreboard[free_reg]); 1455299Sgblack@eecs.umich.edu freeFloatRegsScoreboard[free_reg] = 0; 1466220Sgblack@eecs.umich.edu 1475299Sgblack@eecs.umich.edu return(free_reg); 1485299Sgblack@eecs.umich.edu} 1496220Sgblack@eecs.umich.edu 1506220Sgblack@eecs.umich.eduinline void 1516220Sgblack@eecs.umich.eduSimpleFreeList::addReg(PhysRegIndex freed_reg) 1525299Sgblack@eecs.umich.edu{ 1535299Sgblack@eecs.umich.edu DPRINTF(Rename, "Freelist: Freeing register %i.\n", freed_reg); 1545299Sgblack@eecs.umich.edu //Might want to add in a check for whether or not this register is 1556220Sgblack@eecs.umich.edu //already in there. A bit vector or something similar would be useful. 1565299Sgblack@eecs.umich.edu if (freed_reg < numPhysicalIntRegs) { 1576220Sgblack@eecs.umich.edu freeIntRegs.push(freed_reg); 1585299Sgblack@eecs.umich.edu 1595299Sgblack@eecs.umich.edu // DEBUG 1605299Sgblack@eecs.umich.edu assert(freeIntRegsScoreboard[freed_reg] == false); 1615299Sgblack@eecs.umich.edu freeIntRegsScoreboard[freed_reg] = 1; 1626220Sgblack@eecs.umich.edu } else if (freed_reg < numPhysicalRegs) { 1636220Sgblack@eecs.umich.edu freeFloatRegs.push(freed_reg); 1646220Sgblack@eecs.umich.edu 1656220Sgblack@eecs.umich.edu // DEBUG 1665299Sgblack@eecs.umich.edu assert(freeFloatRegsScoreboard[freed_reg] == false); 1675299Sgblack@eecs.umich.edu freeFloatRegsScoreboard[freed_reg] = 1; 1685299Sgblack@eecs.umich.edu } 1695299Sgblack@eecs.umich.edu} 1705299Sgblack@eecs.umich.edu 1716220Sgblack@eecs.umich.eduinline void 1726220Sgblack@eecs.umich.eduSimpleFreeList::addIntReg(PhysRegIndex freed_reg) 1735299Sgblack@eecs.umich.edu{ 1746220Sgblack@eecs.umich.edu DPRINTF(Rename, "Freelist: Freeing int register %i.\n", freed_reg); 1756220Sgblack@eecs.umich.edu 1766220Sgblack@eecs.umich.edu // DEBUG 1776220Sgblack@eecs.umich.edu assert(!freeIntRegsScoreboard[freed_reg]); 1786220Sgblack@eecs.umich.edu freeIntRegsScoreboard[freed_reg] = 1; 1796220Sgblack@eecs.umich.edu 1806220Sgblack@eecs.umich.edu freeIntRegs.push(freed_reg); 1816220Sgblack@eecs.umich.edu} 1826220Sgblack@eecs.umich.edu 1836220Sgblack@eecs.umich.eduinline void 1846220Sgblack@eecs.umich.eduSimpleFreeList::addFloatReg(PhysRegIndex freed_reg) 1856220Sgblack@eecs.umich.edu{ 1866220Sgblack@eecs.umich.edu DPRINTF(Rename, "Freelist: Freeing float register %i.\n", freed_reg); 1876220Sgblack@eecs.umich.edu 1886220Sgblack@eecs.umich.edu // DEBUG 1896220Sgblack@eecs.umich.edu assert(!freeFloatRegsScoreboard[freed_reg]); 1906220Sgblack@eecs.umich.edu freeFloatRegsScoreboard[freed_reg] = 1; 1916220Sgblack@eecs.umich.edu 1926220Sgblack@eecs.umich.edu freeFloatRegs.push(freed_reg); 1936220Sgblack@eecs.umich.edu} 1946220Sgblack@eecs.umich.edu 1956220Sgblack@eecs.umich.edu#endif // __CPU_O3_CPU_FREE_LIST_HH__ 1966220Sgblack@eecs.umich.edu