fetch.hh revision 2733:e0eac8fc5774
112853Sgabeblack@google.com/* 212853Sgabeblack@google.com * Copyright (c) 2004-2006 The Regents of The University of Michigan 312853Sgabeblack@google.com * All rights reserved. 412853Sgabeblack@google.com * 512853Sgabeblack@google.com * Redistribution and use in source and binary forms, with or without 612853Sgabeblack@google.com * modification, are permitted provided that the following conditions are 712853Sgabeblack@google.com * met: redistributions of source code must retain the above copyright 812853Sgabeblack@google.com * notice, this list of conditions and the following disclaimer; 912853Sgabeblack@google.com * redistributions in binary form must reproduce the above copyright 1012853Sgabeblack@google.com * notice, this list of conditions and the following disclaimer in the 1112853Sgabeblack@google.com * documentation and/or other materials provided with the distribution; 1212853Sgabeblack@google.com * neither the name of the copyright holders nor the names of its 1312853Sgabeblack@google.com * contributors may be used to endorse or promote products derived from 1412853Sgabeblack@google.com * this software without specific prior written permission. 1512853Sgabeblack@google.com * 1612853Sgabeblack@google.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1712853Sgabeblack@google.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1812853Sgabeblack@google.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1912853Sgabeblack@google.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2012853Sgabeblack@google.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2112853Sgabeblack@google.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2212853Sgabeblack@google.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2312853Sgabeblack@google.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2412853Sgabeblack@google.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2512853Sgabeblack@google.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2612853Sgabeblack@google.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2712853Sgabeblack@google.com * 2812853Sgabeblack@google.com * Authors: Kevin Lim 2912853Sgabeblack@google.com */ 3012853Sgabeblack@google.com 3112853Sgabeblack@google.com#ifndef __CPU_O3_FETCH_HH__ 3212853Sgabeblack@google.com#define __CPU_O3_FETCH_HH__ 3312853Sgabeblack@google.com 3412853Sgabeblack@google.com#include "arch/utility.hh" 3512853Sgabeblack@google.com#include "base/statistics.hh" 3612853Sgabeblack@google.com#include "base/timebuf.hh" 3712853Sgabeblack@google.com#include "cpu/pc_event.hh" 3812853Sgabeblack@google.com#include "mem/packet.hh" 3912853Sgabeblack@google.com#include "mem/port.hh" 4012853Sgabeblack@google.com#include "sim/eventq.hh" 4112853Sgabeblack@google.com 4212853Sgabeblack@google.comclass Sampler; 4312853Sgabeblack@google.com 4412853Sgabeblack@google.com/** 4512853Sgabeblack@google.com * DefaultFetch class handles both single threaded and SMT fetch. Its 4612853Sgabeblack@google.com * width is specified by the parameters; each cycle it tries to fetch 4712853Sgabeblack@google.com * that many instructions. It supports using a branch predictor to 4812853Sgabeblack@google.com * predict direction and targets. 4912853Sgabeblack@google.com * It supports the idling functionality of the CPU by indicating to 5012853Sgabeblack@google.com * the CPU when it is active and inactive. 5112853Sgabeblack@google.com */ 5212853Sgabeblack@google.comtemplate <class Impl> 5312853Sgabeblack@google.comclass DefaultFetch 5412853Sgabeblack@google.com{ 5512853Sgabeblack@google.com public: 5612853Sgabeblack@google.com /** Typedefs from Impl. */ 5712853Sgabeblack@google.com typedef typename Impl::CPUPol CPUPol; 5812853Sgabeblack@google.com typedef typename Impl::DynInst DynInst; 5912853Sgabeblack@google.com typedef typename Impl::DynInstPtr DynInstPtr; 6012853Sgabeblack@google.com typedef typename Impl::O3CPU O3CPU; 6112853Sgabeblack@google.com typedef typename Impl::Params Params; 6212853Sgabeblack@google.com 6312853Sgabeblack@google.com /** Typedefs from the CPU policy. */ 6412853Sgabeblack@google.com typedef typename CPUPol::BPredUnit BPredUnit; 6512853Sgabeblack@google.com typedef typename CPUPol::FetchStruct FetchStruct; 6612853Sgabeblack@google.com typedef typename CPUPol::TimeStruct TimeStruct; 6712853Sgabeblack@google.com 6812853Sgabeblack@google.com /** Typedefs from ISA. */ 6913245Sgabeblack@google.com typedef TheISA::MachInst MachInst; 7012853Sgabeblack@google.com typedef TheISA::ExtMachInst ExtMachInst; 7112853Sgabeblack@google.com 7213245Sgabeblack@google.com /** IcachePort class for DefaultFetch. Handles doing the 7313245Sgabeblack@google.com * communication with the cache/memory. 7412853Sgabeblack@google.com */ 7512853Sgabeblack@google.com class IcachePort : public Port 7612853Sgabeblack@google.com { 7712853Sgabeblack@google.com protected: 7812853Sgabeblack@google.com /** Pointer to fetch. */ 7912853Sgabeblack@google.com DefaultFetch<Impl> *fetch; 8012853Sgabeblack@google.com 8112853Sgabeblack@google.com public: 8212853Sgabeblack@google.com /** Default constructor. */ 8312853Sgabeblack@google.com IcachePort(DefaultFetch<Impl> *_fetch) 8412853Sgabeblack@google.com : Port(_fetch->name() + "-iport"), fetch(_fetch) 8512853Sgabeblack@google.com { } 8612853Sgabeblack@google.com 8712853Sgabeblack@google.com protected: 8812853Sgabeblack@google.com /** Atomic version of receive. Panics. */ 8912853Sgabeblack@google.com virtual Tick recvAtomic(PacketPtr pkt); 9012853Sgabeblack@google.com 9112853Sgabeblack@google.com /** Functional version of receive. Panics. */ 9212853Sgabeblack@google.com virtual void recvFunctional(PacketPtr pkt); 9312853Sgabeblack@google.com 9412853Sgabeblack@google.com /** Receives status change. Other than range changing, panics. */ 9512853Sgabeblack@google.com virtual void recvStatusChange(Status status); 9612853Sgabeblack@google.com 9712853Sgabeblack@google.com /** Returns the address ranges of this device. */ 9812853Sgabeblack@google.com virtual void getDeviceAddressRanges(AddrRangeList &resp, 9912853Sgabeblack@google.com AddrRangeList &snoop) 10012853Sgabeblack@google.com { resp.clear(); snoop.clear(); } 10112853Sgabeblack@google.com 10212853Sgabeblack@google.com /** Timing version of receive. Handles setting fetch to the 10312853Sgabeblack@google.com * proper status to start fetching. */ 10412853Sgabeblack@google.com virtual bool recvTiming(PacketPtr pkt); 10512853Sgabeblack@google.com 10612853Sgabeblack@google.com /** Handles doing a retry of a failed fetch. */ 10712853Sgabeblack@google.com virtual void recvRetry(); 10812853Sgabeblack@google.com }; 10912853Sgabeblack@google.com 11012853Sgabeblack@google.com public: 11112853Sgabeblack@google.com /** Overall fetch status. Used to determine if the CPU can 11212853Sgabeblack@google.com * deschedule itsef due to a lack of activity. 11312853Sgabeblack@google.com */ 11412853Sgabeblack@google.com enum FetchStatus { 11512853Sgabeblack@google.com Active, 11612853Sgabeblack@google.com Inactive 11712853Sgabeblack@google.com }; 11812853Sgabeblack@google.com 11912853Sgabeblack@google.com /** Individual thread status. */ 12012853Sgabeblack@google.com enum ThreadStatus { 12112853Sgabeblack@google.com Running, 12212853Sgabeblack@google.com Idle, 12312853Sgabeblack@google.com Squashing, 12412853Sgabeblack@google.com Blocked, 12512853Sgabeblack@google.com Fetching, 12612853Sgabeblack@google.com TrapPending, 12712853Sgabeblack@google.com QuiescePending, 12812853Sgabeblack@google.com SwitchOut, 12912853Sgabeblack@google.com IcacheWaitResponse, 13012853Sgabeblack@google.com IcacheWaitRetry, 13112853Sgabeblack@google.com IcacheAccessComplete 13212853Sgabeblack@google.com }; 13312853Sgabeblack@google.com 13412853Sgabeblack@google.com /** Fetching Policy, Add new policies here.*/ 13512853Sgabeblack@google.com enum FetchPriority { 13612853Sgabeblack@google.com SingleThread, 13712853Sgabeblack@google.com RoundRobin, 13812853Sgabeblack@google.com Branch, 13912853Sgabeblack@google.com IQ, 14012853Sgabeblack@google.com LSQ 14112853Sgabeblack@google.com }; 14212853Sgabeblack@google.com 14312853Sgabeblack@google.com private: 14412853Sgabeblack@google.com /** Fetch status. */ 14512853Sgabeblack@google.com FetchStatus _status; 14612853Sgabeblack@google.com 14712853Sgabeblack@google.com /** Per-thread status. */ 14812853Sgabeblack@google.com ThreadStatus fetchStatus[Impl::MaxThreads]; 14912853Sgabeblack@google.com 15012853Sgabeblack@google.com /** Fetch policy. */ 15112853Sgabeblack@google.com FetchPriority fetchPolicy; 15212853Sgabeblack@google.com 15312853Sgabeblack@google.com /** List that has the threads organized by priority. */ 15412853Sgabeblack@google.com std::list<unsigned> priorityList; 15512853Sgabeblack@google.com 15612853Sgabeblack@google.com public: 15712853Sgabeblack@google.com /** DefaultFetch constructor. */ 15812853Sgabeblack@google.com DefaultFetch(Params *params); 15912853Sgabeblack@google.com 16012853Sgabeblack@google.com /** Returns the name of fetch. */ 16112853Sgabeblack@google.com std::string name() const; 16212853Sgabeblack@google.com 16312853Sgabeblack@google.com /** Registers statistics. */ 16412853Sgabeblack@google.com void regStats(); 16512853Sgabeblack@google.com 16612853Sgabeblack@google.com /** Sets CPU pointer. */ 16712853Sgabeblack@google.com void setCPU(O3CPU *cpu_ptr); 16812853Sgabeblack@google.com 16912853Sgabeblack@google.com /** Sets the main backwards communication time buffer pointer. */ 17012853Sgabeblack@google.com void setTimeBuffer(TimeBuffer<TimeStruct> *time_buffer); 17112853Sgabeblack@google.com 17212853Sgabeblack@google.com /** Sets pointer to list of active threads. */ 17312853Sgabeblack@google.com void setActiveThreads(std::list<unsigned> *at_ptr); 17412853Sgabeblack@google.com 17512853Sgabeblack@google.com /** Sets pointer to time buffer used to communicate to the next stage. */ 17612853Sgabeblack@google.com void setFetchQueue(TimeBuffer<FetchStruct> *fq_ptr); 17712853Sgabeblack@google.com 17812853Sgabeblack@google.com /** Initialize stage. */ 17912853Sgabeblack@google.com void initStage(); 18012853Sgabeblack@google.com 18112853Sgabeblack@google.com /** Processes cache completion event. */ 18212853Sgabeblack@google.com void processCacheCompletion(PacketPtr pkt); 18312853Sgabeblack@google.com 18412853Sgabeblack@google.com /** Begins the switch out of the fetch stage. */ 18512853Sgabeblack@google.com void switchOut(); 18612853Sgabeblack@google.com 18712853Sgabeblack@google.com /** Completes the switch out of the fetch stage. */ 18812853Sgabeblack@google.com void doSwitchOut(); 18912853Sgabeblack@google.com 19012853Sgabeblack@google.com /** Takes over from another CPU's thread. */ 19112853Sgabeblack@google.com void takeOverFrom(); 19212853Sgabeblack@google.com 19312853Sgabeblack@google.com /** Checks if the fetch stage is switched out. */ 19412853Sgabeblack@google.com bool isSwitchedOut() { return switchedOut; } 19512853Sgabeblack@google.com 19612853Sgabeblack@google.com /** Tells fetch to wake up from a quiesce instruction. */ 19712853Sgabeblack@google.com void wakeFromQuiesce(); 19812853Sgabeblack@google.com 19912853Sgabeblack@google.com private: 20012853Sgabeblack@google.com /** Changes the status of this stage to active, and indicates this 20112853Sgabeblack@google.com * to the CPU. 20212853Sgabeblack@google.com */ 20312853Sgabeblack@google.com inline void switchToActive(); 20412853Sgabeblack@google.com 20512853Sgabeblack@google.com /** Changes the status of this stage to inactive, and indicates 20612853Sgabeblack@google.com * this to the CPU. 20712853Sgabeblack@google.com */ 20812853Sgabeblack@google.com inline void switchToInactive(); 20912853Sgabeblack@google.com 21012853Sgabeblack@google.com /** 21112853Sgabeblack@google.com * Looks up in the branch predictor to see if the next PC should be 21212853Sgabeblack@google.com * either next PC+=MachInst or a branch target. 21312853Sgabeblack@google.com * @param next_PC Next PC variable passed in by reference. It is 21412853Sgabeblack@google.com * expected to be set to the current PC; it will be updated with what 21512853Sgabeblack@google.com * the next PC will be. 21612853Sgabeblack@google.com * @return Whether or not a branch was predicted as taken. 21712853Sgabeblack@google.com */ 21812853Sgabeblack@google.com bool lookupAndUpdateNextPC(DynInstPtr &inst, Addr &next_PC); 21912853Sgabeblack@google.com 22012853Sgabeblack@google.com /** 22112853Sgabeblack@google.com * Fetches the cache line that contains fetch_PC. Returns any 22212853Sgabeblack@google.com * fault that happened. Puts the data into the class variable 22312853Sgabeblack@google.com * cacheData. 22412853Sgabeblack@google.com * @param fetch_PC The PC address that is being fetched from. 22512853Sgabeblack@google.com * @param ret_fault The fault reference that will be set to the result of 22612853Sgabeblack@google.com * the icache access. 22712853Sgabeblack@google.com * @param tid Thread id. 22812853Sgabeblack@google.com * @return Any fault that occured. 22912853Sgabeblack@google.com */ 23012853Sgabeblack@google.com bool fetchCacheLine(Addr fetch_PC, Fault &ret_fault, unsigned tid); 23112853Sgabeblack@google.com 23212853Sgabeblack@google.com /** Squashes a specific thread and resets the PC. */ 23312853Sgabeblack@google.com inline void doSquash(const Addr &new_PC, unsigned tid); 23412853Sgabeblack@google.com 23512853Sgabeblack@google.com /** Squashes a specific thread and resets the PC. Also tells the CPU to 23612853Sgabeblack@google.com * remove any instructions between fetch and decode that should be sqaushed. 23712853Sgabeblack@google.com */ 23812853Sgabeblack@google.com void squashFromDecode(const Addr &new_PC, const InstSeqNum &seq_num, 23912853Sgabeblack@google.com unsigned tid); 24012853Sgabeblack@google.com 24112853Sgabeblack@google.com /** Checks if a thread is stalled. */ 24212853Sgabeblack@google.com bool checkStall(unsigned tid) const; 24312853Sgabeblack@google.com 24412853Sgabeblack@google.com /** Updates overall fetch stage status; to be called at the end of each 24512853Sgabeblack@google.com * cycle. */ 24612853Sgabeblack@google.com FetchStatus updateFetchStatus(); 24712853Sgabeblack@google.com 24812853Sgabeblack@google.com public: 24912853Sgabeblack@google.com /** Squashes a specific thread and resets the PC. Also tells the CPU to 25012853Sgabeblack@google.com * remove any instructions that are not in the ROB. The source of this 25112853Sgabeblack@google.com * squash should be the commit stage. 25212853Sgabeblack@google.com */ 25312853Sgabeblack@google.com void squash(const Addr &new_PC, unsigned tid); 25412853Sgabeblack@google.com 25512853Sgabeblack@google.com /** Ticks the fetch stage, processing all inputs signals and fetching 25612853Sgabeblack@google.com * as many instructions as possible. 25712853Sgabeblack@google.com */ 25812853Sgabeblack@google.com void tick(); 25912853Sgabeblack@google.com 26012853Sgabeblack@google.com /** Checks all input signals and updates the status as necessary. 26112853Sgabeblack@google.com * @return: Returns if the status has changed due to input signals. 26212853Sgabeblack@google.com */ 26312853Sgabeblack@google.com bool checkSignalsAndUpdate(unsigned tid); 26412853Sgabeblack@google.com 26512853Sgabeblack@google.com /** Does the actual fetching of instructions and passing them on to the 26612853Sgabeblack@google.com * next stage. 26712853Sgabeblack@google.com * @param status_change fetch() sets this variable if there was a status 26812853Sgabeblack@google.com * change (ie switching to IcacheMissStall). 26912853Sgabeblack@google.com */ 27012853Sgabeblack@google.com void fetch(bool &status_change); 27112853Sgabeblack@google.com 27212853Sgabeblack@google.com /** Align a PC to the start of an I-cache block. */ 27312853Sgabeblack@google.com Addr icacheBlockAlignPC(Addr addr) 27412853Sgabeblack@google.com { 27512853Sgabeblack@google.com addr = TheISA::realPCToFetchPC(addr); 27612853Sgabeblack@google.com return (addr & ~(cacheBlkMask)); 27712853Sgabeblack@google.com } 27812853Sgabeblack@google.com 27912853Sgabeblack@google.com private: 28012853Sgabeblack@google.com /** Handles retrying the fetch access. */ 28112853Sgabeblack@google.com void recvRetry(); 28212853Sgabeblack@google.com 28312853Sgabeblack@google.com /** Returns the appropriate thread to fetch, given the fetch policy. */ 28412853Sgabeblack@google.com int getFetchingThread(FetchPriority &fetch_priority); 28512853Sgabeblack@google.com 28612853Sgabeblack@google.com /** Returns the appropriate thread to fetch using a round robin policy. */ 28712853Sgabeblack@google.com int roundRobin(); 28812853Sgabeblack@google.com 28912853Sgabeblack@google.com /** Returns the appropriate thread to fetch using the IQ count policy. */ 29012853Sgabeblack@google.com int iqCount(); 29112853Sgabeblack@google.com 29212853Sgabeblack@google.com /** Returns the appropriate thread to fetch using the LSQ count policy. */ 29312853Sgabeblack@google.com int lsqCount(); 29412853Sgabeblack@google.com 29512853Sgabeblack@google.com /** Returns the appropriate thread to fetch using the branch count policy. */ 29612853Sgabeblack@google.com int branchCount(); 29712853Sgabeblack@google.com 29812853Sgabeblack@google.com private: 29912853Sgabeblack@google.com /** Pointer to the O3CPU. */ 30012853Sgabeblack@google.com O3CPU *cpu; 30112853Sgabeblack@google.com 30212853Sgabeblack@google.com /** Time buffer interface. */ 30312853Sgabeblack@google.com TimeBuffer<TimeStruct> *timeBuffer; 30412853Sgabeblack@google.com 30512853Sgabeblack@google.com /** Wire to get decode's information from backwards time buffer. */ 30612853Sgabeblack@google.com typename TimeBuffer<TimeStruct>::wire fromDecode; 30712853Sgabeblack@google.com 30812853Sgabeblack@google.com /** Wire to get rename's information from backwards time buffer. */ 30912853Sgabeblack@google.com typename TimeBuffer<TimeStruct>::wire fromRename; 31012853Sgabeblack@google.com 31112853Sgabeblack@google.com /** Wire to get iew's information from backwards time buffer. */ 31212853Sgabeblack@google.com typename TimeBuffer<TimeStruct>::wire fromIEW; 31312853Sgabeblack@google.com 31412853Sgabeblack@google.com /** Wire to get commit's information from backwards time buffer. */ 31512853Sgabeblack@google.com typename TimeBuffer<TimeStruct>::wire fromCommit; 31612853Sgabeblack@google.com 31712853Sgabeblack@google.com /** Internal fetch instruction queue. */ 31812853Sgabeblack@google.com TimeBuffer<FetchStruct> *fetchQueue; 31912853Sgabeblack@google.com 32012853Sgabeblack@google.com //Might be annoying how this name is different than the queue. 32112853Sgabeblack@google.com /** Wire used to write any information heading to decode. */ 32212853Sgabeblack@google.com typename TimeBuffer<FetchStruct>::wire toDecode; 32312853Sgabeblack@google.com 32412853Sgabeblack@google.com MemObject *mem; 32512853Sgabeblack@google.com 32612853Sgabeblack@google.com /** Icache interface. */ 32712853Sgabeblack@google.com IcachePort *icachePort; 32812853Sgabeblack@google.com 32912853Sgabeblack@google.com /** BPredUnit. */ 33012853Sgabeblack@google.com BPredUnit branchPred; 33112853Sgabeblack@google.com 33212853Sgabeblack@google.com /** Per-thread fetch PC. */ 33312853Sgabeblack@google.com Addr PC[Impl::MaxThreads]; 33412853Sgabeblack@google.com 33512853Sgabeblack@google.com /** Per-thread next PC. */ 33612853Sgabeblack@google.com Addr nextPC[Impl::MaxThreads]; 33712853Sgabeblack@google.com 33812853Sgabeblack@google.com /** Memory request used to access cache. */ 33912853Sgabeblack@google.com RequestPtr memReq[Impl::MaxThreads]; 34012853Sgabeblack@google.com 34112853Sgabeblack@google.com /** Variable that tracks if fetch has written to the time buffer this 34212853Sgabeblack@google.com * cycle. Used to tell CPU if there is activity this cycle. 34312853Sgabeblack@google.com */ 34412853Sgabeblack@google.com bool wroteToTimeBuffer; 34512853Sgabeblack@google.com 34612853Sgabeblack@google.com /** Tracks how many instructions has been fetched this cycle. */ 34712853Sgabeblack@google.com int numInst; 34812853Sgabeblack@google.com 34912853Sgabeblack@google.com /** Source of possible stalls. */ 35012853Sgabeblack@google.com struct Stalls { 35112853Sgabeblack@google.com bool decode; 35212853Sgabeblack@google.com bool rename; 35312853Sgabeblack@google.com bool iew; 35412853Sgabeblack@google.com bool commit; 35512853Sgabeblack@google.com }; 35612853Sgabeblack@google.com 35712853Sgabeblack@google.com /** Tracks which stages are telling fetch to stall. */ 35812853Sgabeblack@google.com Stalls stalls[Impl::MaxThreads]; 35912853Sgabeblack@google.com 36012853Sgabeblack@google.com /** Decode to fetch delay, in ticks. */ 36112853Sgabeblack@google.com unsigned decodeToFetchDelay; 36212853Sgabeblack@google.com 36312853Sgabeblack@google.com /** Rename to fetch delay, in ticks. */ 36412853Sgabeblack@google.com unsigned renameToFetchDelay; 36512853Sgabeblack@google.com 36612853Sgabeblack@google.com /** IEW to fetch delay, in ticks. */ 36712853Sgabeblack@google.com unsigned iewToFetchDelay; 36812853Sgabeblack@google.com 36912853Sgabeblack@google.com /** Commit to fetch delay, in ticks. */ 37012853Sgabeblack@google.com unsigned commitToFetchDelay; 37112853Sgabeblack@google.com 37212853Sgabeblack@google.com /** The width of fetch in instructions. */ 37312853Sgabeblack@google.com unsigned fetchWidth; 37412853Sgabeblack@google.com 37512853Sgabeblack@google.com /** Is the cache blocked? If so no threads can access it. */ 37612853Sgabeblack@google.com bool cacheBlocked; 37712853Sgabeblack@google.com 37812853Sgabeblack@google.com /** The packet that is waiting to be retried. */ 37912853Sgabeblack@google.com PacketPtr retryPkt; 38012853Sgabeblack@google.com 38112853Sgabeblack@google.com /** The thread that is waiting on the cache to tell fetch to retry. */ 38212853Sgabeblack@google.com int retryTid; 38312853Sgabeblack@google.com 38412853Sgabeblack@google.com /** Cache block size. */ 38512853Sgabeblack@google.com int cacheBlkSize; 38612853Sgabeblack@google.com 38712853Sgabeblack@google.com /** Mask to get a cache block's address. */ 38812853Sgabeblack@google.com Addr cacheBlkMask; 38912853Sgabeblack@google.com 39012853Sgabeblack@google.com /** The cache line being fetched. */ 39112853Sgabeblack@google.com uint8_t *cacheData[Impl::MaxThreads]; 39212853Sgabeblack@google.com 39312853Sgabeblack@google.com /** Size of instructions. */ 39412853Sgabeblack@google.com int instSize; 39512853Sgabeblack@google.com 39612853Sgabeblack@google.com /** Icache stall statistics. */ 39712853Sgabeblack@google.com Counter lastIcacheStall[Impl::MaxThreads]; 39812853Sgabeblack@google.com 39912853Sgabeblack@google.com /** List of Active Threads */ 40012853Sgabeblack@google.com std::list<unsigned> *activeThreads; 40112853Sgabeblack@google.com 40212853Sgabeblack@google.com /** Number of threads. */ 40312853Sgabeblack@google.com unsigned numThreads; 40412853Sgabeblack@google.com 40512853Sgabeblack@google.com /** Number of threads that are actively fetching. */ 40612853Sgabeblack@google.com unsigned numFetchingThreads; 40712853Sgabeblack@google.com 40812853Sgabeblack@google.com /** Thread ID being fetched. */ 40912853Sgabeblack@google.com int threadFetched; 41012853Sgabeblack@google.com 41112853Sgabeblack@google.com /** Checks if there is an interrupt pending. If there is, fetch 41212853Sgabeblack@google.com * must stop once it is not fetching PAL instructions. 41312853Sgabeblack@google.com */ 41412853Sgabeblack@google.com bool interruptPending; 41512853Sgabeblack@google.com 41612853Sgabeblack@google.com /** Records if fetch is switched out. */ 41712853Sgabeblack@google.com bool switchedOut; 41812853Sgabeblack@google.com 41912853Sgabeblack@google.com // @todo: Consider making these vectors and tracking on a per thread basis. 42012853Sgabeblack@google.com /** Stat for total number of cycles stalled due to an icache miss. */ 42112853Sgabeblack@google.com Stats::Scalar<> icacheStallCycles; 42212853Sgabeblack@google.com /** Stat for total number of fetched instructions. */ 42312853Sgabeblack@google.com Stats::Scalar<> fetchedInsts; 42412853Sgabeblack@google.com /** Total number of fetched branches. */ 42512853Sgabeblack@google.com Stats::Scalar<> fetchedBranches; 42612853Sgabeblack@google.com /** Stat for total number of predicted branches. */ 42712853Sgabeblack@google.com Stats::Scalar<> predictedBranches; 42812853Sgabeblack@google.com /** Stat for total number of cycles spent fetching. */ 42912853Sgabeblack@google.com Stats::Scalar<> fetchCycles; 43012853Sgabeblack@google.com /** Stat for total number of cycles spent squashing. */ 43112853Sgabeblack@google.com Stats::Scalar<> fetchSquashCycles; 43212853Sgabeblack@google.com /** Stat for total number of cycles spent blocked due to other stages in 43312853Sgabeblack@google.com * the pipeline. 43412853Sgabeblack@google.com */ 43512853Sgabeblack@google.com Stats::Scalar<> fetchIdleCycles; 43612853Sgabeblack@google.com /** Total number of cycles spent blocked. */ 43712853Sgabeblack@google.com Stats::Scalar<> fetchBlockedCycles; 43812853Sgabeblack@google.com /** Total number of cycles spent in any other state. */ 43912853Sgabeblack@google.com Stats::Scalar<> fetchMiscStallCycles; 44012853Sgabeblack@google.com /** Stat for total number of fetched cache lines. */ 44112853Sgabeblack@google.com Stats::Scalar<> fetchedCacheLines; 44212853Sgabeblack@google.com /** Total number of outstanding icache accesses that were dropped 44312853Sgabeblack@google.com * due to a squash. 44412853Sgabeblack@google.com */ 44512853Sgabeblack@google.com Stats::Scalar<> fetchIcacheSquashes; 44612853Sgabeblack@google.com /** Distribution of number of instructions fetched each cycle. */ 44712853Sgabeblack@google.com Stats::Distribution<> fetchNisnDist; 44812853Sgabeblack@google.com /** Rate of how often fetch was idle. */ 44912853Sgabeblack@google.com Stats::Formula idleRate; 45012853Sgabeblack@google.com /** Number of branch fetches per cycle. */ 45112853Sgabeblack@google.com Stats::Formula branchRate; 45212853Sgabeblack@google.com /** Number of instruction fetched per cycle. */ 45312853Sgabeblack@google.com Stats::Formula fetchRate; 45412853Sgabeblack@google.com}; 45512853Sgabeblack@google.com 45612853Sgabeblack@google.com#endif //__CPU_O3_FETCH_HH__ 45712853Sgabeblack@google.com