dyn_inst_impl.hh revision 8809:bb10807da889
112855Sgabeblack@google.com/* 212855Sgabeblack@google.com * Copyright (c) 2010-2011 ARM Limited 312855Sgabeblack@google.com * All rights reserved 412855Sgabeblack@google.com * 512855Sgabeblack@google.com * The license below extends only to copyright in the software and shall 612855Sgabeblack@google.com * not be construed as granting a license to any other intellectual 712855Sgabeblack@google.com * property including but not limited to intellectual property relating 812855Sgabeblack@google.com * to a hardware implementation of the functionality of the software 912855Sgabeblack@google.com * licensed hereunder. You may use the software subject to the license 1012855Sgabeblack@google.com * terms below provided that you ensure that this notice is replicated 1112855Sgabeblack@google.com * unmodified and in its entirety in all distributions of the software, 1212855Sgabeblack@google.com * modified or unmodified, in source code or in binary form. 1312855Sgabeblack@google.com * 1412855Sgabeblack@google.com * Copyright (c) 2004-2006 The Regents of The University of Michigan 1512855Sgabeblack@google.com * All rights reserved. 1612855Sgabeblack@google.com * 1712855Sgabeblack@google.com * Redistribution and use in source and binary forms, with or without 1812855Sgabeblack@google.com * modification, are permitted provided that the following conditions are 1912855Sgabeblack@google.com * met: redistributions of source code must retain the above copyright 2012855Sgabeblack@google.com * notice, this list of conditions and the following disclaimer; 2112855Sgabeblack@google.com * redistributions in binary form must reproduce the above copyright 2212855Sgabeblack@google.com * notice, this list of conditions and the following disclaimer in the 2312855Sgabeblack@google.com * documentation and/or other materials provided with the distribution; 2412855Sgabeblack@google.com * neither the name of the copyright holders nor the names of its 2512855Sgabeblack@google.com * contributors may be used to endorse or promote products derived from 2612855Sgabeblack@google.com * this software without specific prior written permission. 2712855Sgabeblack@google.com * 2812855Sgabeblack@google.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2912855Sgabeblack@google.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 3012855Sgabeblack@google.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 3112855Sgabeblack@google.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 3212855Sgabeblack@google.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3312855Sgabeblack@google.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3412855Sgabeblack@google.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3512855Sgabeblack@google.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3612855Sgabeblack@google.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3712855Sgabeblack@google.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3812855Sgabeblack@google.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3912855Sgabeblack@google.com * 4012855Sgabeblack@google.com * Authors: Kevin Lim 4112855Sgabeblack@google.com */ 4212855Sgabeblack@google.com 4312855Sgabeblack@google.com#include "base/cp_annotate.hh" 4412855Sgabeblack@google.com#include "config/use_checker.hh" 4512855Sgabeblack@google.com#include "cpu/o3/dyn_inst.hh" 4612855Sgabeblack@google.com#include "sim/full_system.hh" 4712855Sgabeblack@google.com 4812855Sgabeblack@google.comtemplate <class Impl> 4912855Sgabeblack@google.comBaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr staticInst, 5012855Sgabeblack@google.com StaticInstPtr macroop, 5112855Sgabeblack@google.com TheISA::PCState pc, TheISA::PCState predPC, 5212855Sgabeblack@google.com InstSeqNum seq_num, O3CPU *cpu) 5312855Sgabeblack@google.com : BaseDynInst<Impl>(staticInst, macroop, pc, predPC, seq_num, cpu) 5412855Sgabeblack@google.com{ 5512855Sgabeblack@google.com initVars(); 5612855Sgabeblack@google.com} 5712855Sgabeblack@google.com 5812855Sgabeblack@google.comtemplate <class Impl> 5912855Sgabeblack@google.comBaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr _staticInst, 6012855Sgabeblack@google.com StaticInstPtr _macroop) 6112855Sgabeblack@google.com : BaseDynInst<Impl>(_staticInst, _macroop) 6212855Sgabeblack@google.com{ 6312855Sgabeblack@google.com initVars(); 6412855Sgabeblack@google.com} 6512855Sgabeblack@google.com 6612855Sgabeblack@google.comtemplate <class Impl> 6712855Sgabeblack@google.comvoid 6812855Sgabeblack@google.comBaseO3DynInst<Impl>::initVars() 6912855Sgabeblack@google.com{ 7012855Sgabeblack@google.com // Make sure to have the renamed register entries set to the same 7112855Sgabeblack@google.com // as the normal register entries. It will allow the IQ to work 7212855Sgabeblack@google.com // without any modifications. 7312855Sgabeblack@google.com for (int i = 0; i < this->staticInst->numDestRegs(); i++) { 7412855Sgabeblack@google.com this->_destRegIdx[i] = this->staticInst->destRegIdx(i); 7512855Sgabeblack@google.com } 7612855Sgabeblack@google.com 7712855Sgabeblack@google.com for (int i = 0; i < this->staticInst->numSrcRegs(); i++) { 7812855Sgabeblack@google.com this->_srcRegIdx[i] = this->staticInst->srcRegIdx(i); 7912855Sgabeblack@google.com this->_readySrcRegIdx[i] = 0; 8012855Sgabeblack@google.com } 8112855Sgabeblack@google.com 8212855Sgabeblack@google.com _numDestMiscRegs = 0; 8312855Sgabeblack@google.com 8412855Sgabeblack@google.com#if TRACING_ON 8512855Sgabeblack@google.com fetchTick = 0; 8612855Sgabeblack@google.com decodeTick = 0; 8712855Sgabeblack@google.com renameTick = 0; 8812855Sgabeblack@google.com dispatchTick = 0; 8912855Sgabeblack@google.com issueTick = 0; 9012855Sgabeblack@google.com completeTick = 0; 9112855Sgabeblack@google.com#endif 9212855Sgabeblack@google.com} 9312855Sgabeblack@google.com 9412855Sgabeblack@google.comtemplate <class Impl> 9512855Sgabeblack@google.comFault 9612855Sgabeblack@google.comBaseO3DynInst<Impl>::execute() 9712855Sgabeblack@google.com{ 9812855Sgabeblack@google.com // @todo: Pretty convoluted way to avoid squashing from happening 9912855Sgabeblack@google.com // when using the TC during an instruction's execution 10012855Sgabeblack@google.com // (specifically for instructions that have side-effects that use 10112855Sgabeblack@google.com // the TC). Fix this. 10212855Sgabeblack@google.com bool in_syscall = this->thread->inSyscall; 10312855Sgabeblack@google.com this->thread->inSyscall = true; 10412855Sgabeblack@google.com 10512855Sgabeblack@google.com this->fault = this->staticInst->execute(this, this->traceData); 10612855Sgabeblack@google.com 10712855Sgabeblack@google.com this->thread->inSyscall = in_syscall; 10812855Sgabeblack@google.com 10912855Sgabeblack@google.com return this->fault; 11012855Sgabeblack@google.com} 11112855Sgabeblack@google.com 11212855Sgabeblack@google.comtemplate <class Impl> 11312855Sgabeblack@google.comFault 11412855Sgabeblack@google.comBaseO3DynInst<Impl>::initiateAcc() 11512855Sgabeblack@google.com{ 11612855Sgabeblack@google.com // @todo: Pretty convoluted way to avoid squashing from happening 11712855Sgabeblack@google.com // when using the TC during an instruction's execution 11812855Sgabeblack@google.com // (specifically for instructions that have side-effects that use 11912855Sgabeblack@google.com // the TC). Fix this. 12012855Sgabeblack@google.com bool in_syscall = this->thread->inSyscall; 12112855Sgabeblack@google.com this->thread->inSyscall = true; 12212855Sgabeblack@google.com 12312855Sgabeblack@google.com this->fault = this->staticInst->initiateAcc(this, this->traceData); 12412855Sgabeblack@google.com 12512855Sgabeblack@google.com this->thread->inSyscall = in_syscall; 12612855Sgabeblack@google.com 12712855Sgabeblack@google.com return this->fault; 12812855Sgabeblack@google.com} 12912855Sgabeblack@google.com 13012855Sgabeblack@google.comtemplate <class Impl> 13112855Sgabeblack@google.comFault 13212855Sgabeblack@google.comBaseO3DynInst<Impl>::completeAcc(PacketPtr pkt) 13312855Sgabeblack@google.com{ 13412855Sgabeblack@google.com // @todo: Pretty convoluted way to avoid squashing from happening 13512855Sgabeblack@google.com // when using the TC during an instruction's execution 13612855Sgabeblack@google.com // (specifically for instructions that have side-effects that use 13712855Sgabeblack@google.com // the TC). Fix this. 13812855Sgabeblack@google.com bool in_syscall = this->thread->inSyscall; 13912855Sgabeblack@google.com this->thread->inSyscall = true; 14012855Sgabeblack@google.com 14112855Sgabeblack@google.com#if USE_CHECKER 14212855Sgabeblack@google.com if (this->isStoreConditional()) { 14312855Sgabeblack@google.com this->reqToVerify->setExtraData(pkt->req->getExtraData()); 14412855Sgabeblack@google.com } 14512855Sgabeblack@google.com#endif 14612855Sgabeblack@google.com this->fault = this->staticInst->completeAcc(pkt, this, this->traceData); 14712855Sgabeblack@google.com 14812855Sgabeblack@google.com this->thread->inSyscall = in_syscall; 14912855Sgabeblack@google.com 15012855Sgabeblack@google.com return this->fault; 15112855Sgabeblack@google.com} 15212855Sgabeblack@google.com 15312855Sgabeblack@google.comtemplate <class Impl> 15412855Sgabeblack@google.comFault 15512855Sgabeblack@google.comBaseO3DynInst<Impl>::hwrei() 15612855Sgabeblack@google.com{ 15712855Sgabeblack@google.com#if THE_ISA == ALPHA_ISA 15812855Sgabeblack@google.com // Can only do a hwrei when in pal mode. 15912855Sgabeblack@google.com if (!(this->instAddr() & 0x3)) 16012855Sgabeblack@google.com return new AlphaISA::UnimplementedOpcodeFault; 16112855Sgabeblack@google.com 16212855Sgabeblack@google.com // Set the next PC based on the value of the EXC_ADDR IPR. 16312855Sgabeblack@google.com AlphaISA::PCState pc = this->pcState(); 16412855Sgabeblack@google.com pc.npc(this->cpu->readMiscRegNoEffect(AlphaISA::IPR_EXC_ADDR, 16512855Sgabeblack@google.com this->threadNumber)); 16612855Sgabeblack@google.com this->pcState(pc); 16712855Sgabeblack@google.com if (CPA::available()) { 16812855Sgabeblack@google.com ThreadContext *tc = this->cpu->tcBase(this->threadNumber); 16912855Sgabeblack@google.com CPA::cpa()->swAutoBegin(tc, this->nextInstAddr()); 17012855Sgabeblack@google.com } 17112855Sgabeblack@google.com 17212855Sgabeblack@google.com // Tell CPU to clear any state it needs to if a hwrei is taken. 17312855Sgabeblack@google.com this->cpu->hwrei(this->threadNumber); 17412855Sgabeblack@google.com#else 17512855Sgabeblack@google.com 17612855Sgabeblack@google.com#endif 17712855Sgabeblack@google.com // FIXME: XXX check for interrupts? XXX 17812855Sgabeblack@google.com return NoFault; 17912855Sgabeblack@google.com} 18012855Sgabeblack@google.com 18112855Sgabeblack@google.comtemplate <class Impl> 18212855Sgabeblack@google.comvoid 18312855Sgabeblack@google.comBaseO3DynInst<Impl>::trap(Fault fault) 18412855Sgabeblack@google.com{ 18512855Sgabeblack@google.com this->cpu->trap(fault, this->threadNumber, this->staticInst); 18612855Sgabeblack@google.com} 18712855Sgabeblack@google.com 18812855Sgabeblack@google.comtemplate <class Impl> 18912855Sgabeblack@google.combool 19012855Sgabeblack@google.comBaseO3DynInst<Impl>::simPalCheck(int palFunc) 19112855Sgabeblack@google.com{ 19212855Sgabeblack@google.com#if THE_ISA != ALPHA_ISA 19312855Sgabeblack@google.com panic("simPalCheck called, but PAL only exists in Alpha!\n"); 19412855Sgabeblack@google.com#endif 19512855Sgabeblack@google.com return this->cpu->simPalCheck(palFunc, this->threadNumber); 19612855Sgabeblack@google.com} 19712855Sgabeblack@google.com 19812855Sgabeblack@google.comtemplate <class Impl> 19912855Sgabeblack@google.comvoid 20012855Sgabeblack@google.comBaseO3DynInst<Impl>::syscall(int64_t callnum) 20112855Sgabeblack@google.com{ 20212855Sgabeblack@google.com if (FullSystem) 20312855Sgabeblack@google.com panic("Syscall emulation isn't available in FS mode.\n"); 20412855Sgabeblack@google.com 20512855Sgabeblack@google.com // HACK: check CPU's nextPC before and after syscall. If it 20612855Sgabeblack@google.com // changes, update this instruction's nextPC because the syscall 20712855Sgabeblack@google.com // must have changed the nextPC. 20812855Sgabeblack@google.com TheISA::PCState curPC = this->cpu->pcState(this->threadNumber); 20912855Sgabeblack@google.com this->cpu->syscall(callnum, this->threadNumber); 21012855Sgabeblack@google.com TheISA::PCState newPC = this->cpu->pcState(this->threadNumber); 21112855Sgabeblack@google.com if (!(curPC == newPC)) { 21212855Sgabeblack@google.com this->pcState(newPC); 21312855Sgabeblack@google.com } 21412855Sgabeblack@google.com} 21512876Sgabeblack@google.com 21612855Sgabeblack@google.com