checker.cc revision 8733
1/* 2 * Copyright (c) 2011 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2006 The Regents of The University of Michigan 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Kevin Lim 41 */ 42 43#include <string> 44 45#include "cpu/checker/cpu_impl.hh" 46#include "cpu/o3/dyn_inst.hh" 47#include "cpu/o3/impl.hh" 48#include "cpu/inst_seq.hh" 49#include "params/O3Checker.hh" 50#include "sim/process.hh" 51#include "sim/sim_object.hh" 52 53class MemObject; 54 55template 56class Checker<O3CPUImpl>; 57 58/** 59 * Specific non-templated derived class used for SimObject configuration. 60 */ 61class O3Checker : public Checker<O3CPUImpl> 62{ 63 public: 64 O3Checker(Params *p) 65 : Checker<O3CPUImpl>(p) 66 { } 67}; 68 69//////////////////////////////////////////////////////////////////////// 70// 71// CheckerCPU Simulation Object 72// 73O3Checker * 74O3CheckerParams::create() 75{ 76 O3Checker::Params *params = new O3Checker::Params(); 77 params->name = name; 78 params->numThreads = numThreads; 79 params->max_insts_any_thread = 0; 80 params->max_insts_all_threads = 0; 81 params->max_loads_any_thread = 0; 82 params->max_loads_all_threads = 0; 83 params->exitOnError = exitOnError; 84 params->updateOnError = updateOnError; 85 params->warnOnlyOnLoadError = warnOnlyOnLoadError; 86 params->clock = clock; 87 params->tracer = tracer; 88 // Hack to touch all parameters. Consider not deriving Checker 89 // from BaseCPU..it's not really a CPU in the end. 90 Counter temp; 91 temp = max_insts_any_thread; 92 temp = max_insts_all_threads; 93 temp = max_loads_any_thread; 94 temp = max_loads_all_threads; 95 Tick temp2 = progress_interval; 96 params->progress_interval = 0; 97 temp2++; 98 99 params->itb = itb; 100 params->dtb = dtb; 101 params->system = system; 102 params->cpu_id = cpu_id; 103#if FULL_SYSTEM 104 params->profile = profile; 105 params->interrupts = NULL; 106#else 107 params->workload = workload; 108#endif 109 110 O3Checker *cpu = new O3Checker(params); 111 return cpu; 112} 113