checker.cc revision 2315
13534Sgblack@eecs.umich.edu 23534Sgblack@eecs.umich.edu#include <string> 33534Sgblack@eecs.umich.edu 43534Sgblack@eecs.umich.edu#include "cpu/checker/cpu.hh" 53534Sgblack@eecs.umich.edu#include "cpu/inst_seq.hh" 63534Sgblack@eecs.umich.edu#include "cpu/o3/alpha_dyn_inst.hh" 73534Sgblack@eecs.umich.edu#include "cpu/o3/alpha_impl.hh" 83534Sgblack@eecs.umich.edu#include "mem/base_mem.hh" 93534Sgblack@eecs.umich.edu#include "sim/builder.hh" 103534Sgblack@eecs.umich.edu#include "sim/process.hh" 113534Sgblack@eecs.umich.edu#include "sim/sim_object.hh" 123534Sgblack@eecs.umich.edu 133534Sgblack@eecs.umich.educlass O3Checker : public Checker<RefCountingPtr<AlphaDynInst<AlphaSimpleImpl> > > 143534Sgblack@eecs.umich.edu{ 153534Sgblack@eecs.umich.edu public: 163534Sgblack@eecs.umich.edu O3Checker(Params *p) 173534Sgblack@eecs.umich.edu : Checker<RefCountingPtr<AlphaDynInst<AlphaSimpleImpl> > >(p) 183534Sgblack@eecs.umich.edu { } 193534Sgblack@eecs.umich.edu}; 203534Sgblack@eecs.umich.edu 213534Sgblack@eecs.umich.edu//////////////////////////////////////////////////////////////////////// 223534Sgblack@eecs.umich.edu// 233534Sgblack@eecs.umich.edu// CheckerCPU Simulation Object 243534Sgblack@eecs.umich.edu// 253534Sgblack@eecs.umich.eduBEGIN_DECLARE_SIM_OBJECT_PARAMS(O3Checker) 263534Sgblack@eecs.umich.edu 273534Sgblack@eecs.umich.edu Param<Counter> max_insts_any_thread; 283534Sgblack@eecs.umich.edu Param<Counter> max_insts_all_threads; 293534Sgblack@eecs.umich.edu Param<Counter> max_loads_any_thread; 303534Sgblack@eecs.umich.edu Param<Counter> max_loads_all_threads; 313534Sgblack@eecs.umich.edu 324202Sbinkertn@umich.edu#if FULL_SYSTEM 333534Sgblack@eecs.umich.edu SimObjectParam<AlphaITB *> itb; 347768SAli.Saidi@ARM.com SimObjectParam<AlphaDTB *> dtb; 357768SAli.Saidi@ARM.com SimObjectParam<FunctionalMemory *> mem; 367768SAli.Saidi@ARM.com SimObjectParam<System *> system; 374202Sbinkertn@umich.edu Param<int> cpu_id; 384486Sbinkertn@umich.edu Param<Tick> profile; 395794Ssaidi@eecs.umich.edu#else 404486Sbinkertn@umich.edu SimObjectParam<Process *> workload; 414486Sbinkertn@umich.edu#endif // FULL_SYSTEM 424486Sbinkertn@umich.edu Param<int> clock; 434486Sbinkertn@umich.edu SimObjectParam<BaseMem *> icache; 444486Sbinkertn@umich.edu SimObjectParam<BaseMem *> dcache; 454486Sbinkertn@umich.edu 464486Sbinkertn@umich.edu Param<bool> defer_registration; 475478Snate@binkert.org Param<bool> exitOnError; 484486Sbinkertn@umich.edu Param<bool> function_trace; 494486Sbinkertn@umich.edu Param<Tick> function_trace_start; 504202Sbinkertn@umich.edu 515794Ssaidi@eecs.umich.eduEND_DECLARE_SIM_OBJECT_PARAMS(O3Checker) 524202Sbinkertn@umich.edu 534202Sbinkertn@umich.eduBEGIN_INIT_SIM_OBJECT_PARAMS(O3Checker) 545485Snate@binkert.org 554202Sbinkertn@umich.edu INIT_PARAM(max_insts_any_thread, 564202Sbinkertn@umich.edu "terminate when any thread reaches this inst count"), 574202Sbinkertn@umich.edu INIT_PARAM(max_insts_all_threads, 584202Sbinkertn@umich.edu "terminate when all threads have reached this inst count"), 594762Snate@binkert.org INIT_PARAM(max_loads_any_thread, 604218Ssaidi@eecs.umich.edu "terminate when any thread reaches this load count"), 614202Sbinkertn@umich.edu INIT_PARAM(max_loads_all_threads, 624202Sbinkertn@umich.edu "terminate when all threads have reached this load count"), 635443Sgblack@eecs.umich.edu 644202Sbinkertn@umich.edu#if FULL_SYSTEM 654202Sbinkertn@umich.edu INIT_PARAM(itb, "Instruction TLB"), 665392Sgblack@eecs.umich.edu INIT_PARAM(dtb, "Data TLB"), 674202Sbinkertn@umich.edu INIT_PARAM(mem, "memory"), 684202Sbinkertn@umich.edu INIT_PARAM(system, "system object"), 694202Sbinkertn@umich.edu INIT_PARAM(cpu_id, "processor ID"), 704202Sbinkertn@umich.edu INIT_PARAM(profile, ""), 714202Sbinkertn@umich.edu#else 724202Sbinkertn@umich.edu INIT_PARAM(workload, "processes to run"), 734762Snate@binkert.org#endif // FULL_SYSTEM 745478Snate@binkert.org 754202Sbinkertn@umich.edu INIT_PARAM(clock, "clock speed"), 764202Sbinkertn@umich.edu INIT_PARAM(icache, "L1 instruction cache object"), 775192Ssaidi@eecs.umich.edu INIT_PARAM(dcache, "L1 data cache object"), 785192Ssaidi@eecs.umich.edu 795192Ssaidi@eecs.umich.edu INIT_PARAM(defer_registration, "defer system registration (for sampling)"), 805192Ssaidi@eecs.umich.edu INIT_PARAM(exitOnError, "exit on error"), 815794Ssaidi@eecs.umich.edu INIT_PARAM(function_trace, "Enable function trace"), 825192Ssaidi@eecs.umich.edu INIT_PARAM(function_trace_start, "Cycle to start function trace") 835192Ssaidi@eecs.umich.edu 845192Ssaidi@eecs.umich.eduEND_INIT_SIM_OBJECT_PARAMS(O3Checker) 855192Ssaidi@eecs.umich.edu 865192Ssaidi@eecs.umich.edu 875192Ssaidi@eecs.umich.eduCREATE_SIM_OBJECT(O3Checker) 885192Ssaidi@eecs.umich.edu{ 895192Ssaidi@eecs.umich.edu O3Checker::Params *params = new O3Checker::Params(); 905192Ssaidi@eecs.umich.edu params->name = getInstanceName(); 915192Ssaidi@eecs.umich.edu params->numberOfThreads = 1; 925192Ssaidi@eecs.umich.edu params->max_insts_any_thread = 0; 935443Sgblack@eecs.umich.edu params->max_insts_all_threads = 0; 945192Ssaidi@eecs.umich.edu params->max_loads_any_thread = 0; 955392Sgblack@eecs.umich.edu params->max_loads_all_threads = 0; 965192Ssaidi@eecs.umich.edu params->exitOnError = exitOnError; 975192Ssaidi@eecs.umich.edu params->deferRegistration = defer_registration; 985192Ssaidi@eecs.umich.edu params->functionTrace = function_trace; 995192Ssaidi@eecs.umich.edu params->functionTraceStart = function_trace_start; 1005478Snate@binkert.org params->clock = clock; 1015478Snate@binkert.org // Hack to touch all parameters. Consider not deriving Checker 1025192Ssaidi@eecs.umich.edu // from BaseCPU..it's not really a CPU in the end. 1035192Ssaidi@eecs.umich.edu Counter temp; 1045192Ssaidi@eecs.umich.edu temp = max_insts_any_thread; 1055192Ssaidi@eecs.umich.edu temp = max_insts_all_threads; 1065192Ssaidi@eecs.umich.edu temp = max_loads_any_thread; 1075763Ssaidi@eecs.umich.edu temp = max_loads_all_threads; 1085192Ssaidi@eecs.umich.edu BaseMem *cache = icache; 1095192Ssaidi@eecs.umich.edu cache = dcache; 1105192Ssaidi@eecs.umich.edu 1115192Ssaidi@eecs.umich.edu#if FULL_SYSTEM 112 params->itb = itb; 113 params->dtb = dtb; 114 params->mem = mem; 115 params->system = system; 116 params->cpu_id = cpu_id; 117 params->profile = profile; 118#else 119 params->process = workload; 120#endif 121 122 O3Checker *cpu = new O3Checker(params); 123 return cpu; 124} 125 126REGISTER_SIM_OBJECT("O3Checker", O3Checker) 127