checker.cc revision 11793
1955SN/A/*
2955SN/A * Copyright (c) 2011 ARM Limited
31762SN/A * All rights reserved
4955SN/A *
5955SN/A * The license below extends only to copyright in the software and shall
6955SN/A * not be construed as granting a license to any other intellectual
7955SN/A * property including but not limited to intellectual property relating
8955SN/A * to a hardware implementation of the functionality of the software
9955SN/A * licensed hereunder.  You may use the software subject to the license
10955SN/A * terms below provided that you ensure that this notice is replicated
11955SN/A * unmodified and in its entirety in all distributions of the software,
12955SN/A * modified or unmodified, in source code or in binary form.
13955SN/A *
14955SN/A * Copyright (c) 2006 The Regents of The University of Michigan
15955SN/A * All rights reserved.
16955SN/A *
17955SN/A * Redistribution and use in source and binary forms, with or without
18955SN/A * modification, are permitted provided that the following conditions are
19955SN/A * met: redistributions of source code must retain the above copyright
20955SN/A * notice, this list of conditions and the following disclaimer;
21955SN/A * redistributions in binary form must reproduce the above copyright
22955SN/A * notice, this list of conditions and the following disclaimer in the
23955SN/A * documentation and/or other materials provided with the distribution;
24955SN/A * neither the name of the copyright holders nor the names of its
25955SN/A * contributors may be used to endorse or promote products derived from
26955SN/A * this software without specific prior written permission.
27955SN/A *
282665Ssaidi@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
292665Ssaidi@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30955SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31955SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32955SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33955SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34955SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
352632Sstever@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
362632Sstever@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
372632Sstever@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
382632Sstever@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39955SN/A *
402632Sstever@eecs.umich.edu * Authors: Kevin Lim
412632Sstever@eecs.umich.edu */
422761Sstever@eecs.umich.edu
432632Sstever@eecs.umich.edu#include "cpu/o3/checker.hh"
442632Sstever@eecs.umich.edu
452632Sstever@eecs.umich.edu#include "cpu/checker/cpu_impl.hh"
462761Sstever@eecs.umich.edu#include "params/O3Checker.hh"
472761Sstever@eecs.umich.edu
482761Sstever@eecs.umich.educlass MemObject;
492632Sstever@eecs.umich.edu
502632Sstever@eecs.umich.edutemplate
512761Sstever@eecs.umich.educlass Checker<O3CPUImpl>;
522761Sstever@eecs.umich.edu
532761Sstever@eecs.umich.edu////////////////////////////////////////////////////////////////////////
542761Sstever@eecs.umich.edu//
552761Sstever@eecs.umich.edu//  CheckerCPU Simulation Object
562632Sstever@eecs.umich.edu//
572632Sstever@eecs.umich.eduO3Checker *
582632Sstever@eecs.umich.eduO3CheckerParams::create()
592632Sstever@eecs.umich.edu{
602632Sstever@eecs.umich.edu    O3Checker::Params *params = new O3Checker::Params();
612632Sstever@eecs.umich.edu    params->name = name;
622632Sstever@eecs.umich.edu    params->numThreads = numThreads;
63955SN/A    params->max_insts_any_thread = 0;
64955SN/A    params->max_insts_all_threads = 0;
65955SN/A    params->max_loads_any_thread = 0;
66955SN/A    params->max_loads_all_threads = 0;
67955SN/A    params->exitOnError = exitOnError;
684202Sbinkertn@umich.edu    params->updateOnError = updateOnError;
694678Snate@binkert.org    params->warnOnlyOnLoadError = warnOnlyOnLoadError;
70955SN/A    params->clk_domain = clk_domain;
715273Sstever@gmail.com    params->tracer = tracer;
725273Sstever@gmail.com    // Hack to touch all parameters.  Consider not deriving Checker
732656Sstever@eecs.umich.edu    // from BaseCPU..it's not really a CPU in the end.
742656Sstever@eecs.umich.edu    Counter temp;
752656Sstever@eecs.umich.edu    temp = max_insts_any_thread;
762656Sstever@eecs.umich.edu    temp = max_insts_all_threads;
772656Sstever@eecs.umich.edu    temp = max_loads_any_thread;
782656Sstever@eecs.umich.edu    temp = max_loads_all_threads;
792656Sstever@eecs.umich.edu    temp++;
802653Sstever@eecs.umich.edu    Tick temp2 = progress_interval;
815227Ssaidi@eecs.umich.edu    params->progress_interval = 0;
825227Ssaidi@eecs.umich.edu    temp2++;
835227Ssaidi@eecs.umich.edu
845227Ssaidi@eecs.umich.edu    params->itb = itb;
852653Sstever@eecs.umich.edu    params->dtb = dtb;
862653Sstever@eecs.umich.edu    params->isa = isa;
872653Sstever@eecs.umich.edu    params->system = system;
882653Sstever@eecs.umich.edu    params->cpu_id = cpu_id;
892653Sstever@eecs.umich.edu    params->profile = profile;
902653Sstever@eecs.umich.edu    params->workload = workload;
912653Sstever@eecs.umich.edu
922653Sstever@eecs.umich.edu    O3Checker *cpu = new O3Checker(params);
932653Sstever@eecs.umich.edu    return cpu;
944781Snate@binkert.org}
951852SN/A