O3CPU.py revision 1681
1from BaseCPU import BaseCPU 2 3simobj DerivAlphaFullCPU(BaseCPU): 4 type = 'DerivAlphaFullCPU' 5 6 numThreads = Param.Unsigned("number of HW thread contexts") 7 8 if not build_env['FULL_SYSTEM']: 9 mem = Param.FunctionalMemory(NULL, "memory") 10 11 decodeToFetchDelay = Param.Unsigned("Decode to fetch delay") 12 renameToFetchDelay = Param.Unsigned("Rename to fetch delay") 13 iewToFetchDelay = Param.Unsigned("Issue/Execute/Writeback to fetch " 14 "delay") 15 commitToFetchDelay = Param.Unsigned("Commit to fetch delay") 16 fetchWidth = Param.Unsigned("Fetch width") 17 18 renameToDecodeDelay = Param.Unsigned("Rename to decode delay") 19 iewToDecodeDelay = Param.Unsigned("Issue/Execute/Writeback to decode " 20 "delay") 21 commitToDecodeDelay = Param.Unsigned("Commit to decode delay") 22 fetchToDecodeDelay = Param.Unsigned("Fetch to decode delay") 23 decodeWidth = Param.Unsigned("Decode width") 24 25 iewToRenameDelay = Param.Unsigned("Issue/Execute/Writeback to rename " 26 "delay") 27 commitToRenameDelay = Param.Unsigned("Commit to rename delay") 28 decodeToRenameDelay = Param.Unsigned("Decode to rename delay") 29 renameWidth = Param.Unsigned("Rename width") 30 31 commitToIEWDelay = Param.Unsigned("Commit to " 32 "Issue/Execute/Writeback delay") 33 renameToIEWDelay = Param.Unsigned("Rename to " 34 "Issue/Execute/Writeback delay") 35 issueToExecuteDelay = Param.Unsigned("Issue to execute delay (internal " 36 "to the IEW stage)") 37 issueWidth = Param.Unsigned("Issue width") 38 executeWidth = Param.Unsigned("Execute width") 39 executeIntWidth = Param.Unsigned("Integer execute width") 40 executeFloatWidth = Param.Unsigned("Floating point execute width") 41 executeBranchWidth = Param.Unsigned("Branch execute width") 42 executeMemoryWidth = Param.Unsigned("Memory execute width") 43 44 iewToCommitDelay = Param.Unsigned("Issue/Execute/Writeback to commit " 45 "delay") 46 renameToROBDelay = Param.Unsigned("Rename to reorder buffer delay") 47 commitWidth = Param.Unsigned("Commit width") 48 squashWidth = Param.Unsigned("Squash width") 49 50 local_predictor_size = Param.Unsigned("Size of local predictor") 51 local_ctr_bits = Param.Unsigned("Bits per counter") 52 local_history_table_size = Param.Unsigned("Size of local history table") 53 local_history_bits = Param.Unsigned("Bits for the local history") 54 global_predictor_size = Param.Unsigned("Size of global predictor") 55 global_ctr_bits = Param.Unsigned("Bits per counter") 56 global_history_bits = Param.Unsigned("Bits of history") 57 choice_predictor_size = Param.Unsigned("Size of choice predictor") 58 choice_ctr_bits = Param.Unsigned("Bits of choice counters") 59 60 BTBEntries = Param.Unsigned("Number of BTB entries") 61 BTBTagSize = Param.Unsigned("Size of the BTB tags, in bits") 62 63 RASSize = Param.Unsigned("RAS size") 64 65 LQEntries = Param.Unsigned("Number of load queue entries") 66 SQEntries = Param.Unsigned("Number of store queue entries") 67 LFSTSize = Param.Unsigned("Last fetched store table size") 68 SSITSize = Param.Unsigned("Store set ID table size") 69 70 numPhysIntRegs = Param.Unsigned("Number of physical integer registers") 71 numPhysFloatRegs = Param.Unsigned("Number of physical floating point " 72 "registers") 73 numIQEntries = Param.Unsigned("Number of instruction queue entries") 74 numROBEntries = Param.Unsigned("Number of reorder buffer entries") 75 76 instShiftAmt = Param.Unsigned("Number of bits to shift instructions by") 77 78 function_trace = Param.Bool(False, "Enable function trace") 79 function_trace_start = Param.Tick(0, "Cycle to start function trace") 80