FuncUnitConfig.py revision 7760
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394486Sbinkertn@umich.edu# Authors: Kevin Lim
404486Sbinkertn@umich.edu
413223SN/Afrom m5.SimObject import SimObject
423223SN/Afrom m5.params import *
433223SN/Afrom FuncUnit import *
443223SN/A
453223SN/Aclass IntALU(FUDesc):
463223SN/A    opList = [ OpDesc(opClass='IntAlu') ]
473223SN/A    count = 6
483223SN/A
493223SN/Aclass IntMultDiv(FUDesc):
503223SN/A    opList = [ OpDesc(opClass='IntMult', opLat=3),
513223SN/A               OpDesc(opClass='IntDiv', opLat=20, issueLat=19) ]
523223SN/A    count=2
533223SN/A
543223SN/Aclass FP_ALU(FUDesc):
553223SN/A    opList = [ OpDesc(opClass='FloatAdd', opLat=2),
563223SN/A               OpDesc(opClass='FloatCmp', opLat=2),
573223SN/A               OpDesc(opClass='FloatCvt', opLat=2) ]
583223SN/A    count = 4
593223SN/A
603223SN/Aclass FP_MultDiv(FUDesc):
613223SN/A    opList = [ OpDesc(opClass='FloatMult', opLat=4),
623223SN/A               OpDesc(opClass='FloatDiv', opLat=12, issueLat=12),
633223SN/A               OpDesc(opClass='FloatSqrt', opLat=24, issueLat=24) ]
643223SN/A    count = 2
653223SN/A
667760SGiacomo.Gabrielli@arm.comclass SIMD_Unit(FUDesc):
677760SGiacomo.Gabrielli@arm.com    opList = [ OpDesc(opClass='SimdAdd'),
687760SGiacomo.Gabrielli@arm.com               OpDesc(opClass='SimdAddAcc'),
697760SGiacomo.Gabrielli@arm.com               OpDesc(opClass='SimdAlu'),
707760SGiacomo.Gabrielli@arm.com               OpDesc(opClass='SimdCmp'),
717760SGiacomo.Gabrielli@arm.com               OpDesc(opClass='SimdCvt'),
727760SGiacomo.Gabrielli@arm.com               OpDesc(opClass='SimdMisc'),
737760SGiacomo.Gabrielli@arm.com               OpDesc(opClass='SimdMult'),
747760SGiacomo.Gabrielli@arm.com               OpDesc(opClass='SimdMultAcc'),
757760SGiacomo.Gabrielli@arm.com               OpDesc(opClass='SimdShift'),
767760SGiacomo.Gabrielli@arm.com               OpDesc(opClass='SimdShiftAcc'),
777760SGiacomo.Gabrielli@arm.com               OpDesc(opClass='SimdSqrt'),
787760SGiacomo.Gabrielli@arm.com               OpDesc(opClass='SimdFloatAdd'),
797760SGiacomo.Gabrielli@arm.com               OpDesc(opClass='SimdFloatAlu'),
807760SGiacomo.Gabrielli@arm.com               OpDesc(opClass='SimdFloatCmp'),
817760SGiacomo.Gabrielli@arm.com               OpDesc(opClass='SimdFloatCvt'),
827760SGiacomo.Gabrielli@arm.com               OpDesc(opClass='SimdFloatDiv'),
837760SGiacomo.Gabrielli@arm.com               OpDesc(opClass='SimdFloatMisc'),
847760SGiacomo.Gabrielli@arm.com               OpDesc(opClass='SimdFloatMult'),
857760SGiacomo.Gabrielli@arm.com               OpDesc(opClass='SimdFloatMultAcc'),
867760SGiacomo.Gabrielli@arm.com               OpDesc(opClass='SimdFloatSqrt') ]
877760SGiacomo.Gabrielli@arm.com    count = 4
887760SGiacomo.Gabrielli@arm.com
893223SN/Aclass ReadPort(FUDesc):
903223SN/A    opList = [ OpDesc(opClass='MemRead') ]
913223SN/A    count = 0
923223SN/A
933223SN/Aclass WritePort(FUDesc):
943223SN/A    opList = [ OpDesc(opClass='MemWrite') ]
953223SN/A    count = 0
963223SN/A
973223SN/Aclass RdWrPort(FUDesc):
983223SN/A    opList = [ OpDesc(opClass='MemRead'), OpDesc(opClass='MemWrite') ]
993223SN/A    count = 4
1003223SN/A
1013223SN/Aclass IprPort(FUDesc):
1023223SN/A    opList = [ OpDesc(opClass='IprAccess', opLat = 3, issueLat = 3) ]
1033223SN/A    count = 1
1043223SN/A
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