FuncUnitConfig.py revision 7760
17760SGiacomo.Gabrielli@arm.com# Copyright (c) 2010 ARM Limited 27760SGiacomo.Gabrielli@arm.com# All rights reserved. 37760SGiacomo.Gabrielli@arm.com# 47760SGiacomo.Gabrielli@arm.com# The license below extends only to copyright in the software and shall 57760SGiacomo.Gabrielli@arm.com# not be construed as granting a license to any other intellectual 67760SGiacomo.Gabrielli@arm.com# property including but not limited to intellectual property relating 77760SGiacomo.Gabrielli@arm.com# to a hardware implementation of the functionality of the software 87760SGiacomo.Gabrielli@arm.com# licensed hereunder. You may use the software subject to the license 97760SGiacomo.Gabrielli@arm.com# terms below provided that you ensure that this notice is replicated 107760SGiacomo.Gabrielli@arm.com# unmodified and in its entirety in all distributions of the software, 117760SGiacomo.Gabrielli@arm.com# modified or unmodified, in source code or in binary form. 127760SGiacomo.Gabrielli@arm.com# 134486Sbinkertn@umich.edu# Copyright (c) 2006-2007 The Regents of The University of Michigan 144486Sbinkertn@umich.edu# All rights reserved. 154486Sbinkertn@umich.edu# 164486Sbinkertn@umich.edu# Redistribution and use in source and binary forms, with or without 174486Sbinkertn@umich.edu# modification, are permitted provided that the following conditions are 184486Sbinkertn@umich.edu# met: redistributions of source code must retain the above copyright 194486Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer; 204486Sbinkertn@umich.edu# redistributions in binary form must reproduce the above copyright 214486Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer in the 224486Sbinkertn@umich.edu# documentation and/or other materials provided with the distribution; 234486Sbinkertn@umich.edu# neither the name of the copyright holders nor the names of its 244486Sbinkertn@umich.edu# contributors may be used to endorse or promote products derived from 254486Sbinkertn@umich.edu# this software without specific prior written permission. 264486Sbinkertn@umich.edu# 274486Sbinkertn@umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 284486Sbinkertn@umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 294486Sbinkertn@umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 304486Sbinkertn@umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 314486Sbinkertn@umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 324486Sbinkertn@umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 334486Sbinkertn@umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 344486Sbinkertn@umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 354486Sbinkertn@umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 364486Sbinkertn@umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 374486Sbinkertn@umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 384486Sbinkertn@umich.edu# 394486Sbinkertn@umich.edu# Authors: Kevin Lim 404486Sbinkertn@umich.edu 413223SN/Afrom m5.SimObject import SimObject 423223SN/Afrom m5.params import * 433223SN/Afrom FuncUnit import * 443223SN/A 453223SN/Aclass IntALU(FUDesc): 463223SN/A opList = [ OpDesc(opClass='IntAlu') ] 473223SN/A count = 6 483223SN/A 493223SN/Aclass IntMultDiv(FUDesc): 503223SN/A opList = [ OpDesc(opClass='IntMult', opLat=3), 513223SN/A OpDesc(opClass='IntDiv', opLat=20, issueLat=19) ] 523223SN/A count=2 533223SN/A 543223SN/Aclass FP_ALU(FUDesc): 553223SN/A opList = [ OpDesc(opClass='FloatAdd', opLat=2), 563223SN/A OpDesc(opClass='FloatCmp', opLat=2), 573223SN/A OpDesc(opClass='FloatCvt', opLat=2) ] 583223SN/A count = 4 593223SN/A 603223SN/Aclass FP_MultDiv(FUDesc): 613223SN/A opList = [ OpDesc(opClass='FloatMult', opLat=4), 623223SN/A OpDesc(opClass='FloatDiv', opLat=12, issueLat=12), 633223SN/A OpDesc(opClass='FloatSqrt', opLat=24, issueLat=24) ] 643223SN/A count = 2 653223SN/A 667760SGiacomo.Gabrielli@arm.comclass SIMD_Unit(FUDesc): 677760SGiacomo.Gabrielli@arm.com opList = [ OpDesc(opClass='SimdAdd'), 687760SGiacomo.Gabrielli@arm.com OpDesc(opClass='SimdAddAcc'), 697760SGiacomo.Gabrielli@arm.com OpDesc(opClass='SimdAlu'), 707760SGiacomo.Gabrielli@arm.com OpDesc(opClass='SimdCmp'), 717760SGiacomo.Gabrielli@arm.com OpDesc(opClass='SimdCvt'), 727760SGiacomo.Gabrielli@arm.com OpDesc(opClass='SimdMisc'), 737760SGiacomo.Gabrielli@arm.com OpDesc(opClass='SimdMult'), 747760SGiacomo.Gabrielli@arm.com OpDesc(opClass='SimdMultAcc'), 757760SGiacomo.Gabrielli@arm.com OpDesc(opClass='SimdShift'), 767760SGiacomo.Gabrielli@arm.com OpDesc(opClass='SimdShiftAcc'), 777760SGiacomo.Gabrielli@arm.com OpDesc(opClass='SimdSqrt'), 787760SGiacomo.Gabrielli@arm.com OpDesc(opClass='SimdFloatAdd'), 797760SGiacomo.Gabrielli@arm.com OpDesc(opClass='SimdFloatAlu'), 807760SGiacomo.Gabrielli@arm.com OpDesc(opClass='SimdFloatCmp'), 817760SGiacomo.Gabrielli@arm.com OpDesc(opClass='SimdFloatCvt'), 827760SGiacomo.Gabrielli@arm.com OpDesc(opClass='SimdFloatDiv'), 837760SGiacomo.Gabrielli@arm.com OpDesc(opClass='SimdFloatMisc'), 847760SGiacomo.Gabrielli@arm.com OpDesc(opClass='SimdFloatMult'), 857760SGiacomo.Gabrielli@arm.com OpDesc(opClass='SimdFloatMultAcc'), 867760SGiacomo.Gabrielli@arm.com OpDesc(opClass='SimdFloatSqrt') ] 877760SGiacomo.Gabrielli@arm.com count = 4 887760SGiacomo.Gabrielli@arm.com 893223SN/Aclass ReadPort(FUDesc): 903223SN/A opList = [ OpDesc(opClass='MemRead') ] 913223SN/A count = 0 923223SN/A 933223SN/Aclass WritePort(FUDesc): 943223SN/A opList = [ OpDesc(opClass='MemWrite') ] 953223SN/A count = 0 963223SN/A 973223SN/Aclass RdWrPort(FUDesc): 983223SN/A opList = [ OpDesc(opClass='MemRead'), OpDesc(opClass='MemWrite') ] 993223SN/A count = 4 1003223SN/A 1013223SN/Aclass IprPort(FUDesc): 1023223SN/A opList = [ OpDesc(opClass='IprAccess', opLat = 3, issueLat = 3) ] 1033223SN/A count = 1 1043223SN/A 105