nativetrace.hh revision 6216
14776Sgblack@eecs.umich.edu/* 24776Sgblack@eecs.umich.edu * Copyright (c) 2001-2005 The Regents of The University of Michigan 34776Sgblack@eecs.umich.edu * All rights reserved. 44776Sgblack@eecs.umich.edu * 54776Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 64776Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 74776Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 84776Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 94776Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 104776Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 114776Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 124776Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 134776Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 144776Sgblack@eecs.umich.edu * this software without specific prior written permission. 154776Sgblack@eecs.umich.edu * 164776Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 174776Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 184776Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 194776Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 204776Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 214776Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 224776Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 234776Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 244776Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 254776Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 264776Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 274776Sgblack@eecs.umich.edu * 284776Sgblack@eecs.umich.edu * Authors: Steve Reinhardt 294776Sgblack@eecs.umich.edu * Nathan Binkert 304776Sgblack@eecs.umich.edu */ 314776Sgblack@eecs.umich.edu 326216Snate@binkert.org#ifndef __CPU_NATIVETRACE_HH__ 336216Snate@binkert.org#define __CPU_NATIVETRACE_HH__ 344776Sgblack@eecs.umich.edu 356216Snate@binkert.org#include "arch/x86/floatregs.hh" 366216Snate@binkert.org#include "arch/x86/intregs.hh" 374776Sgblack@eecs.umich.edu#include "base/trace.hh" 386216Snate@binkert.org#include "base/types.hh" 394776Sgblack@eecs.umich.edu#include "cpu/static_inst.hh" 404776Sgblack@eecs.umich.edu#include "sim/insttracer.hh" 414776Sgblack@eecs.umich.edu 424776Sgblack@eecs.umich.educlass ThreadContext; 434776Sgblack@eecs.umich.edu 444776Sgblack@eecs.umich.edunamespace Trace { 454776Sgblack@eecs.umich.edu 464776Sgblack@eecs.umich.educlass NativeTrace; 474776Sgblack@eecs.umich.edu 484776Sgblack@eecs.umich.educlass NativeTraceRecord : public InstRecord 494776Sgblack@eecs.umich.edu{ 504776Sgblack@eecs.umich.edu protected: 514776Sgblack@eecs.umich.edu NativeTrace * parent; 524776Sgblack@eecs.umich.edu 534776Sgblack@eecs.umich.edu public: 544776Sgblack@eecs.umich.edu NativeTraceRecord(NativeTrace * _parent, 554776Sgblack@eecs.umich.edu Tick _when, ThreadContext *_thread, 565784Sgblack@eecs.umich.edu const StaticInstPtr _staticInst, Addr _pc, bool spec, 575784Sgblack@eecs.umich.edu const StaticInstPtr _macroStaticInst = NULL, MicroPC _upc = 0) 585784Sgblack@eecs.umich.edu : InstRecord(_when, _thread, _staticInst, _pc, spec, 595784Sgblack@eecs.umich.edu _macroStaticInst, _upc), 605784Sgblack@eecs.umich.edu parent(_parent) 614776Sgblack@eecs.umich.edu { 624776Sgblack@eecs.umich.edu } 634776Sgblack@eecs.umich.edu 644776Sgblack@eecs.umich.edu void dump(); 654776Sgblack@eecs.umich.edu}; 664776Sgblack@eecs.umich.edu 674776Sgblack@eecs.umich.educlass NativeTrace : public InstTracer 684776Sgblack@eecs.umich.edu{ 694776Sgblack@eecs.umich.edu protected: 704776Sgblack@eecs.umich.edu int fd; 714776Sgblack@eecs.umich.edu 724776Sgblack@eecs.umich.edu ListenSocket native_listener; 734776Sgblack@eecs.umich.edu 744830Sgblack@eecs.umich.edu bool checkRcx; 754830Sgblack@eecs.umich.edu bool checkR11; 764830Sgblack@eecs.umich.edu uint64_t oldRcxVal, oldR11Val; 774830Sgblack@eecs.umich.edu uint64_t oldRealRcxVal, oldRealR11Val; 784830Sgblack@eecs.umich.edu 794830Sgblack@eecs.umich.edu struct ThreadState { 804830Sgblack@eecs.umich.edu uint64_t rax; 814830Sgblack@eecs.umich.edu uint64_t rcx; 824830Sgblack@eecs.umich.edu uint64_t rdx; 834830Sgblack@eecs.umich.edu uint64_t rbx; 844830Sgblack@eecs.umich.edu uint64_t rsp; 854830Sgblack@eecs.umich.edu uint64_t rbp; 864830Sgblack@eecs.umich.edu uint64_t rsi; 874830Sgblack@eecs.umich.edu uint64_t rdi; 884830Sgblack@eecs.umich.edu uint64_t r8; 894830Sgblack@eecs.umich.edu uint64_t r9; 904830Sgblack@eecs.umich.edu uint64_t r10; 914830Sgblack@eecs.umich.edu uint64_t r11; 924830Sgblack@eecs.umich.edu uint64_t r12; 934830Sgblack@eecs.umich.edu uint64_t r13; 944830Sgblack@eecs.umich.edu uint64_t r14; 954830Sgblack@eecs.umich.edu uint64_t r15; 964830Sgblack@eecs.umich.edu uint64_t rip; 975049Sgblack@eecs.umich.edu //This should be expanded to 16 if x87 registers are considered 985049Sgblack@eecs.umich.edu uint64_t mmx[8]; 995049Sgblack@eecs.umich.edu uint64_t xmm[32]; 1004830Sgblack@eecs.umich.edu 1014830Sgblack@eecs.umich.edu void update(int fd) 1024830Sgblack@eecs.umich.edu { 1034830Sgblack@eecs.umich.edu int bytesLeft = sizeof(ThreadState); 1044830Sgblack@eecs.umich.edu int bytesRead = 0; 1054830Sgblack@eecs.umich.edu do 1064830Sgblack@eecs.umich.edu { 1074830Sgblack@eecs.umich.edu int res = read(fd, ((char *)this) + bytesRead, bytesLeft); 1084830Sgblack@eecs.umich.edu if(res < 0) 1094830Sgblack@eecs.umich.edu panic("Read call failed! %s\n", strerror(errno)); 1104830Sgblack@eecs.umich.edu bytesLeft -= res; 1114830Sgblack@eecs.umich.edu bytesRead += res; 1124830Sgblack@eecs.umich.edu } while(bytesLeft); 1134830Sgblack@eecs.umich.edu rax = TheISA::gtoh(rax); 1144830Sgblack@eecs.umich.edu rcx = TheISA::gtoh(rcx); 1154830Sgblack@eecs.umich.edu rdx = TheISA::gtoh(rdx); 1164830Sgblack@eecs.umich.edu rbx = TheISA::gtoh(rbx); 1174830Sgblack@eecs.umich.edu rsp = TheISA::gtoh(rsp); 1184830Sgblack@eecs.umich.edu rbp = TheISA::gtoh(rbp); 1194830Sgblack@eecs.umich.edu rsi = TheISA::gtoh(rsi); 1204830Sgblack@eecs.umich.edu rdi = TheISA::gtoh(rdi); 1214830Sgblack@eecs.umich.edu r8 = TheISA::gtoh(r8); 1224830Sgblack@eecs.umich.edu r9 = TheISA::gtoh(r9); 1234830Sgblack@eecs.umich.edu r10 = TheISA::gtoh(r10); 1244830Sgblack@eecs.umich.edu r11 = TheISA::gtoh(r11); 1254830Sgblack@eecs.umich.edu r12 = TheISA::gtoh(r12); 1264830Sgblack@eecs.umich.edu r13 = TheISA::gtoh(r13); 1274830Sgblack@eecs.umich.edu r14 = TheISA::gtoh(r14); 1284830Sgblack@eecs.umich.edu r15 = TheISA::gtoh(r15); 1294830Sgblack@eecs.umich.edu rip = TheISA::gtoh(rip); 1305049Sgblack@eecs.umich.edu //This should be expanded if x87 registers are considered 1315049Sgblack@eecs.umich.edu for (int i = 0; i < 8; i++) 1325049Sgblack@eecs.umich.edu mmx[i] = TheISA::gtoh(mmx[i]); 1335049Sgblack@eecs.umich.edu for (int i = 0; i < 32; i++) 1345049Sgblack@eecs.umich.edu xmm[i] = TheISA::gtoh(xmm[i]); 1354830Sgblack@eecs.umich.edu } 1364830Sgblack@eecs.umich.edu 1374830Sgblack@eecs.umich.edu void update(ThreadContext * tc) 1384830Sgblack@eecs.umich.edu { 1394830Sgblack@eecs.umich.edu rax = tc->readIntReg(X86ISA::INTREG_RAX); 1404830Sgblack@eecs.umich.edu rcx = tc->readIntReg(X86ISA::INTREG_RCX); 1414830Sgblack@eecs.umich.edu rdx = tc->readIntReg(X86ISA::INTREG_RDX); 1424830Sgblack@eecs.umich.edu rbx = tc->readIntReg(X86ISA::INTREG_RBX); 1434830Sgblack@eecs.umich.edu rsp = tc->readIntReg(X86ISA::INTREG_RSP); 1444830Sgblack@eecs.umich.edu rbp = tc->readIntReg(X86ISA::INTREG_RBP); 1454830Sgblack@eecs.umich.edu rsi = tc->readIntReg(X86ISA::INTREG_RSI); 1464830Sgblack@eecs.umich.edu rdi = tc->readIntReg(X86ISA::INTREG_RDI); 1474830Sgblack@eecs.umich.edu r8 = tc->readIntReg(X86ISA::INTREG_R8); 1484830Sgblack@eecs.umich.edu r9 = tc->readIntReg(X86ISA::INTREG_R9); 1494830Sgblack@eecs.umich.edu r10 = tc->readIntReg(X86ISA::INTREG_R10); 1504830Sgblack@eecs.umich.edu r11 = tc->readIntReg(X86ISA::INTREG_R11); 1514830Sgblack@eecs.umich.edu r12 = tc->readIntReg(X86ISA::INTREG_R12); 1524830Sgblack@eecs.umich.edu r13 = tc->readIntReg(X86ISA::INTREG_R13); 1534830Sgblack@eecs.umich.edu r14 = tc->readIntReg(X86ISA::INTREG_R14); 1544830Sgblack@eecs.umich.edu r15 = tc->readIntReg(X86ISA::INTREG_R15); 1554830Sgblack@eecs.umich.edu rip = tc->readNextPC(); 1565049Sgblack@eecs.umich.edu //This should be expanded if x87 registers are considered 1575049Sgblack@eecs.umich.edu for (int i = 0; i < 8; i++) 1585049Sgblack@eecs.umich.edu mmx[i] = tc->readFloatRegBits(X86ISA::FLOATREG_MMX(i)); 1595049Sgblack@eecs.umich.edu for (int i = 0; i < 32; i++) 1605049Sgblack@eecs.umich.edu xmm[i] = tc->readFloatRegBits(X86ISA::FLOATREG_XMM_BASE + i); 1614830Sgblack@eecs.umich.edu } 1624830Sgblack@eecs.umich.edu 1634830Sgblack@eecs.umich.edu }; 1644830Sgblack@eecs.umich.edu 1654830Sgblack@eecs.umich.edu ThreadState nState; 1664830Sgblack@eecs.umich.edu ThreadState mState; 1674830Sgblack@eecs.umich.edu 1684830Sgblack@eecs.umich.edu 1694776Sgblack@eecs.umich.edu public: 1704776Sgblack@eecs.umich.edu 1714830Sgblack@eecs.umich.edu template<class T> 1724830Sgblack@eecs.umich.edu bool 1734830Sgblack@eecs.umich.edu checkReg(const char * regName, T &val, T &realVal) 1744830Sgblack@eecs.umich.edu { 1754830Sgblack@eecs.umich.edu if(val != realVal) 1764830Sgblack@eecs.umich.edu { 1774830Sgblack@eecs.umich.edu DPRINTFN("Register %s should be %#x but is %#x.\n", 1784830Sgblack@eecs.umich.edu regName, realVal, val); 1794830Sgblack@eecs.umich.edu return false; 1804830Sgblack@eecs.umich.edu } 1814830Sgblack@eecs.umich.edu return true; 1824830Sgblack@eecs.umich.edu } 1834830Sgblack@eecs.umich.edu 1844830Sgblack@eecs.umich.edu bool 1854830Sgblack@eecs.umich.edu checkRcxReg(const char * regName, uint64_t &, uint64_t &); 1864830Sgblack@eecs.umich.edu 1874830Sgblack@eecs.umich.edu bool 1884830Sgblack@eecs.umich.edu checkR11Reg(const char * regName, uint64_t &, uint64_t &); 1894830Sgblack@eecs.umich.edu 1905049Sgblack@eecs.umich.edu bool 1915049Sgblack@eecs.umich.edu checkXMM(int num, uint64_t mXmmBuf[], uint64_t nXmmBuf[]); 1925049Sgblack@eecs.umich.edu 1935038Sgblack@eecs.umich.edu NativeTrace(const Params *p); 1944776Sgblack@eecs.umich.edu 1954776Sgblack@eecs.umich.edu NativeTraceRecord * 1964776Sgblack@eecs.umich.edu getInstRecord(Tick when, ThreadContext *tc, 1975784Sgblack@eecs.umich.edu const StaticInstPtr staticInst, Addr pc, 1985784Sgblack@eecs.umich.edu const StaticInstPtr macroStaticInst = NULL, MicroPC upc = 0) 1994776Sgblack@eecs.umich.edu { 2004776Sgblack@eecs.umich.edu if (tc->misspeculating()) 2014776Sgblack@eecs.umich.edu return NULL; 2024776Sgblack@eecs.umich.edu 2034776Sgblack@eecs.umich.edu return new NativeTraceRecord(this, when, tc, 2045784Sgblack@eecs.umich.edu staticInst, pc, tc->misspeculating(), macroStaticInst, upc); 2054776Sgblack@eecs.umich.edu } 2064776Sgblack@eecs.umich.edu 2074830Sgblack@eecs.umich.edu void 2084830Sgblack@eecs.umich.edu check(ThreadContext *, bool syscall); 2094830Sgblack@eecs.umich.edu 2104776Sgblack@eecs.umich.edu friend class NativeTraceRecord; 2114776Sgblack@eecs.umich.edu}; 2124776Sgblack@eecs.umich.edu 2134776Sgblack@eecs.umich.edu/* namespace Trace */ } 2144776Sgblack@eecs.umich.edu 2156216Snate@binkert.org#endif // __CPU_NATIVETRACE_HH__ 216