pipe_data.hh revision 10259:ebb376f73dd2
1/* 2 * Copyright (c) 2013-2014 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions are 16 * met: redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer; 18 * redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution; 21 * neither the name of the copyright holders nor the names of its 22 * contributors may be used to endorse or promote products derived from 23 * this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * Authors: Andrew Bardsley 38 */ 39 40/** 41 * @file 42 * 43 * Contains class definitions for data flowing between pipeline stages in 44 * the top-level structure portion of this model. Latch types are also 45 * defined which pair forward/backward flowing data specific to each stage 46 * pair. 47 * 48 * No post-configuration inter-stage communication should *ever* take place 49 * outside these classes (except for reservation!) 50 */ 51 52#ifndef __CPU_MINOR_PIPE_DATA_HH__ 53#define __CPU_MINOR_PIPE_DATA_HH__ 54 55#include "cpu/minor/buffers.hh" 56#include "cpu/minor/dyn_inst.hh" 57#include "cpu/base.hh" 58 59namespace Minor 60{ 61 62/** Forward data betwen Execute and Fetch1 carrying change-of-address/stream 63 * information. */ 64class BranchData /* : public ReportIF, public BubbleIF */ 65{ 66 public: 67 enum Reason 68 { 69 /* *** No change of stream (information to branch prediction) */ 70 71 /* Don't branch at all (bubble) */ 72 NoBranch, 73 /* Don't branch, but here's the details of a correct prediction 74 * that was executed */ 75 CorrectlyPredictedBranch, 76 77 /* *** Change of stream */ 78 79 /* Take an unpredicted branch */ 80 UnpredictedBranch, 81 /* Take a branch on branch prediction data (from Fetch2) */ 82 BranchPrediction, 83 /* Prediction of wrong target PC */ 84 BadlyPredictedBranchTarget, 85 /* Bad branch prediction (didn't actually branch). Need to branch 86 * back to correct stream. If the target is wrong, use 87 * BadlyPredictedBranchTarget */ 88 BadlyPredictedBranch, 89 /* Suspend fetching for this thread (inst->id.threadId). 90 * This will be woken up by another stream changing branch so 91 * count it as stream changing itself and expect pc to be the PC 92 * of the next instruction */ 93 SuspendThread, 94 /* Wakeup fetching from Halted */ 95 WakeupFetch, 96 /* Branch from an interrupt (no instruction) */ 97 Interrupt, 98 /* Stop fetching in anticipation of of draining */ 99 HaltFetch 100 }; 101 102 /** Is a request with this reason actually a request to change the 103 * PC rather than a bubble or branch prediction information */ 104 static bool isStreamChange(const BranchData::Reason reason); 105 106 /** Is a request with this reason actually a 'real' branch, that is, 107 * a stream change that's not just an instruction to Fetch1 to halt 108 * or wake up */ 109 static bool isBranch(const BranchData::Reason reason); 110 111 public: 112 /** Explanation for this branch */ 113 Reason reason; 114 115 /** Sequence number of new stream/prediction to be adopted */ 116 InstSeqNum newStreamSeqNum; 117 InstSeqNum newPredictionSeqNum; 118 119 /** Starting PC of that stream */ 120 TheISA::PCState target; 121 122 /** Instruction which caused this branch */ 123 MinorDynInstPtr inst; 124 125 public: 126 BranchData() : 127 reason(NoBranch), newStreamSeqNum(0), 128 newPredictionSeqNum(0), target(TheISA::PCState(0)), 129 inst(MinorDynInst::bubble()) 130 { } 131 132 BranchData( 133 Reason reason_, 134 InstSeqNum new_stream_seq_num, 135 InstSeqNum new_prediction_seq_num, 136 TheISA::PCState target, 137 MinorDynInstPtr inst_) : 138 reason(reason_), 139 newStreamSeqNum(new_stream_seq_num), 140 newPredictionSeqNum(new_prediction_seq_num), 141 target(target), 142 inst(inst_) 143 { } 144 145 /** BubbleIF interface */ 146 static BranchData bubble() { return BranchData(); } 147 bool isBubble() const { return reason == NoBranch; } 148 149 /** As static isStreamChange but on this branch data */ 150 bool isStreamChange() const { return isStreamChange(reason); } 151 152 /** As static isBranch but on this branch data */ 153 bool isBranch() const { return isBranch(reason); } 154 155 /** ReportIF interface */ 156 void reportData(std::ostream &os) const; 157}; 158 159/** Print a branch reason enum */ 160std::ostream &operator <<(std::ostream &os, BranchData::Reason reason); 161 162/** Print BranchData contents in a format suitable for DPRINTF comments, not 163 * for MinorTrace */ 164std::ostream &operator <<(std::ostream &os, const BranchData &branch); 165 166/** Line fetch data in the forward direction. Contains a single cache line 167 * (or fragment of a line), its address, a sequence number assigned when 168 * that line was fetched and a bubbleFlag that can allow ForwardLineData to 169 * be used to represent the absence of line data in a pipeline. */ 170class ForwardLineData /* : public ReportIF, public BubbleIF */ 171{ 172 private: 173 /** This line is a bubble. No other data member is required to be valid 174 * if this is true */ 175 bool bubbleFlag; 176 177 public: 178 /** First byte address in the line. This is allowed to be 179 * <= pc.instAddr() */ 180 Addr lineBaseAddr; 181 182 /** PC of the first requested inst within this line */ 183 TheISA::PCState pc; 184 185 /** Explicit line width, don't rely on data.size */ 186 unsigned int lineWidth; 187 188 public: 189 /** This line has a fault. The bubble flag will be false and seqNums 190 * will be valid but no data will */ 191 Fault fault; 192 193 /** Thread, stream, prediction ... id of this line */ 194 InstId id; 195 196 /** Line data. line[0] is the byte at address pc.instAddr(). Data is 197 * only valid upto lineWidth - 1. */ 198 uint8_t *line; 199 200 /** Packet from which the line is taken */ 201 Packet *packet; 202 203 public: 204 ForwardLineData() : 205 bubbleFlag(true), 206 lineBaseAddr(0), 207 lineWidth(0), 208 fault(NoFault), 209 line(NULL), 210 packet(NULL) 211 { 212 /* Make lines bubbles by default */ 213 } 214 215 ~ForwardLineData() { line = NULL; } 216 217 public: 218 /** This is a fault, not a line */ 219 bool isFault() const { return fault != NoFault; } 220 221 /** Set fault and possible clear the bubble flag */ 222 void setFault(Fault fault_); 223 224 /** In-place initialise a ForwardLineData, freeing and overridding the 225 * line */ 226 void allocateLine(unsigned int width_); 227 228 /** Use the data from a packet as line instead of allocating new 229 * space. On destruction of this object, the packet will be destroyed */ 230 void adoptPacketData(Packet *packet); 231 232 /** Free this ForwardLineData line. Note that these are shared between 233 * line objects and so you must be careful when deallocating them. 234 * Copying of ForwardLineData can, therefore, be done by default copy 235 * constructors/assignment */ 236 void freeLine(); 237 238 /** BubbleIF interface */ 239 static ForwardLineData bubble() { return ForwardLineData(); } 240 bool isBubble() const { return bubbleFlag; } 241 242 /** ReportIF interface */ 243 void reportData(std::ostream &os) const; 244}; 245 246/** Maximum number of instructions that can be carried by the pipeline. */ 247const unsigned int MAX_FORWARD_INSTS = 16; 248 249/** Forward flowing data between Fetch2,Decode,Execute carrying a packet of 250 * instructions of a width appropriate to the configured stage widths. 251 * Also carries exception information where instructions are not valid */ 252class ForwardInstData /* : public ReportIF, public BubbleIF */ 253{ 254 public: 255 /** Array of carried insts, ref counted */ 256 MinorDynInstPtr insts[MAX_FORWARD_INSTS]; 257 258 /** The number of insts slots that can be expected to be valid insts */ 259 unsigned int numInsts; 260 261 public: 262 explicit ForwardInstData(unsigned int width = 0); 263 264 ForwardInstData(const ForwardInstData &src); 265 266 public: 267 /** Number of instructions carried by this object */ 268 unsigned int width() const { return numInsts; } 269 270 /** Copy the inst array only as far as numInsts */ 271 ForwardInstData &operator =(const ForwardInstData &src); 272 273 /** Resize a bubble/empty ForwardInstData and fill with bubbles */ 274 void resize(unsigned int width); 275 276 /** Fill with bubbles from 0 to width() - 1 */ 277 void bubbleFill(); 278 279 /** BubbleIF interface */ 280 bool isBubble() const; 281 282 /** ReportIF interface */ 283 void reportData(std::ostream &os) const; 284}; 285 286} 287 288#endif /* __CPU_MINOR_PIPE_DATA_HH__ */ 289