BaseKvmCPU.py revision 13665
11689SN/A# Copyright (c) 2012 ARM Limited
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38842Smrinmoy.ghosh@arm.com#
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351689SN/A#
361689SN/A# Authors: Andreas Sandberg
371689SN/A
381689SN/Afrom m5.SimObject import *
392665SN/Afrom m5.params import *
402665SN/Afrom m5.proxy import *
419480Snilay@cs.wisc.edu
429480Snilay@cs.wisc.edufrom m5.objects.BaseCPU import BaseCPU
431689SN/Afrom m5.objects.KvmVM import KvmVM
441689SN/A
459480Snilay@cs.wisc.educlass BaseKvmCPU(BaseCPU):
469480Snilay@cs.wisc.edu    type = 'BaseKvmCPU'
471062SN/A    cxx_header = "cpu/kvm/base.hh"
486216SN/A    abstract = True
496216SN/A
506216SN/A    @cxxMethod
519480Snilay@cs.wisc.edu    def dump(self):
529480Snilay@cs.wisc.edu        """Dump the internal state of KVM to standard out."""
5310785Sgope@wisc.edu        pass
541062SN/A
552345SN/A    @classmethod
562345SN/A    def memory_mode(cls):
572345SN/A        return 'atomic_noncaching'
582345SN/A
592345SN/A    @classmethod
602345SN/A    def require_caches(cls):
612345SN/A        return False
622345SN/A
632345SN/A    @classmethod
649480Snilay@cs.wisc.edu    def support_take_over(cls):
651062SN/A        return True
661062SN/A
671062SN/A    useCoalescedMMIO = Param.Bool(False, "Use coalesced MMIO (EXPERIMENTAL)")
681062SN/A    usePerfOverflow = Param.Bool(False, "Use perf event overflow counters (EXPERIMENTAL)")
691062SN/A    alwaysSyncTC = Param.Bool(False,
7010785Sgope@wisc.edu                              "Always sync thread contexts on entry/exit")
711062SN/A
721062SN/A    hostFreq = Param.Clock("2GHz", "Host clock frequency")
731062SN/A    hostFactor = Param.Float(1.0, "Cycle scale factor")
742345SN/A