exetrace.cc revision 5784:8a28646c4bc2 
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 *          Lisa Hsu
30 *          Nathan Binkert
31 *          Steve Raasch
32 */
33
34#include <iomanip>
35
36#include "base/loader/symtab.hh"
37#include "cpu/base.hh"
38#include "cpu/exetrace.hh"
39#include "cpu/static_inst.hh"
40#include "cpu/thread_context.hh"
41#include "enums/OpClass.hh"
42
43using namespace std;
44using namespace TheISA;
45
46namespace Trace {
47
48void
49Trace::ExeTracerRecord::traceInst(StaticInstPtr inst, bool ran)
50{
51    ostream &outs = Trace::output();
52
53    if (IsOn(ExecTicks))
54        ccprintf(outs, "%7d: ", when);
55
56    outs << thread->getCpuPtr()->name() << " ";
57
58    if (IsOn(ExecSpeculative))
59        outs << (misspeculating ? "-" : "+") << " ";
60
61    if (IsOn(ExecThread))
62        outs << "T" << thread->threadId() << " : ";
63
64    std::string sym_str;
65    Addr sym_addr;
66    if (debugSymbolTable
67        && IsOn(ExecSymbol)
68        && debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)) {
69        if (PC != sym_addr)
70            sym_str += csprintf("+%d", PC - sym_addr);
71        outs << "@" << sym_str;
72    }
73    else {
74        outs << "0x" << hex << PC;
75    }
76
77    if (inst->isMicroop()) {
78        outs << "." << setw(2) << dec << upc;
79    } else {
80        outs << "   ";
81    }
82
83    outs << " : ";
84
85    //
86    //  Print decoded instruction
87    //
88
89    outs << setw(26) << left;
90    outs << inst->disassemble(PC, debugSymbolTable);
91
92    if (ran) {
93        outs << " : ";
94
95        if (IsOn(ExecOpClass)) {
96            outs << Enums::OpClassStrings[inst->opClass()] << " : ";
97        }
98
99        if (IsOn(ExecResult) && data_status != DataInvalid) {
100            ccprintf(outs, " D=%#018x", data.as_int);
101        }
102
103        if (IsOn(ExecEffAddr) && addr_valid)
104            outs << " A=0x" << hex << addr;
105
106        if (IsOn(ExecFetchSeq) && fetch_seq_valid)
107            outs << "  FetchSeq=" << dec << fetch_seq;
108
109        if (IsOn(ExecCPSeq) && cp_seq_valid)
110            outs << "  CPSeq=" << dec << cp_seq;
111    }
112
113    //
114    //  End of line...
115    //
116    outs << endl;
117}
118
119void
120Trace::ExeTracerRecord::dump()
121{
122    /*
123     * The behavior this check tries to achieve is that if ExecMacro is on,
124     * the macroop will be printed. If it's on and microops are also on, it's
125     * printed before the microops start printing to give context. If the
126     * microops aren't printed, then it's printed only when the final microop
127     * finishes. Macroops then behave like regular instructions and don't
128     * complete/print when they fault.
129     */
130    if (IsOn(ExecMacro) && staticInst->isMicroop() &&
131            (IsOn(ExecMicro) &&
132             macroStaticInst && staticInst->isFirstMicroop()) ||
133            (!IsOn(ExecMicro) &&
134             macroStaticInst && staticInst->isLastMicroop())) {
135        traceInst(macroStaticInst, false);
136    }
137    if (IsOn(ExecMicro) || !staticInst->isMicroop()) {
138        traceInst(staticInst, true);
139    }
140}
141
142/* namespace Trace */ }
143
144////////////////////////////////////////////////////////////////////////
145//
146//  ExeTracer Simulation Object
147//
148Trace::ExeTracer *
149ExeTracerParams::create()
150{
151    return new Trace::ExeTracer(this);
152};
153