exetrace.cc revision 5715:e8c1d4e669a7
1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Steve Reinhardt 29 * Lisa Hsu 30 * Nathan Binkert 31 * Steve Raasch 32 */ 33 34#include <iomanip> 35 36#include "base/loader/symtab.hh" 37#include "cpu/base.hh" 38#include "cpu/exetrace.hh" 39#include "cpu/static_inst.hh" 40#include "cpu/thread_context.hh" 41#include "enums/OpClass.hh" 42 43using namespace std; 44using namespace TheISA; 45 46namespace Trace { 47 48void 49Trace::ExeTracerRecord::dump() 50{ 51 ostream &outs = Trace::output(); 52 53 if (IsOn(ExecTicks)) 54 ccprintf(outs, "%7d: ", when); 55 56 outs << thread->getCpuPtr()->name() << " "; 57 58 if (IsOn(ExecSpeculative)) 59 outs << (misspeculating ? "-" : "+") << " "; 60 61 if (IsOn(ExecThread)) 62 outs << "T" << thread->threadId() << " : "; 63 64 65 std::string sym_str; 66 Addr sym_addr; 67 if (debugSymbolTable 68 && IsOn(ExecSymbol) 69 && debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)) { 70 if (PC != sym_addr) 71 sym_str += csprintf("+%d", PC - sym_addr); 72 outs << "@" << sym_str << " : "; 73 } 74 else { 75 outs << "0x" << hex << PC << " : "; 76 } 77 78 // 79 // Print decoded instruction 80 // 81 82 outs << setw(26) << left; 83 outs << staticInst->disassemble(PC, debugSymbolTable); 84 outs << " : "; 85 86 if (IsOn(ExecOpClass)) { 87 outs << Enums::OpClassStrings[staticInst->opClass()] << " : "; 88 } 89 90 if (IsOn(ExecResult) && data_status != DataInvalid) { 91 ccprintf(outs, " D=%#018x", data.as_int); 92 } 93 94 if (IsOn(ExecEffAddr) && addr_valid) 95 outs << " A=0x" << hex << addr; 96 97 if (IsOn(ExecFetchSeq) && fetch_seq_valid) 98 outs << " FetchSeq=" << dec << fetch_seq; 99 100 if (IsOn(ExecCPSeq) && cp_seq_valid) 101 outs << " CPSeq=" << dec << cp_seq; 102 103 // 104 // End of line... 105 // 106 outs << endl; 107} 108 109/* namespace Trace */ } 110 111//////////////////////////////////////////////////////////////////////// 112// 113// ExeTracer Simulation Object 114// 115Trace::ExeTracer * 116ExeTracerParams::create() 117{ 118 return new Trace::ExeTracer(this); 119}; 120