exetrace.cc revision 4776:8c8407243a2c 
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 *          Lisa Hsu
30 *          Nathan Binkert
31 *          Steve Raasch
32 */
33
34#include <iomanip>
35
36#include "base/loader/symtab.hh"
37#include "cpu/base.hh"
38#include "cpu/exetrace.hh"
39#include "cpu/static_inst.hh"
40#include "cpu/thread_context.hh"
41#include "enums/OpClass.hh"
42#include "params/ExeTracer.hh"
43
44using namespace std;
45using namespace TheISA;
46
47namespace Trace {
48
49void
50Trace::ExeTracerRecord::dump()
51{
52    ostream &outs = Trace::output();
53
54    if (IsOn(ExecTicks))
55        ccprintf(outs, "%7d: ", when);
56
57    outs << thread->getCpuPtr()->name() << " ";
58
59    if (IsOn(ExecSpeculative))
60        outs << (misspeculating ? "-" : "+") << " ";
61
62    if (IsOn(ExecThread))
63        outs << "T" << thread->getThreadNum() << " : ";
64
65
66    std::string sym_str;
67    Addr sym_addr;
68    if (debugSymbolTable
69        && IsOn(ExecSymbol)
70        && debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)) {
71        if (PC != sym_addr)
72            sym_str += csprintf("+%d", PC - sym_addr);
73        outs << "@" << sym_str << " : ";
74    }
75    else {
76        outs << "0x" << hex << PC << " : ";
77    }
78
79    //
80    //  Print decoded instruction
81    //
82
83    outs << setw(26) << left;
84    outs << staticInst->disassemble(PC, debugSymbolTable);
85    outs << " : ";
86
87    if (IsOn(ExecOpClass)) {
88        outs << Enums::OpClassStrings[staticInst->opClass()] << " : ";
89    }
90
91    if (IsOn(ExecResult) && data_status != DataInvalid) {
92        ccprintf(outs, " D=%#018x", data.as_int);
93    }
94
95    if (IsOn(ExecEffAddr) && addr_valid)
96        outs << " A=0x" << hex << addr;
97
98    if (IsOn(ExecFetchSeq) && fetch_seq_valid)
99        outs << "  FetchSeq=" << dec << fetch_seq;
100
101    if (IsOn(ExecCPSeq) && cp_seq_valid)
102        outs << "  CPSeq=" << dec << cp_seq;
103
104    //
105    //  End of line...
106    //
107    outs << endl;
108}
109
110/* namespace Trace */ }
111
112////////////////////////////////////////////////////////////////////////
113//
114//  ExeTracer Simulation Object
115//
116Trace::ExeTracer *
117ExeTracerParams::create()
118{
119    return new Trace::ExeTracer(name);
120};
121