exetrace.cc revision 3065:9bcb404a4a5b 
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 *          Lisa Hsu
30 *          Nathan Binkert
31 *          Steve Raasch
32 */
33
34#include <fstream>
35#include <iomanip>
36
37#include "arch/regfile.hh"
38#include "base/loader/symtab.hh"
39#include "cpu/base.hh"
40#include "cpu/exetrace.hh"
41#include "cpu/static_inst.hh"
42#include "sim/param.hh"
43#include "sim/system.hh"
44
45//XXX This is temporary
46#include "arch/isa_specific.hh"
47
48using namespace std;
49using namespace TheISA;
50
51////////////////////////////////////////////////////////////////////////
52//
53//  Methods for the InstRecord object
54//
55
56
57void
58Trace::InstRecord::dump(ostream &outs)
59{
60    if (flags[PRINT_REG_DELTA])
61    {
62#if THE_ISA == SPARC_ISA
63        static uint64_t regs[32] = {
64            0, 0, 0, 0, 0, 0, 0, 0,
65            0, 0, 0, 0, 0, 0, 0, 0,
66            0, 0, 0, 0, 0, 0, 0, 0,
67            0, 0, 0, 0, 0, 0, 0, 0};
68        static uint64_t ccr = 0;
69        static uint64_t y = 0;
70        static uint64_t floats[32];
71        uint64_t newVal;
72        static const char * prefixes[4] = {"G", "O", "L", "I"};
73
74        char buf[256];
75        sprintf(buf, "PC = 0x%016llx", thread->readNextPC());
76        outs << buf;
77        sprintf(buf, " NPC = 0x%016llx", thread->readNextNPC());
78        outs << buf;
79        newVal = thread->readMiscReg(SparcISA::MISCREG_CCR);
80        if(newVal != ccr)
81        {
82            sprintf(buf, " CCR = 0x%016llx", newVal);
83            outs << buf;
84            ccr = newVal;
85        }
86        newVal = thread->readMiscReg(SparcISA::MISCREG_Y);
87        if(newVal != y)
88        {
89            sprintf(buf, " Y = 0x%016llx", newVal);
90            outs << buf;
91            y = newVal;
92        }
93        for(int y = 0; y < 4; y++)
94        {
95            for(int x = 0; x < 8; x++)
96            {
97                int index = x + 8 * y;
98                newVal = thread->readIntReg(index);
99                if(regs[index] != newVal)
100                {
101                    sprintf(buf, " %s%d = 0x%016llx", prefixes[y], x, newVal);
102                    outs << buf;
103                    regs[index] = newVal;
104                }
105            }
106        }
107        for(int y = 0; y < 32; y++)
108        {
109            newVal = thread->readFloatRegBits(2 * y, 64);
110            if(floats[y] != newVal)
111            {
112                sprintf(buf, " F%d = 0x%016llx", y, newVal);
113                outs << buf;
114                floats[y] = newVal;
115            }
116        }
117        outs << endl;
118#endif
119    }
120    else if (flags[INTEL_FORMAT]) {
121#if FULL_SYSTEM
122        bool is_trace_system = (thread->getCpuPtr()->system->name() == trace_system);
123#else
124        bool is_trace_system = true;
125#endif
126        if (is_trace_system) {
127            ccprintf(outs, "%7d ) ", cycle);
128            outs << "0x" << hex << PC << ":\t";
129            if (staticInst->isLoad()) {
130                outs << "<RD 0x" << hex << addr;
131                outs << ">";
132            } else if (staticInst->isStore()) {
133                outs << "<WR 0x" << hex << addr;
134                outs << ">";
135            }
136            outs << endl;
137        }
138    } else {
139        if (flags[PRINT_CYCLE])
140            ccprintf(outs, "%7d: ", cycle);
141
142        outs << thread->getCpuPtr()->name() << " ";
143
144        if (flags[TRACE_MISSPEC])
145            outs << (misspeculating ? "-" : "+") << " ";
146
147        if (flags[PRINT_THREAD_NUM])
148            outs << "T" << thread->getThreadNum() << " : ";
149
150
151        std::string sym_str;
152        Addr sym_addr;
153        if (debugSymbolTable
154            && debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)
155            && flags[PC_SYMBOL]) {
156            if (PC != sym_addr)
157                sym_str += csprintf("+%d", PC - sym_addr);
158            outs << "@" << sym_str << " : ";
159        }
160        else {
161            outs << "0x" << hex << PC << " : ";
162        }
163
164        //
165        //  Print decoded instruction
166        //
167
168#if defined(__GNUC__) && (__GNUC__ < 3)
169        // There's a bug in gcc 2.x library that prevents setw()
170        // from working properly on strings
171        string mc(staticInst->disassemble(PC, debugSymbolTable));
172        while (mc.length() < 26)
173            mc += " ";
174        outs << mc;
175#else
176        outs << setw(26) << left << staticInst->disassemble(PC, debugSymbolTable);
177#endif
178
179        outs << " : ";
180
181        if (flags[PRINT_OP_CLASS]) {
182            outs << opClassStrings[staticInst->opClass()] << " : ";
183        }
184
185        if (flags[PRINT_RESULT_DATA] && data_status != DataInvalid) {
186            outs << " D=";
187#if 0
188            if (data_status == DataDouble)
189                ccprintf(outs, "%f", data.as_double);
190            else
191                ccprintf(outs, "%#018x", data.as_int);
192#else
193            ccprintf(outs, "%#018x", data.as_int);
194#endif
195        }
196
197        if (flags[PRINT_EFF_ADDR] && addr_valid)
198            outs << " A=0x" << hex << addr;
199
200        if (flags[PRINT_INT_REGS] && regs_valid) {
201            for (int i = 0; i < TheISA::NumIntRegs;)
202                for (int j = i + 1; i <= j; i++)
203                    ccprintf(outs, "r%02d = %#018x%s", i,
204                            iregs->regs.readReg(i),
205                            ((i == j) ? "\n" : "    "));
206            outs << "\n";
207        }
208
209        if (flags[PRINT_FETCH_SEQ] && fetch_seq_valid)
210            outs << "  FetchSeq=" << dec << fetch_seq;
211
212        if (flags[PRINT_CP_SEQ] && cp_seq_valid)
213            outs << "  CPSeq=" << dec << cp_seq;
214
215        //
216        //  End of line...
217        //
218        outs << endl;
219    }
220}
221
222
223vector<bool> Trace::InstRecord::flags(NUM_BITS);
224string Trace::InstRecord::trace_system;
225
226////////////////////////////////////////////////////////////////////////
227//
228// Parameter space for per-cycle execution address tracing options.
229// Derive from ParamContext so we can override checkParams() function.
230//
231class ExecutionTraceParamContext : public ParamContext
232{
233  public:
234    ExecutionTraceParamContext(const string &_iniSection)
235        : ParamContext(_iniSection)
236        {
237        }
238
239    void checkParams();	// defined at bottom of file
240};
241
242ExecutionTraceParamContext exeTraceParams("exetrace");
243
244Param<bool> exe_trace_spec(&exeTraceParams, "speculative",
245                           "capture speculative instructions", true);
246
247Param<bool> exe_trace_print_cycle(&exeTraceParams, "print_cycle",
248                                  "print cycle number", true);
249Param<bool> exe_trace_print_opclass(&exeTraceParams, "print_opclass",
250                                  "print op class", true);
251Param<bool> exe_trace_print_thread(&exeTraceParams, "print_thread",
252                                  "print thread number", true);
253Param<bool> exe_trace_print_effaddr(&exeTraceParams, "print_effaddr",
254                                  "print effective address", true);
255Param<bool> exe_trace_print_data(&exeTraceParams, "print_data",
256                                  "print result data", true);
257Param<bool> exe_trace_print_iregs(&exeTraceParams, "print_iregs",
258                                  "print all integer regs", false);
259Param<bool> exe_trace_print_fetchseq(&exeTraceParams, "print_fetchseq",
260                                  "print fetch sequence number", false);
261Param<bool> exe_trace_print_cp_seq(&exeTraceParams, "print_cpseq",
262                                  "print correct-path sequence number", false);
263Param<bool> exe_trace_print_reg_delta(&exeTraceParams, "print_reg_delta",
264                                  "print which registers changed to what", false);
265Param<bool> exe_trace_pc_symbol(&exeTraceParams, "pc_symbol",
266                                  "Use symbols for the PC if available", true);
267Param<bool> exe_trace_intel_format(&exeTraceParams, "intel_format",
268                                   "print trace in intel compatible format", false);
269Param<string> exe_trace_system(&exeTraceParams, "trace_system",
270                                   "print trace of which system (client or server)",
271                                   "client");
272
273
274//
275// Helper function for ExecutionTraceParamContext::checkParams() just
276// to get us into the InstRecord namespace
277//
278void
279Trace::InstRecord::setParams()
280{
281    flags[TRACE_MISSPEC]     = exe_trace_spec;
282
283    flags[PRINT_CYCLE]       = exe_trace_print_cycle;
284    flags[PRINT_OP_CLASS]    = exe_trace_print_opclass;
285    flags[PRINT_THREAD_NUM]  = exe_trace_print_thread;
286    flags[PRINT_RESULT_DATA] = exe_trace_print_effaddr;
287    flags[PRINT_EFF_ADDR]    = exe_trace_print_data;
288    flags[PRINT_INT_REGS]    = exe_trace_print_iregs;
289    flags[PRINT_FETCH_SEQ]   = exe_trace_print_fetchseq;
290    flags[PRINT_CP_SEQ]      = exe_trace_print_cp_seq;
291    flags[PRINT_REG_DELTA]   = exe_trace_print_reg_delta;
292    flags[PC_SYMBOL]         = exe_trace_pc_symbol;
293    flags[INTEL_FORMAT]      = exe_trace_intel_format;
294    trace_system	     = exe_trace_system;
295}
296
297void
298ExecutionTraceParamContext::checkParams()
299{
300    Trace::InstRecord::setParams();
301}
302
303