exetrace.cc revision 3064:e907dd767a63
1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Steve Reinhardt 29 * Lisa Hsu 30 * Nathan Binkert 31 * Steve Raasch 32 */ 33 34#include <fstream> 35#include <iomanip> 36 37#include "arch/regfile.hh" 38#include "base/loader/symtab.hh" 39#include "cpu/base.hh" 40#include "cpu/exetrace.hh" 41#include "cpu/static_inst.hh" 42#include "sim/param.hh" 43#include "sim/system.hh" 44 45using namespace std; 46using namespace TheISA; 47 48//////////////////////////////////////////////////////////////////////// 49// 50// Methods for the InstRecord object 51// 52 53 54void 55Trace::InstRecord::dump(ostream &outs) 56{ 57 static uint64_t regs[32] = { 58 0, 0, 0, 0, 0, 0, 0, 0, 59 0, 0, 0, 0, 0, 0, 0, 0, 60 0, 0, 0, 0, 0, 0, 0, 0, 61 0, 0, 0, 0, 0, 0, 0, 0}; 62 static uint64_t ccr = 0; 63 static uint64_t y = 0; 64 static uint64_t floats[32]; 65 uint64_t newVal; 66 static const char * prefixes[4] = {"G", "O", "L", "I"}; 67 if (flags[PRINT_REG_DELTA]) 68 { 69 char buf[256]; 70 sprintf(buf, "PC = 0x%016llx", thread->readNextPC()); 71 outs << buf; 72 sprintf(buf, " NPC = 0x%016llx", thread->readNextNPC()); 73 outs << buf; 74 newVal = thread->readMiscReg(SparcISA::MISCREG_CCR); 75 if(newVal != ccr) 76 { 77 sprintf(buf, " CCR = 0x%016llx", newVal); 78 outs << buf; 79 ccr = newVal; 80 } 81 newVal = thread->readMiscReg(SparcISA::MISCREG_Y); 82 if(newVal != y) 83 { 84 sprintf(buf, " Y = 0x%016llx", newVal); 85 outs << buf; 86 y = newVal; 87 } 88 for(int y = 0; y < 4; y++) 89 { 90 for(int x = 0; x < 8; x++) 91 { 92 int index = x + 8 * y; 93 newVal = thread->readIntReg(index); 94 if(regs[index] != newVal) 95 { 96 sprintf(buf, " %s%d = 0x%016llx", prefixes[y], x, newVal); 97 outs << buf; 98 regs[index] = newVal; 99 } 100 } 101 } 102 for(int y = 0; y < 32; y++) 103 { 104 newVal = thread->readFloatRegBits(2 * y, 64); 105 if(floats[y] != newVal) 106 { 107 sprintf(buf, " F%d = 0x%016llx", y, newVal); 108 outs << buf; 109 floats[y] = newVal; 110 } 111 } 112 outs << endl; 113 } 114 else if (flags[INTEL_FORMAT]) { 115#if FULL_SYSTEM 116 bool is_trace_system = (thread->getCpuPtr()->system->name() == trace_system); 117#else 118 bool is_trace_system = true; 119#endif 120 if (is_trace_system) { 121 ccprintf(outs, "%7d ) ", cycle); 122 outs << "0x" << hex << PC << ":\t"; 123 if (staticInst->isLoad()) { 124 outs << "<RD 0x" << hex << addr; 125 outs << ">"; 126 } else if (staticInst->isStore()) { 127 outs << "<WR 0x" << hex << addr; 128 outs << ">"; 129 } 130 outs << endl; 131 } 132 } else { 133 if (flags[PRINT_CYCLE]) 134 ccprintf(outs, "%7d: ", cycle); 135 136 outs << thread->getCpuPtr()->name() << " "; 137 138 if (flags[TRACE_MISSPEC]) 139 outs << (misspeculating ? "-" : "+") << " "; 140 141 if (flags[PRINT_THREAD_NUM]) 142 outs << "T" << thread->getThreadNum() << " : "; 143 144 145 std::string sym_str; 146 Addr sym_addr; 147 if (debugSymbolTable 148 && debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr) 149 && flags[PC_SYMBOL]) { 150 if (PC != sym_addr) 151 sym_str += csprintf("+%d", PC - sym_addr); 152 outs << "@" << sym_str << " : "; 153 } 154 else { 155 outs << "0x" << hex << PC << " : "; 156 } 157 158 // 159 // Print decoded instruction 160 // 161 162#if defined(__GNUC__) && (__GNUC__ < 3) 163 // There's a bug in gcc 2.x library that prevents setw() 164 // from working properly on strings 165 string mc(staticInst->disassemble(PC, debugSymbolTable)); 166 while (mc.length() < 26) 167 mc += " "; 168 outs << mc; 169#else 170 outs << setw(26) << left << staticInst->disassemble(PC, debugSymbolTable); 171#endif 172 173 outs << " : "; 174 175 if (flags[PRINT_OP_CLASS]) { 176 outs << opClassStrings[staticInst->opClass()] << " : "; 177 } 178 179 if (flags[PRINT_RESULT_DATA] && data_status != DataInvalid) { 180 outs << " D="; 181#if 0 182 if (data_status == DataDouble) 183 ccprintf(outs, "%f", data.as_double); 184 else 185 ccprintf(outs, "%#018x", data.as_int); 186#else 187 ccprintf(outs, "%#018x", data.as_int); 188#endif 189 } 190 191 if (flags[PRINT_EFF_ADDR] && addr_valid) 192 outs << " A=0x" << hex << addr; 193 194 if (flags[PRINT_INT_REGS] && regs_valid) { 195 for (int i = 0; i < TheISA::NumIntRegs;) 196 for (int j = i + 1; i <= j; i++) 197 ccprintf(outs, "r%02d = %#018x%s", i, 198 iregs->regs.readReg(i), 199 ((i == j) ? "\n" : " ")); 200 outs << "\n"; 201 } 202 203 if (flags[PRINT_FETCH_SEQ] && fetch_seq_valid) 204 outs << " FetchSeq=" << dec << fetch_seq; 205 206 if (flags[PRINT_CP_SEQ] && cp_seq_valid) 207 outs << " CPSeq=" << dec << cp_seq; 208 209 // 210 // End of line... 211 // 212 outs << endl; 213 } 214} 215 216 217vector<bool> Trace::InstRecord::flags(NUM_BITS); 218string Trace::InstRecord::trace_system; 219 220//////////////////////////////////////////////////////////////////////// 221// 222// Parameter space for per-cycle execution address tracing options. 223// Derive from ParamContext so we can override checkParams() function. 224// 225class ExecutionTraceParamContext : public ParamContext 226{ 227 public: 228 ExecutionTraceParamContext(const string &_iniSection) 229 : ParamContext(_iniSection) 230 { 231 } 232 233 void checkParams(); // defined at bottom of file 234}; 235 236ExecutionTraceParamContext exeTraceParams("exetrace"); 237 238Param<bool> exe_trace_spec(&exeTraceParams, "speculative", 239 "capture speculative instructions", true); 240 241Param<bool> exe_trace_print_cycle(&exeTraceParams, "print_cycle", 242 "print cycle number", true); 243Param<bool> exe_trace_print_opclass(&exeTraceParams, "print_opclass", 244 "print op class", true); 245Param<bool> exe_trace_print_thread(&exeTraceParams, "print_thread", 246 "print thread number", true); 247Param<bool> exe_trace_print_effaddr(&exeTraceParams, "print_effaddr", 248 "print effective address", true); 249Param<bool> exe_trace_print_data(&exeTraceParams, "print_data", 250 "print result data", true); 251Param<bool> exe_trace_print_iregs(&exeTraceParams, "print_iregs", 252 "print all integer regs", false); 253Param<bool> exe_trace_print_fetchseq(&exeTraceParams, "print_fetchseq", 254 "print fetch sequence number", false); 255Param<bool> exe_trace_print_cp_seq(&exeTraceParams, "print_cpseq", 256 "print correct-path sequence number", false); 257Param<bool> exe_trace_print_reg_delta(&exeTraceParams, "print_reg_delta", 258 "print which registers changed to what", false); 259Param<bool> exe_trace_pc_symbol(&exeTraceParams, "pc_symbol", 260 "Use symbols for the PC if available", true); 261Param<bool> exe_trace_intel_format(&exeTraceParams, "intel_format", 262 "print trace in intel compatible format", false); 263Param<string> exe_trace_system(&exeTraceParams, "trace_system", 264 "print trace of which system (client or server)", 265 "client"); 266 267 268// 269// Helper function for ExecutionTraceParamContext::checkParams() just 270// to get us into the InstRecord namespace 271// 272void 273Trace::InstRecord::setParams() 274{ 275 flags[TRACE_MISSPEC] = exe_trace_spec; 276 277 flags[PRINT_CYCLE] = exe_trace_print_cycle; 278 flags[PRINT_OP_CLASS] = exe_trace_print_opclass; 279 flags[PRINT_THREAD_NUM] = exe_trace_print_thread; 280 flags[PRINT_RESULT_DATA] = exe_trace_print_effaddr; 281 flags[PRINT_EFF_ADDR] = exe_trace_print_data; 282 flags[PRINT_INT_REGS] = exe_trace_print_iregs; 283 flags[PRINT_FETCH_SEQ] = exe_trace_print_fetchseq; 284 flags[PRINT_CP_SEQ] = exe_trace_print_cp_seq; 285 flags[PRINT_REG_DELTA] = exe_trace_print_reg_delta; 286 flags[PC_SYMBOL] = exe_trace_pc_symbol; 287 flags[INTEL_FORMAT] = exe_trace_intel_format; 288 trace_system = exe_trace_system; 289} 290 291void 292ExecutionTraceParamContext::checkParams() 293{ 294 Trace::InstRecord::setParams(); 295} 296 297