exetrace.cc revision 3059:470bc7016218 
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 *          Lisa Hsu
30 *          Nathan Binkert
31 *          Steve Raasch
32 */
33
34#include <fstream>
35#include <iomanip>
36
37#include "arch/regfile.hh"
38#include "base/loader/symtab.hh"
39#include "cpu/base.hh"
40#include "cpu/exetrace.hh"
41#include "cpu/static_inst.hh"
42#include "sim/param.hh"
43#include "sim/system.hh"
44
45using namespace std;
46using namespace TheISA;
47
48////////////////////////////////////////////////////////////////////////
49//
50//  Methods for the InstRecord object
51//
52
53
54void
55Trace::InstRecord::dump(ostream &outs)
56{
57    static uint64_t regs[32] = {
58        0, 0, 0, 0, 0, 0, 0, 0,
59        0, 0, 0, 0, 0, 0, 0, 0,
60        0, 0, 0, 0, 0, 0, 0, 0,
61        0, 0, 0, 0, 0, 0, 0, 0};
62    static uint64_t ccr = 0;
63    static uint64_t y = 0;
64    static uint64_t floats[32];
65    uint64_t newVal;
66    static const char * prefixes[4] = {"G", "O", "L", "I"};
67    if (flags[PRINT_REG_DELTA])
68    {
69        ThreadContext * context = cpu->threadContexts[0];
70        char buf[256];
71        sprintf(buf, "PC = 0x%016llx", context->readNextPC());
72        outs << buf;
73        sprintf(buf, " NPC = 0x%016llx", context->readNextNPC());
74        outs << buf;
75        newVal = context->readMiscReg(SparcISA::MISCREG_CCR);
76        if(newVal != ccr)
77        {
78            sprintf(buf, " CCR = 0x%016llx", newVal);
79            outs << buf;
80            ccr = newVal;
81        }
82        newVal = context->readMiscReg(SparcISA::MISCREG_Y);
83        if(newVal != y)
84        {
85            sprintf(buf, " Y = 0x%016llx", newVal);
86            outs << buf;
87            y = newVal;
88        }
89        for(int y = 0; y < 4; y++)
90        {
91            for(int x = 0; x < 8; x++)
92            {
93                int index = x + 8 * y;
94                newVal = context->readIntReg(index);
95                if(regs[index] != newVal)
96                {
97                    sprintf(buf, " %s%d = 0x%016llx", prefixes[y], x, newVal);
98                    outs << buf;
99                    regs[index] = newVal;
100                }
101            }
102        }
103        for(int y = 0; y < 32; y++)
104        {
105            newVal = context->readFloatRegBits(2 * y, 64);
106            if(floats[y] != newVal)
107            {
108                sprintf(buf, " F%d = 0x%016llx", y, newVal);
109                outs << buf;
110                floats[y] = newVal;
111            }
112        }
113        outs << endl;
114        /*
115        int numSources = staticInst->numSrcRegs();
116        int numDests = staticInst->numDestRegs();
117        outs << "Sources:";
118        for(int x = 0; x < numSources; x++)
119        {
120            int sourceNum = staticInst->srcRegIdx(x);
121            if(sourceNum < FP_Base_DepTag)
122                outs << " " << getIntRegName(sourceNum);
123            else if(sourceNum < Ctrl_Base_DepTag)
124                outs << " " << getFloatRegName(sourceNum - FP_Base_DepTag);
125            else
126                outs << " " << getMiscRegName(sourceNum - Ctrl_Base_DepTag);
127        }
128        outs << endl;
129        outs << "Destinations:";
130        for(int x = 0; x < numDests; x++)
131        {
132            int destNum = staticInst->destRegIdx(x);
133            if(destNum < FP_Base_DepTag)
134                outs << " " << getIntRegName(destNum);
135            else if(destNum < Ctrl_Base_DepTag)
136                outs << " " << getFloatRegName(destNum - FP_Base_DepTag);
137            else
138                outs << " " << getMiscRegName(destNum - Ctrl_Base_DepTag);
139        }
140        outs << endl;*/
141    }
142    else if (flags[INTEL_FORMAT]) {
143#if FULL_SYSTEM
144        bool is_trace_system = (cpu->system->name() == trace_system);
145#else
146        bool is_trace_system = true;
147#endif
148        if (is_trace_system) {
149            ccprintf(outs, "%7d ) ", cycle);
150            outs << "0x" << hex << PC << ":\t";
151            if (staticInst->isLoad()) {
152                outs << "<RD 0x" << hex << addr;
153                outs << ">";
154            } else if (staticInst->isStore()) {
155                outs << "<WR 0x" << hex << addr;
156                outs << ">";
157            }
158            outs << endl;
159        }
160    } else {
161        if (flags[PRINT_CYCLE])
162            ccprintf(outs, "%7d: ", cycle);
163
164        outs << cpu->name() << " ";
165
166        if (flags[TRACE_MISSPEC])
167            outs << (misspeculating ? "-" : "+") << " ";
168
169        if (flags[PRINT_THREAD_NUM])
170            outs << "T" << thread << " : ";
171
172
173        std::string sym_str;
174        Addr sym_addr;
175        if (debugSymbolTable
176            && debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)
177            && flags[PC_SYMBOL]) {
178            if (PC != sym_addr)
179                sym_str += csprintf("+%d", PC - sym_addr);
180            outs << "@" << sym_str << " : ";
181        }
182        else {
183            outs << "0x" << hex << PC << " : ";
184        }
185
186        //
187        //  Print decoded instruction
188        //
189
190#if defined(__GNUC__) && (__GNUC__ < 3)
191        // There's a bug in gcc 2.x library that prevents setw()
192        // from working properly on strings
193        string mc(staticInst->disassemble(PC, debugSymbolTable));
194        while (mc.length() < 26)
195            mc += " ";
196        outs << mc;
197#else
198        outs << setw(26) << left << staticInst->disassemble(PC, debugSymbolTable);
199#endif
200
201        outs << " : ";
202
203        if (flags[PRINT_OP_CLASS]) {
204            outs << opClassStrings[staticInst->opClass()] << " : ";
205        }
206
207        if (flags[PRINT_RESULT_DATA] && data_status != DataInvalid) {
208            outs << " D=";
209#if 0
210            if (data_status == DataDouble)
211                ccprintf(outs, "%f", data.as_double);
212            else
213                ccprintf(outs, "%#018x", data.as_int);
214#else
215            ccprintf(outs, "%#018x", data.as_int);
216#endif
217        }
218
219        if (flags[PRINT_EFF_ADDR] && addr_valid)
220            outs << " A=0x" << hex << addr;
221
222        if (flags[PRINT_INT_REGS] && regs_valid) {
223            for (int i = 0; i < TheISA::NumIntRegs;)
224                for (int j = i + 1; i <= j; i++)
225                    ccprintf(outs, "r%02d = %#018x%s", i,
226                            iregs->regs.readReg(i),
227                            ((i == j) ? "\n" : "    "));
228            outs << "\n";
229        }
230
231        if (flags[PRINT_FETCH_SEQ] && fetch_seq_valid)
232            outs << "  FetchSeq=" << dec << fetch_seq;
233
234        if (flags[PRINT_CP_SEQ] && cp_seq_valid)
235            outs << "  CPSeq=" << dec << cp_seq;
236
237        //
238        //  End of line...
239        //
240        outs << endl;
241    }
242}
243
244
245vector<bool> Trace::InstRecord::flags(NUM_BITS);
246string Trace::InstRecord::trace_system;
247
248////////////////////////////////////////////////////////////////////////
249//
250// Parameter space for per-cycle execution address tracing options.
251// Derive from ParamContext so we can override checkParams() function.
252//
253class ExecutionTraceParamContext : public ParamContext
254{
255  public:
256    ExecutionTraceParamContext(const string &_iniSection)
257        : ParamContext(_iniSection)
258        {
259        }
260
261    void checkParams();	// defined at bottom of file
262};
263
264ExecutionTraceParamContext exeTraceParams("exetrace");
265
266Param<bool> exe_trace_spec(&exeTraceParams, "speculative",
267                           "capture speculative instructions", true);
268
269Param<bool> exe_trace_print_cycle(&exeTraceParams, "print_cycle",
270                                  "print cycle number", true);
271Param<bool> exe_trace_print_opclass(&exeTraceParams, "print_opclass",
272                                  "print op class", true);
273Param<bool> exe_trace_print_thread(&exeTraceParams, "print_thread",
274                                  "print thread number", true);
275Param<bool> exe_trace_print_effaddr(&exeTraceParams, "print_effaddr",
276                                  "print effective address", true);
277Param<bool> exe_trace_print_data(&exeTraceParams, "print_data",
278                                  "print result data", true);
279Param<bool> exe_trace_print_iregs(&exeTraceParams, "print_iregs",
280                                  "print all integer regs", false);
281Param<bool> exe_trace_print_fetchseq(&exeTraceParams, "print_fetchseq",
282                                  "print fetch sequence number", false);
283Param<bool> exe_trace_print_cp_seq(&exeTraceParams, "print_cpseq",
284                                  "print correct-path sequence number", false);
285Param<bool> exe_trace_print_reg_delta(&exeTraceParams, "print_reg_delta",
286                                  "print which registers changed to what", false);
287Param<bool> exe_trace_pc_symbol(&exeTraceParams, "pc_symbol",
288                                  "Use symbols for the PC if available", true);
289Param<bool> exe_trace_intel_format(&exeTraceParams, "intel_format",
290                                   "print trace in intel compatible format", false);
291Param<string> exe_trace_system(&exeTraceParams, "trace_system",
292                                   "print trace of which system (client or server)",
293                                   "client");
294
295
296//
297// Helper function for ExecutionTraceParamContext::checkParams() just
298// to get us into the InstRecord namespace
299//
300void
301Trace::InstRecord::setParams()
302{
303    flags[TRACE_MISSPEC]     = exe_trace_spec;
304
305    flags[PRINT_CYCLE]       = exe_trace_print_cycle;
306    flags[PRINT_OP_CLASS]    = exe_trace_print_opclass;
307    flags[PRINT_THREAD_NUM]  = exe_trace_print_thread;
308    flags[PRINT_RESULT_DATA] = exe_trace_print_effaddr;
309    flags[PRINT_EFF_ADDR]    = exe_trace_print_data;
310    flags[PRINT_INT_REGS]    = exe_trace_print_iregs;
311    flags[PRINT_FETCH_SEQ]   = exe_trace_print_fetchseq;
312    flags[PRINT_CP_SEQ]      = exe_trace_print_cp_seq;
313    flags[PRINT_REG_DELTA]   = exe_trace_print_reg_delta;
314    flags[PC_SYMBOL]         = exe_trace_pc_symbol;
315    flags[INTEL_FORMAT]      = exe_trace_intel_format;
316    trace_system	     = exe_trace_system;
317}
318
319void
320ExecutionTraceParamContext::checkParams()
321{
322    Trace::InstRecord::setParams();
323}
324
325