exetrace.cc revision 2525
1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#include <fstream> 30#include <iomanip> 31 32#include "base/loader/symtab.hh" 33#include "cpu/base.hh" 34#include "cpu/exetrace.hh" 35#include "cpu/static_inst.hh" 36#include "sim/param.hh" 37#include "sim/system.hh" 38 39using namespace std; 40 41 42//////////////////////////////////////////////////////////////////////// 43// 44// Methods for the InstRecord object 45// 46 47 48void 49Trace::InstRecord::dump(ostream &outs) 50{ 51 if (flags[INTEL_FORMAT]) { 52#if FULL_SYSTEM 53 bool is_trace_system = (cpu->system->name() == trace_system); 54#else 55 bool is_trace_system = true; 56#endif 57 if (is_trace_system) { 58 ccprintf(outs, "%7d ) ", cycle); 59 outs << "0x" << hex << PC << ":\t"; 60 if (staticInst->isLoad()) { 61 outs << "<RD 0x" << hex << addr; 62 outs << ">"; 63 } else if (staticInst->isStore()) { 64 outs << "<WR 0x" << hex << addr; 65 outs << ">"; 66 } 67 outs << endl; 68 } 69 } else { 70 if (flags[PRINT_CYCLE]) 71 ccprintf(outs, "%7d: ", cycle); 72 73 outs << cpu->name() << " "; 74 75 if (flags[TRACE_MISSPEC]) 76 outs << (misspeculating ? "-" : "+") << " "; 77 78 if (flags[PRINT_THREAD_NUM]) 79 outs << "T" << thread << " : "; 80 81 82 std::string sym_str; 83 Addr sym_addr; 84 if (debugSymbolTable 85 && debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)) { 86 if (PC != sym_addr) 87 sym_str += csprintf("+%d", PC - sym_addr); 88 outs << "@" << sym_str << " : "; 89 } 90 else { 91 outs << "0x" << hex << PC << " : "; 92 } 93 94 // 95 // Print decoded instruction 96 // 97 98#if defined(__GNUC__) && (__GNUC__ < 3) 99 // There's a bug in gcc 2.x library that prevents setw() 100 // from working properly on strings 101 string mc(staticInst->disassemble(PC, debugSymbolTable)); 102 while (mc.length() < 26) 103 mc += " "; 104 outs << mc; 105#else 106 outs << setw(26) << left << staticInst->disassemble(PC, debugSymbolTable); 107#endif 108 109 outs << " : "; 110 111 if (flags[PRINT_OP_CLASS]) { 112 outs << opClassStrings[staticInst->opClass()] << " : "; 113 } 114 115 if (flags[PRINT_RESULT_DATA] && data_status != DataInvalid) { 116 outs << " D="; 117#if 0 118 if (data_status == DataDouble) 119 ccprintf(outs, "%f", data.as_double); 120 else 121 ccprintf(outs, "%#018x", data.as_int); 122#else 123 ccprintf(outs, "%#018x", data.as_int); 124#endif 125 } 126 127 if (flags[PRINT_EFF_ADDR] && addr_valid) 128 outs << " A=0x" << hex << addr; 129 130 if (flags[PRINT_INT_REGS] && regs_valid) { 131 for (int i = 0; i < TheISA::NumIntRegs;) 132 for (int j = i + 1; i <= j; i++) 133 ccprintf(outs, "r%02d = %#018x%s", i, 134 iregs->regs.readReg(i), 135 ((i == j) ? "\n" : " ")); 136 outs << "\n"; 137 } 138 139 if (flags[PRINT_FETCH_SEQ] && fetch_seq_valid) 140 outs << " FetchSeq=" << dec << fetch_seq; 141 142 if (flags[PRINT_CP_SEQ] && cp_seq_valid) 143 outs << " CPSeq=" << dec << cp_seq; 144 145 // 146 // End of line... 147 // 148 outs << endl; 149 } 150} 151 152 153vector<bool> Trace::InstRecord::flags(NUM_BITS); 154string Trace::InstRecord::trace_system; 155 156//////////////////////////////////////////////////////////////////////// 157// 158// Parameter space for per-cycle execution address tracing options. 159// Derive from ParamContext so we can override checkParams() function. 160// 161class ExecutionTraceParamContext : public ParamContext 162{ 163 public: 164 ExecutionTraceParamContext(const string &_iniSection) 165 : ParamContext(_iniSection) 166 { 167 } 168 169 void checkParams(); // defined at bottom of file 170}; 171 172ExecutionTraceParamContext exeTraceParams("exetrace"); 173 174Param<bool> exe_trace_spec(&exeTraceParams, "speculative", 175 "capture speculative instructions", true); 176 177Param<bool> exe_trace_print_cycle(&exeTraceParams, "print_cycle", 178 "print cycle number", true); 179Param<bool> exe_trace_print_opclass(&exeTraceParams, "print_opclass", 180 "print op class", true); 181Param<bool> exe_trace_print_thread(&exeTraceParams, "print_thread", 182 "print thread number", true); 183Param<bool> exe_trace_print_effaddr(&exeTraceParams, "print_effaddr", 184 "print effective address", true); 185Param<bool> exe_trace_print_data(&exeTraceParams, "print_data", 186 "print result data", true); 187Param<bool> exe_trace_print_iregs(&exeTraceParams, "print_iregs", 188 "print all integer regs", false); 189Param<bool> exe_trace_print_fetchseq(&exeTraceParams, "print_fetchseq", 190 "print fetch sequence number", false); 191Param<bool> exe_trace_print_cp_seq(&exeTraceParams, "print_cpseq", 192 "print correct-path sequence number", false); 193Param<bool> exe_trace_intel_format(&exeTraceParams, "intel_format", 194 "print trace in intel compatible format", false); 195Param<string> exe_trace_system(&exeTraceParams, "trace_system", 196 "print trace of which system (client or server)", 197 "client"); 198 199 200// 201// Helper function for ExecutionTraceParamContext::checkParams() just 202// to get us into the InstRecord namespace 203// 204void 205Trace::InstRecord::setParams() 206{ 207 flags[TRACE_MISSPEC] = exe_trace_spec; 208 209 flags[PRINT_CYCLE] = exe_trace_print_cycle; 210 flags[PRINT_OP_CLASS] = exe_trace_print_opclass; 211 flags[PRINT_THREAD_NUM] = exe_trace_print_thread; 212 flags[PRINT_RESULT_DATA] = exe_trace_print_effaddr; 213 flags[PRINT_EFF_ADDR] = exe_trace_print_data; 214 flags[PRINT_INT_REGS] = exe_trace_print_iregs; 215 flags[PRINT_FETCH_SEQ] = exe_trace_print_fetchseq; 216 flags[PRINT_CP_SEQ] = exe_trace_print_cp_seq; 217 flags[INTEL_FORMAT] = exe_trace_intel_format; 218 trace_system = exe_trace_system; 219} 220 221void 222ExecutionTraceParamContext::checkParams() 223{ 224 Trace::InstRecord::setParams(); 225} 226 227