exetrace.cc revision 2299
12SN/A/*
21762SN/A * Copyright (c) 2001-2005 The Regents of The University of Michigan
39920Syasuko.eckert@amd.com * All rights reserved.
42SN/A *
52SN/A * Redistribution and use in source and binary forms, with or without
62SN/A * modification, are permitted provided that the following conditions are
72SN/A * met: redistributions of source code must retain the above copyright
82SN/A * notice, this list of conditions and the following disclaimer;
92SN/A * redistributions in binary form must reproduce the above copyright
102SN/A * notice, this list of conditions and the following disclaimer in the
112SN/A * documentation and/or other materials provided with the distribution;
122SN/A * neither the name of the copyright holders nor the names of its
132SN/A * contributors may be used to endorse or promote products derived from
142SN/A * this software without specific prior written permission.
152SN/A *
162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272SN/A */
282665Ssaidi@eecs.umich.edu
292665Ssaidi@eecs.umich.edu#include <fstream>
302SN/A#include <iomanip>
312SN/A
321464SN/A#include "sim/param.hh"
331464SN/A#include "encumbered/cpu/full/dyn_inst.hh"
342SN/A#include "encumbered/cpu/full/spec_state.hh"
352SN/A#include "encumbered/cpu/full/issue.hh"
362SN/A#include "cpu/exetrace.hh"
372SN/A#include "base/loader/symtab.hh"
388229Snate@binkert.org#include "cpu/base.hh"
397720Sgblack@eecs.umich.edu#include "cpu/static_inst.hh"
402439SN/A
4156SN/Ausing namespace std;
426216Snate@binkert.org
438229Snate@binkert.org
442410SN/A////////////////////////////////////////////////////////////////////////
4512104Snathanael.premillieu@arm.com//
468542Sgblack@eecs.umich.edu//  Methods for the InstRecord object
479338SAndreas.Sandberg@arm.com//
4810201SAndrew.Bardsley@arm.com
492SN/A
502SN/Avoid
512623SN/ATrace::InstRecord::dump(ostream &outs)
521464SN/A{
5310319SAndreas.Sandberg@ARM.com    if (flags[INTEL_FORMAT]) {
5410259SAndrew.Bardsley@arm.com#if FULL_SYSTEM
552SN/A        bool is_trace_system = (cpu->system->name() == trace_system);
562SN/A#else
572SN/A        bool is_trace_system = true;
582SN/A#endif
592SN/A        if (is_trace_system) {
602SN/A            ccprintf(outs, "%7d ) ", cycle);
612SN/A            outs << "0x" << hex << PC << ":\t";
622SN/A            if (staticInst->isLoad()) {
632SN/A                outs << "<RD 0x" << hex << addr;
642SN/A                outs << ">";
652SN/A            } else if (staticInst->isStore()) {
662SN/A                outs << "<WR 0x" << hex << addr;
672SN/A                outs << ">";
682SN/A            }
6910201SAndrew.Bardsley@arm.com            outs << endl;
702SN/A        }
717619Sgblack@eecs.umich.edu    } else {
728542Sgblack@eecs.umich.edu        if (flags[PRINT_CYCLE])
738542Sgblack@eecs.umich.edu            ccprintf(outs, "%7d: ", cycle);
748542Sgblack@eecs.umich.edu
758542Sgblack@eecs.umich.edu        outs << cpu->name() << " ";
768542Sgblack@eecs.umich.edu
778902Sandreas.hansson@arm.com        if (flags[TRACE_MISSPEC])
788542Sgblack@eecs.umich.edu            outs << (misspeculating ? "-" : "+") << " ";
792SN/A
807619Sgblack@eecs.umich.edu        if (flags[PRINT_THREAD_NUM])
817619Sgblack@eecs.umich.edu            outs << "T" << thread << " : ";
822SN/A
8310201SAndrew.Bardsley@arm.com
842SN/A        std::string sym_str;
852SN/A        Addr sym_addr;
862SN/A        if (debugSymbolTable
872SN/A            && debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)
882SN/A            && flags[PC_SYMBOL]) {
892SN/A            if (PC != sym_addr)
902SN/A                sym_str += csprintf("+%d", PC - sym_addr);
912SN/A            outs << "@" << sym_str << " : ";
922SN/A        }
932SN/A        else {
942SN/A            outs << "0x" << hex << PC << " : ";
952SN/A        }
962SN/A
972SN/A        //
982SN/A        //  Print decoded instruction
999920Syasuko.eckert@amd.com        //
1002SN/A
1012SN/A#if defined(__GNUC__) && (__GNUC__ < 3)
1022SN/A        // There's a bug in gcc 2.x library that prevents setw()
1032SN/A        // from working properly on strings
1042SN/A        string mc(staticInst->disassemble(PC, debugSymbolTable));
1052SN/A        while (mc.length() < 26)
1062SN/A            mc += " ";
1072SN/A        outs << mc;
1082SN/A#else
1092SN/A        outs << setw(26) << left << staticInst->disassemble(PC, debugSymbolTable);
1102SN/A#endif
1112SN/A
1122SN/A        outs << " : ";
1132SN/A
1142SN/A        if (flags[PRINT_OP_CLASS]) {
1152SN/A            outs << opClassStrings[staticInst->opClass()] << " : ";
1162SN/A        }
1172SN/A
11810935Snilay@cs.wisc.edu        if (flags[PRINT_RESULT_DATA] && data_status != DataInvalid) {
11910935Snilay@cs.wisc.edu            outs << " D=";
12010715SRekai.GonzalezAlberquilla@arm.com#if 0
12110715SRekai.GonzalezAlberquilla@arm.com            if (data_status == DataDouble)
1222SN/A                ccprintf(outs, "%f", data.as_double);
1232SN/A            else
1242SN/A                ccprintf(outs, "%#018x", data.as_int);
1258542Sgblack@eecs.umich.edu#else
1262SN/A            ccprintf(outs, "%#018x", data.as_int);
1272SN/A#endif
1282SN/A        }
1295543Ssaidi@eecs.umich.edu
1302SN/A        if (flags[PRINT_EFF_ADDR] && addr_valid)
1315543Ssaidi@eecs.umich.edu            outs << " A=0x" << hex << addr;
1325543Ssaidi@eecs.umich.edu
1335543Ssaidi@eecs.umich.edu        if (flags[PRINT_INT_REGS] && regs_valid) {
1345543Ssaidi@eecs.umich.edu            for (int i = 0; i < 32;)
1352SN/A                for (int j = i + 1; i <= j; i++)
1362SN/A                    ccprintf(outs, "r%02d = %#018x%s", i, iregs->regs[i],
1377725SAli.Saidi@ARM.com                             ((i == j) ? "\n" : "    "));
1387725SAli.Saidi@ARM.com            outs << "\n";
1392SN/A        }
1405543Ssaidi@eecs.umich.edu
1415543Ssaidi@eecs.umich.edu        if (flags[PRINT_FETCH_SEQ] && fetch_seq_valid)
1429920Syasuko.eckert@amd.com            outs << "  FetchSeq=" << dec << fetch_seq;
1432SN/A
1445543Ssaidi@eecs.umich.edu        if (flags[PRINT_CP_SEQ] && cp_seq_valid)
1455543Ssaidi@eecs.umich.edu            outs << "  CPSeq=" << dec << cp_seq;
1465543Ssaidi@eecs.umich.edu
1475543Ssaidi@eecs.umich.edu        //
1482SN/A        //  End of line...
1495543Ssaidi@eecs.umich.edu        //
1505543Ssaidi@eecs.umich.edu        outs << endl;
1512935Sksewell@umich.edu    }
1522SN/A}
1532SN/A
1542103SN/A
1552103SN/Avector<bool> Trace::InstRecord::flags(NUM_BITS);
1562103SN/Astring Trace::InstRecord::trace_system;
1572103SN/A
1582103SN/A////////////////////////////////////////////////////////////////////////
1597784SAli.Saidi@ARM.com//
160512SN/A// Parameter space for per-cycle execution address tracing options.
161512SN/A// Derive from ParamContext so we can override checkParams() function.
162725SN/A//
1632296SN/Aclass ExecutionTraceParamContext : public ParamContext
1642336SN/A{
1652312SN/A  public:
1664828Sgblack@eecs.umich.edu    ExecutionTraceParamContext(const string &_iniSection)
1674539Sgblack@eecs.umich.edu        : ParamContext(_iniSection)
1684539Sgblack@eecs.umich.edu        {
1693271Sgblack@eecs.umich.edu        }
1704539Sgblack@eecs.umich.edu
1714539Sgblack@eecs.umich.edu    void checkParams();	// defined at bottom of file
1723271Sgblack@eecs.umich.edu};
1733271Sgblack@eecs.umich.edu
1742SN/AExecutionTraceParamContext exeTraceParams("exetrace");
1752SN/A
17610666SAli.Saidi@ARM.comParam<bool> exe_trace_spec(&exeTraceParams, "speculative",
1775335Shines@cs.fsu.edu                           "capture speculative instructions", true);
1787724SAli.Saidi@ARM.com
1798148SAli.Saidi@ARM.comParam<bool> exe_trace_print_cycle(&exeTraceParams, "print_cycle",
1807724SAli.Saidi@ARM.com                                  "print cycle number", true);
1812SN/AParam<bool> exe_trace_print_opclass(&exeTraceParams, "print_opclass",
1822SN/A                                  "print op class", true);
1832SN/AParam<bool> exe_trace_print_thread(&exeTraceParams, "print_thread",
1842SN/A                                  "print thread number", true);
1852SN/AParam<bool> exe_trace_print_effaddr(&exeTraceParams, "print_effaddr",
1862SN/A                                  "print effective address", true);
18712104Snathanael.premillieu@arm.comParam<bool> exe_trace_print_data(&exeTraceParams, "print_data",
1882SN/A                                  "print result data", true);
1892SN/AParam<bool> exe_trace_print_iregs(&exeTraceParams, "print_iregs",
1902SN/A                                  "print all integer regs", false);
19112104Snathanael.premillieu@arm.comParam<bool> exe_trace_print_fetchseq(&exeTraceParams, "print_fetchseq",
1922SN/A                                  "print fetch sequence number", false);
1932SN/AParam<bool> exe_trace_print_cp_seq(&exeTraceParams, "print_cpseq",
1942SN/A                                  "print correct-path sequence number", false);
1952SN/AParam<bool> exe_trace_pc_symbol(&exeTraceParams, "pc_symbol",
1962107SN/A                                  "Use symbols for the PC if available", true);
1972SN/AParam<bool> exe_trace_intel_format(&exeTraceParams, "intel_format",
1982SN/A                                   "print trace in intel compatible format", false);
1992SN/AParam<string> exe_trace_system(&exeTraceParams, "trace_system",
2002SN/A                                   "print trace of which system (client or server)",
2012SN/A                                   "client");
2022SN/A
2032SN/A
2041681SN/A//
2052107SN/A// Helper function for ExecutionTraceParamContext::checkParams() just
2062SN/A// to get us into the InstRecord namespace
2072SN/A//
2082SN/Avoid
2092SN/ATrace::InstRecord::setParams()
2102SN/A{
2112SN/A    flags[TRACE_MISSPEC]     = exe_trace_spec;
2122SN/A
2131681SN/A    flags[PRINT_CYCLE]       = exe_trace_print_cycle;
2142107SN/A    flags[PRINT_OP_CLASS]    = exe_trace_print_opclass;
2152SN/A    flags[PRINT_THREAD_NUM]  = exe_trace_print_thread;
2162SN/A    flags[PRINT_RESULT_DATA] = exe_trace_print_effaddr;
2172227SN/A    flags[PRINT_EFF_ADDR]    = exe_trace_print_data;
2182SN/A    flags[PRINT_INT_REGS]    = exe_trace_print_iregs;
2192SN/A    flags[PRINT_FETCH_SEQ]   = exe_trace_print_fetchseq;
2202SN/A    flags[PRINT_CP_SEQ]      = exe_trace_print_cp_seq;
2212SN/A    flags[PC_SYMBOL]         = exe_trace_pc_symbol;
22212104Snathanael.premillieu@arm.com    flags[INTEL_FORMAT]      = exe_trace_intel_format;
2232SN/A    trace_system	     = exe_trace_system;
22412104Snathanael.premillieu@arm.com}
2252SN/A
2262SN/Avoid
2272SN/AExecutionTraceParamContext::checkParams()
2282SN/A{
2292SN/A    Trace::InstRecord::setParams();
2302SN/A}
2312SN/A
2322SN/A