base.cc revision 8634:8390f2d80227
1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * Copyright (c) 2011 Regents of the University of California 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer; 10 * redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution; 13 * neither the name of the copyright holders nor the names of its 14 * contributors may be used to endorse or promote products derived from 15 * this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Authors: Steve Reinhardt 30 * Nathan Binkert 31 * Rick Strong 32 */ 33 34#include <iostream> 35#include <sstream> 36#include <string> 37 38#include "arch/tlb.hh" 39#include "base/loader/symtab.hh" 40#include "base/cprintf.hh" 41#include "base/misc.hh" 42#include "base/output.hh" 43#include "base/trace.hh" 44#include "cpu/base.hh" 45#include "cpu/cpuevent.hh" 46#include "cpu/profile.hh" 47#include "cpu/thread_context.hh" 48#include "debug/SyscallVerbose.hh" 49#include "params/BaseCPU.hh" 50#include "sim/process.hh" 51#include "sim/sim_events.hh" 52#include "sim/sim_exit.hh" 53#include "sim/system.hh" 54 55// Hack 56#include "sim/stat_control.hh" 57 58using namespace std; 59 60vector<BaseCPU *> BaseCPU::cpuList; 61 62// This variable reflects the max number of threads in any CPU. Be 63// careful to only use it once all the CPUs that you care about have 64// been initialized 65int maxThreadsPerCPU = 1; 66 67CPUProgressEvent::CPUProgressEvent(BaseCPU *_cpu, Tick ival) 68 : Event(Event::Progress_Event_Pri), _interval(ival), lastNumInst(0), 69 cpu(_cpu), _repeatEvent(true) 70{ 71 if (_interval) 72 cpu->schedule(this, curTick() + _interval); 73} 74 75void 76CPUProgressEvent::process() 77{ 78 Counter temp = cpu->totalInstructions(); 79#ifndef NDEBUG 80 double ipc = double(temp - lastNumInst) / (_interval / cpu->ticks(1)); 81 82 DPRINTFN("%s progress event, total committed:%i, progress insts committed: " 83 "%lli, IPC: %0.8d\n", cpu->name(), temp, temp - lastNumInst, 84 ipc); 85 ipc = 0.0; 86#else 87 cprintf("%lli: %s progress event, total committed:%i, progress insts " 88 "committed: %lli\n", curTick(), cpu->name(), temp, 89 temp - lastNumInst); 90#endif 91 lastNumInst = temp; 92 93 if (_repeatEvent) 94 cpu->schedule(this, curTick() + _interval); 95} 96 97const char * 98CPUProgressEvent::description() const 99{ 100 return "CPU Progress"; 101} 102 103#if FULL_SYSTEM 104BaseCPU::BaseCPU(Params *p) 105 : MemObject(p), clock(p->clock), instCnt(0), _cpuId(p->cpu_id), 106 interrupts(p->interrupts), 107 numThreads(p->numThreads), system(p->system), 108 phase(p->phase) 109#else 110BaseCPU::BaseCPU(Params *p) 111 : MemObject(p), clock(p->clock), _cpuId(p->cpu_id), 112 numThreads(p->numThreads), system(p->system), 113 phase(p->phase) 114#endif 115{ 116// currentTick = curTick(); 117 118 // if Python did not provide a valid ID, do it here 119 if (_cpuId == -1 ) { 120 _cpuId = cpuList.size(); 121 } 122 123 // add self to global list of CPUs 124 cpuList.push_back(this); 125 126 DPRINTF(SyscallVerbose, "Constructing CPU with id %d\n", _cpuId); 127 128 if (numThreads > maxThreadsPerCPU) 129 maxThreadsPerCPU = numThreads; 130 131 // allocate per-thread instruction-based event queues 132 comInstEventQueue = new EventQueue *[numThreads]; 133 for (ThreadID tid = 0; tid < numThreads; ++tid) 134 comInstEventQueue[tid] = 135 new EventQueue("instruction-based event queue"); 136 137 // 138 // set up instruction-count-based termination events, if any 139 // 140 if (p->max_insts_any_thread != 0) { 141 const char *cause = "a thread reached the max instruction count"; 142 for (ThreadID tid = 0; tid < numThreads; ++tid) { 143 Event *event = new SimLoopExitEvent(cause, 0); 144 comInstEventQueue[tid]->schedule(event, p->max_insts_any_thread); 145 } 146 } 147 148 if (p->max_insts_all_threads != 0) { 149 const char *cause = "all threads reached the max instruction count"; 150 151 // allocate & initialize shared downcounter: each event will 152 // decrement this when triggered; simulation will terminate 153 // when counter reaches 0 154 int *counter = new int; 155 *counter = numThreads; 156 for (ThreadID tid = 0; tid < numThreads; ++tid) { 157 Event *event = new CountedExitEvent(cause, *counter); 158 comInstEventQueue[tid]->schedule(event, p->max_insts_all_threads); 159 } 160 } 161 162 // allocate per-thread load-based event queues 163 comLoadEventQueue = new EventQueue *[numThreads]; 164 for (ThreadID tid = 0; tid < numThreads; ++tid) 165 comLoadEventQueue[tid] = new EventQueue("load-based event queue"); 166 167 // 168 // set up instruction-count-based termination events, if any 169 // 170 if (p->max_loads_any_thread != 0) { 171 const char *cause = "a thread reached the max load count"; 172 for (ThreadID tid = 0; tid < numThreads; ++tid) { 173 Event *event = new SimLoopExitEvent(cause, 0); 174 comLoadEventQueue[tid]->schedule(event, p->max_loads_any_thread); 175 } 176 } 177 178 if (p->max_loads_all_threads != 0) { 179 const char *cause = "all threads reached the max load count"; 180 // allocate & initialize shared downcounter: each event will 181 // decrement this when triggered; simulation will terminate 182 // when counter reaches 0 183 int *counter = new int; 184 *counter = numThreads; 185 for (ThreadID tid = 0; tid < numThreads; ++tid) { 186 Event *event = new CountedExitEvent(cause, *counter); 187 comLoadEventQueue[tid]->schedule(event, p->max_loads_all_threads); 188 } 189 } 190 191 functionTracingEnabled = false; 192 if (p->function_trace) { 193 const string fname = csprintf("ftrace.%s", name()); 194 functionTraceStream = simout.find(fname); 195 if (!functionTraceStream) 196 functionTraceStream = simout.create(fname); 197 198 currentFunctionStart = currentFunctionEnd = 0; 199 functionEntryTick = p->function_trace_start; 200 201 if (p->function_trace_start == 0) { 202 functionTracingEnabled = true; 203 } else { 204 typedef EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace> wrap; 205 Event *event = new wrap(this, true); 206 schedule(event, p->function_trace_start); 207 } 208 } 209#if FULL_SYSTEM 210 interrupts->setCPU(this); 211 212 profileEvent = NULL; 213 if (params()->profile) 214 profileEvent = new ProfileEvent(this, params()->profile); 215#endif 216 tracer = params()->tracer; 217} 218 219void 220BaseCPU::enableFunctionTrace() 221{ 222 functionTracingEnabled = true; 223} 224 225BaseCPU::~BaseCPU() 226{ 227} 228 229void 230BaseCPU::init() 231{ 232 if (!params()->defer_registration) 233 registerThreadContexts(); 234} 235 236void 237BaseCPU::startup() 238{ 239#if FULL_SYSTEM 240 if (!params()->defer_registration && profileEvent) 241 schedule(profileEvent, curTick()); 242#endif 243 244 if (params()->progress_interval) { 245 Tick num_ticks = ticks(params()->progress_interval); 246 247 new CPUProgressEvent(this, num_ticks); 248 } 249} 250 251 252void 253BaseCPU::regStats() 254{ 255 using namespace Stats; 256 257 numCycles 258 .name(name() + ".numCycles") 259 .desc("number of cpu cycles simulated") 260 ; 261 262 numWorkItemsStarted 263 .name(name() + ".numWorkItemsStarted") 264 .desc("number of work items this cpu started") 265 ; 266 267 numWorkItemsCompleted 268 .name(name() + ".numWorkItemsCompleted") 269 .desc("number of work items this cpu completed") 270 ; 271 272 int size = threadContexts.size(); 273 if (size > 1) { 274 for (int i = 0; i < size; ++i) { 275 stringstream namestr; 276 ccprintf(namestr, "%s.ctx%d", name(), i); 277 threadContexts[i]->regStats(namestr.str()); 278 } 279 } else if (size == 1) 280 threadContexts[0]->regStats(name()); 281 282#if FULL_SYSTEM 283#endif 284} 285 286Tick 287BaseCPU::nextCycle() 288{ 289 Tick next_tick = curTick() - phase + clock - 1; 290 next_tick -= (next_tick % clock); 291 next_tick += phase; 292 return next_tick; 293} 294 295Tick 296BaseCPU::nextCycle(Tick begin_tick) 297{ 298 Tick next_tick = begin_tick; 299 if (next_tick % clock != 0) 300 next_tick = next_tick - (next_tick % clock) + clock; 301 next_tick += phase; 302 303 assert(next_tick >= curTick()); 304 return next_tick; 305} 306 307void 308BaseCPU::registerThreadContexts() 309{ 310 ThreadID size = threadContexts.size(); 311 for (ThreadID tid = 0; tid < size; ++tid) { 312 ThreadContext *tc = threadContexts[tid]; 313 314 /** This is so that contextId and cpuId match where there is a 315 * 1cpu:1context relationship. Otherwise, the order of registration 316 * could affect the assignment and cpu 1 could have context id 3, for 317 * example. We may even want to do something like this for SMT so that 318 * cpu 0 has the lowest thread contexts and cpu N has the highest, but 319 * I'll just do this for now 320 */ 321 if (numThreads == 1) 322 tc->setContextId(system->registerThreadContext(tc, _cpuId)); 323 else 324 tc->setContextId(system->registerThreadContext(tc)); 325#if !FULL_SYSTEM 326 tc->getProcessPtr()->assignThreadContext(tc->contextId()); 327#endif 328 } 329} 330 331 332int 333BaseCPU::findContext(ThreadContext *tc) 334{ 335 ThreadID size = threadContexts.size(); 336 for (ThreadID tid = 0; tid < size; ++tid) { 337 if (tc == threadContexts[tid]) 338 return tid; 339 } 340 return 0; 341} 342 343void 344BaseCPU::switchOut() 345{ 346// panic("This CPU doesn't support sampling!"); 347#if FULL_SYSTEM 348 if (profileEvent && profileEvent->scheduled()) 349 deschedule(profileEvent); 350#endif 351} 352 353void 354BaseCPU::takeOverFrom(BaseCPU *oldCPU, Port *ic, Port *dc) 355{ 356 assert(threadContexts.size() == oldCPU->threadContexts.size()); 357 358 _cpuId = oldCPU->cpuId(); 359 360 ThreadID size = threadContexts.size(); 361 for (ThreadID i = 0; i < size; ++i) { 362 ThreadContext *newTC = threadContexts[i]; 363 ThreadContext *oldTC = oldCPU->threadContexts[i]; 364 365 newTC->takeOverFrom(oldTC); 366 367 CpuEvent::replaceThreadContext(oldTC, newTC); 368 369 assert(newTC->contextId() == oldTC->contextId()); 370 assert(newTC->threadId() == oldTC->threadId()); 371 system->replaceThreadContext(newTC, newTC->contextId()); 372 373 /* This code no longer works since the zero register (e.g., 374 * r31 on Alpha) doesn't necessarily contain zero at this 375 * point. 376 if (DTRACE(Context)) 377 ThreadContext::compare(oldTC, newTC); 378 */ 379 380 Port *old_itb_port, *old_dtb_port, *new_itb_port, *new_dtb_port; 381 old_itb_port = oldTC->getITBPtr()->getPort(); 382 old_dtb_port = oldTC->getDTBPtr()->getPort(); 383 new_itb_port = newTC->getITBPtr()->getPort(); 384 new_dtb_port = newTC->getDTBPtr()->getPort(); 385 386 // Move over any table walker ports if they exist 387 if (new_itb_port && !new_itb_port->isConnected()) { 388 assert(old_itb_port); 389 Port *peer = old_itb_port->getPeer();; 390 new_itb_port->setPeer(peer); 391 peer->setPeer(new_itb_port); 392 } 393 if (new_dtb_port && !new_dtb_port->isConnected()) { 394 assert(old_dtb_port); 395 Port *peer = old_dtb_port->getPeer();; 396 new_dtb_port->setPeer(peer); 397 peer->setPeer(new_dtb_port); 398 } 399 } 400 401#if FULL_SYSTEM 402 interrupts = oldCPU->interrupts; 403 interrupts->setCPU(this); 404 405 for (ThreadID i = 0; i < size; ++i) 406 threadContexts[i]->profileClear(); 407 408 if (profileEvent) 409 schedule(profileEvent, curTick()); 410#endif 411 412 // Connect new CPU to old CPU's memory only if new CPU isn't 413 // connected to anything. Also connect old CPU's memory to new 414 // CPU. 415 if (!ic->isConnected()) { 416 Port *peer = oldCPU->getPort("icache_port")->getPeer(); 417 ic->setPeer(peer); 418 peer->setPeer(ic); 419 } 420 421 if (!dc->isConnected()) { 422 Port *peer = oldCPU->getPort("dcache_port")->getPeer(); 423 dc->setPeer(peer); 424 peer->setPeer(dc); 425 } 426} 427 428 429#if FULL_SYSTEM 430BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, Tick _interval) 431 : cpu(_cpu), interval(_interval) 432{ } 433 434void 435BaseCPU::ProfileEvent::process() 436{ 437 ThreadID size = cpu->threadContexts.size(); 438 for (ThreadID i = 0; i < size; ++i) { 439 ThreadContext *tc = cpu->threadContexts[i]; 440 tc->profileSample(); 441 } 442 443 cpu->schedule(this, curTick() + interval); 444} 445 446void 447BaseCPU::serialize(std::ostream &os) 448{ 449 SERIALIZE_SCALAR(instCnt); 450 interrupts->serialize(os); 451} 452 453void 454BaseCPU::unserialize(Checkpoint *cp, const std::string §ion) 455{ 456 UNSERIALIZE_SCALAR(instCnt); 457 interrupts->unserialize(cp, section); 458} 459 460#endif // FULL_SYSTEM 461 462void 463BaseCPU::traceFunctionsInternal(Addr pc) 464{ 465 if (!debugSymbolTable) 466 return; 467 468 // if pc enters different function, print new function symbol and 469 // update saved range. Otherwise do nothing. 470 if (pc < currentFunctionStart || pc >= currentFunctionEnd) { 471 string sym_str; 472 bool found = debugSymbolTable->findNearestSymbol(pc, sym_str, 473 currentFunctionStart, 474 currentFunctionEnd); 475 476 if (!found) { 477 // no symbol found: use addr as label 478 sym_str = csprintf("0x%x", pc); 479 currentFunctionStart = pc; 480 currentFunctionEnd = pc + 1; 481 } 482 483 ccprintf(*functionTraceStream, " (%d)\n%d: %s", 484 curTick() - functionEntryTick, curTick(), sym_str); 485 functionEntryTick = curTick(); 486 } 487} 488