base.cc revision 5704:98224505352a
12650Ssaidi@eecs.umich.edu/* 22650Ssaidi@eecs.umich.edu * Copyright (c) 2002-2005 The Regents of The University of Michigan 32650Ssaidi@eecs.umich.edu * All rights reserved. 42650Ssaidi@eecs.umich.edu * 52650Ssaidi@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 62650Ssaidi@eecs.umich.edu * modification, are permitted provided that the following conditions are 72650Ssaidi@eecs.umich.edu * met: redistributions of source code must retain the above copyright 82650Ssaidi@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 92650Ssaidi@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 102650Ssaidi@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 112650Ssaidi@eecs.umich.edu * documentation and/or other materials provided with the distribution; 122650Ssaidi@eecs.umich.edu * neither the name of the copyright holders nor the names of its 132650Ssaidi@eecs.umich.edu * contributors may be used to endorse or promote products derived from 142650Ssaidi@eecs.umich.edu * this software without specific prior written permission. 152650Ssaidi@eecs.umich.edu * 162650Ssaidi@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172650Ssaidi@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182650Ssaidi@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192650Ssaidi@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202650Ssaidi@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212650Ssaidi@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222650Ssaidi@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232650Ssaidi@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242650Ssaidi@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252650Ssaidi@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262650Ssaidi@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Steve Reinhardt 292665Ssaidi@eecs.umich.edu * Nathan Binkert 302665Ssaidi@eecs.umich.edu */ 312650Ssaidi@eecs.umich.edu 322650Ssaidi@eecs.umich.edu#include <iostream> 332650Ssaidi@eecs.umich.edu#include <string> 342650Ssaidi@eecs.umich.edu#include <sstream> 353529Sgblack@eecs.umich.edu 362650Ssaidi@eecs.umich.edu#include "base/cprintf.hh" 372650Ssaidi@eecs.umich.edu#include "base/loader/symtab.hh" 382680Sktlim@umich.edu#include "base/misc.hh" 392650Ssaidi@eecs.umich.edu#include "base/output.hh" 402650Ssaidi@eecs.umich.edu#include "base/trace.hh" 412650Ssaidi@eecs.umich.edu#include "cpu/base.hh" 422650Ssaidi@eecs.umich.edu#include "cpu/cpuevent.hh" 433529Sgblack@eecs.umich.edu#include "cpu/thread_context.hh" 442650Ssaidi@eecs.umich.edu#include "cpu/profile.hh" 453529Sgblack@eecs.umich.edu#include "params/BaseCPU.hh" 463529Sgblack@eecs.umich.edu#include "sim/sim_exit.hh" 473529Sgblack@eecs.umich.edu#include "sim/process.hh" 483529Sgblack@eecs.umich.edu#include "sim/sim_events.hh" 493529Sgblack@eecs.umich.edu#include "sim/system.hh" 502650Ssaidi@eecs.umich.edu 512650Ssaidi@eecs.umich.edu// Hack 523529Sgblack@eecs.umich.edu#include "sim/stat_control.hh" 533529Sgblack@eecs.umich.edu 543529Sgblack@eecs.umich.eduusing namespace std; 552650Ssaidi@eecs.umich.edu 562650Ssaidi@eecs.umich.eduvector<BaseCPU *> BaseCPU::cpuList; 573529Sgblack@eecs.umich.edu 583529Sgblack@eecs.umich.edu// This variable reflects the max number of threads in any CPU. Be 593529Sgblack@eecs.umich.edu// careful to only use it once all the CPUs that you care about have 602650Ssaidi@eecs.umich.edu// been initialized 612650Ssaidi@eecs.umich.eduint maxThreadsPerCPU = 1; 622650Ssaidi@eecs.umich.edu 633529Sgblack@eecs.umich.eduCPUProgressEvent::CPUProgressEvent(BaseCPU *_cpu, Tick ival) 643529Sgblack@eecs.umich.edu : Event(Event::Progress_Event_Pri), interval(ival), lastNumInst(0), 653529Sgblack@eecs.umich.edu cpu(_cpu) 662650Ssaidi@eecs.umich.edu{ 673529Sgblack@eecs.umich.edu if (interval) 683529Sgblack@eecs.umich.edu cpu->schedule(this, curTick + interval); 693529Sgblack@eecs.umich.edu} 703529Sgblack@eecs.umich.edu 713529Sgblack@eecs.umich.eduvoid 723529Sgblack@eecs.umich.eduCPUProgressEvent::process() 733529Sgblack@eecs.umich.edu{ 743529Sgblack@eecs.umich.edu Counter temp = cpu->totalInstructions(); 753529Sgblack@eecs.umich.edu#ifndef NDEBUG 763529Sgblack@eecs.umich.edu double ipc = double(temp - lastNumInst) / (interval / cpu->ticks(1)); 773529Sgblack@eecs.umich.edu 782650Ssaidi@eecs.umich.edu DPRINTFN("%s progress event, instructions committed: %lli, IPC: %0.8d\n", 79 cpu->name(), temp - lastNumInst, ipc); 80 ipc = 0.0; 81#else 82 cprintf("%lli: %s progress event, instructions committed: %lli\n", 83 curTick, cpu->name(), temp - lastNumInst); 84#endif 85 lastNumInst = temp; 86 cpu->schedule(this, curTick + interval); 87} 88 89const char * 90CPUProgressEvent::description() const 91{ 92 return "CPU Progress"; 93} 94 95#if FULL_SYSTEM 96BaseCPU::BaseCPU(Params *p) 97 : MemObject(p), clock(p->clock), instCnt(0), interrupts(p->interrupts), 98 number_of_threads(p->numThreads), system(p->system), 99 phase(p->phase) 100#else 101BaseCPU::BaseCPU(Params *p) 102 : MemObject(p), clock(p->clock), 103 number_of_threads(p->numThreads), system(p->system), 104 phase(p->phase) 105#endif 106{ 107// currentTick = curTick; 108 109 // add self to global list of CPUs 110 cpuList.push_back(this); 111 112 if (number_of_threads > maxThreadsPerCPU) 113 maxThreadsPerCPU = number_of_threads; 114 115 // allocate per-thread instruction-based event queues 116 comInstEventQueue = new EventQueue *[number_of_threads]; 117 for (int i = 0; i < number_of_threads; ++i) 118 comInstEventQueue[i] = new EventQueue("instruction-based event queue"); 119 120 // 121 // set up instruction-count-based termination events, if any 122 // 123 if (p->max_insts_any_thread != 0) { 124 const char *cause = "a thread reached the max instruction count"; 125 for (int i = 0; i < number_of_threads; ++i) { 126 Event *event = new SimLoopExitEvent(cause, 0); 127 comInstEventQueue[i]->schedule(event, p->max_insts_any_thread); 128 } 129 } 130 131 if (p->max_insts_all_threads != 0) { 132 const char *cause = "all threads reached the max instruction count"; 133 134 // allocate & initialize shared downcounter: each event will 135 // decrement this when triggered; simulation will terminate 136 // when counter reaches 0 137 int *counter = new int; 138 *counter = number_of_threads; 139 for (int i = 0; i < number_of_threads; ++i) { 140 Event *event = new CountedExitEvent(cause, *counter); 141 comInstEventQueue[i]->schedule(event, p->max_insts_any_thread); 142 } 143 } 144 145 // allocate per-thread load-based event queues 146 comLoadEventQueue = new EventQueue *[number_of_threads]; 147 for (int i = 0; i < number_of_threads; ++i) 148 comLoadEventQueue[i] = new EventQueue("load-based event queue"); 149 150 // 151 // set up instruction-count-based termination events, if any 152 // 153 if (p->max_loads_any_thread != 0) { 154 const char *cause = "a thread reached the max load count"; 155 for (int i = 0; i < number_of_threads; ++i) { 156 Event *event = new SimLoopExitEvent(cause, 0); 157 comLoadEventQueue[i]->schedule(event, p->max_loads_any_thread); 158 } 159 } 160 161 if (p->max_loads_all_threads != 0) { 162 const char *cause = "all threads reached the max load count"; 163 // allocate & initialize shared downcounter: each event will 164 // decrement this when triggered; simulation will terminate 165 // when counter reaches 0 166 int *counter = new int; 167 *counter = number_of_threads; 168 for (int i = 0; i < number_of_threads; ++i) { 169 Event *event = new CountedExitEvent(cause, *counter); 170 comLoadEventQueue[i]->schedule(event, p->max_loads_all_threads); 171 } 172 } 173 174 functionTracingEnabled = false; 175 if (p->function_trace) { 176 functionTraceStream = simout.find(csprintf("ftrace.%s", name())); 177 currentFunctionStart = currentFunctionEnd = 0; 178 functionEntryTick = p->function_trace_start; 179 180 if (p->function_trace_start == 0) { 181 functionTracingEnabled = true; 182 } else { 183 typedef EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace> wrap; 184 Event *event = new wrap(this, true); 185 schedule(event, p->function_trace_start); 186 } 187 } 188#if FULL_SYSTEM 189 profileEvent = NULL; 190 if (params()->profile) 191 profileEvent = new ProfileEvent(this, params()->profile); 192#endif 193 tracer = params()->tracer; 194} 195 196void 197BaseCPU::enableFunctionTrace() 198{ 199 functionTracingEnabled = true; 200} 201 202BaseCPU::~BaseCPU() 203{ 204} 205 206void 207BaseCPU::init() 208{ 209 if (!params()->defer_registration) 210 registerThreadContexts(); 211} 212 213void 214BaseCPU::startup() 215{ 216#if FULL_SYSTEM 217 if (!params()->defer_registration && profileEvent) 218 schedule(profileEvent, curTick); 219#endif 220 221 if (params()->progress_interval) { 222 Tick num_ticks = ticks(params()->progress_interval); 223 Event *event = new CPUProgressEvent(this, num_ticks); 224 schedule(event, curTick + num_ticks); 225 } 226} 227 228 229void 230BaseCPU::regStats() 231{ 232 using namespace Stats; 233 234 numCycles 235 .name(name() + ".numCycles") 236 .desc("number of cpu cycles simulated") 237 ; 238 239 int size = threadContexts.size(); 240 if (size > 1) { 241 for (int i = 0; i < size; ++i) { 242 stringstream namestr; 243 ccprintf(namestr, "%s.ctx%d", name(), i); 244 threadContexts[i]->regStats(namestr.str()); 245 } 246 } else if (size == 1) 247 threadContexts[0]->regStats(name()); 248 249#if FULL_SYSTEM 250#endif 251} 252 253Tick 254BaseCPU::nextCycle() 255{ 256 Tick next_tick = curTick - phase + clock - 1; 257 next_tick -= (next_tick % clock); 258 next_tick += phase; 259 return next_tick; 260} 261 262Tick 263BaseCPU::nextCycle(Tick begin_tick) 264{ 265 Tick next_tick = begin_tick; 266 if (next_tick % clock != 0) 267 next_tick = next_tick - (next_tick % clock) + clock; 268 next_tick += phase; 269 270 assert(next_tick >= curTick); 271 return next_tick; 272} 273 274void 275BaseCPU::registerThreadContexts() 276{ 277 for (int i = 0; i < threadContexts.size(); ++i) { 278 ThreadContext *tc = threadContexts[i]; 279 280#if FULL_SYSTEM 281 int id = params()->cpu_id; 282 if (id != -1) 283 id += i; 284 285 tc->setCpuId(system->registerThreadContext(tc, id)); 286#else 287 tc->setCpuId(tc->getProcessPtr()->registerThreadContext(tc)); 288#endif 289 } 290} 291 292 293int 294BaseCPU::findContext(ThreadContext *tc) 295{ 296 for (int i = 0; i < threadContexts.size(); ++i) { 297 if (tc == threadContexts[i]) 298 return i; 299 } 300 return 0; 301} 302 303void 304BaseCPU::switchOut() 305{ 306// panic("This CPU doesn't support sampling!"); 307#if FULL_SYSTEM 308 if (profileEvent && profileEvent->scheduled()) 309 deschedule(profileEvent); 310#endif 311} 312 313void 314BaseCPU::takeOverFrom(BaseCPU *oldCPU, Port *ic, Port *dc) 315{ 316 assert(threadContexts.size() == oldCPU->threadContexts.size()); 317 318 for (int i = 0; i < threadContexts.size(); ++i) { 319 ThreadContext *newTC = threadContexts[i]; 320 ThreadContext *oldTC = oldCPU->threadContexts[i]; 321 322 newTC->takeOverFrom(oldTC); 323 324 CpuEvent::replaceThreadContext(oldTC, newTC); 325 326 assert(newTC->readCpuId() == oldTC->readCpuId()); 327#if FULL_SYSTEM 328 system->replaceThreadContext(newTC, newTC->readCpuId()); 329#else 330 assert(newTC->getProcessPtr() == oldTC->getProcessPtr()); 331 newTC->getProcessPtr()->replaceThreadContext(newTC, newTC->readCpuId()); 332#endif 333 334 if (DTRACE(Context)) 335 ThreadContext::compare(oldTC, newTC); 336 } 337 338#if FULL_SYSTEM 339 interrupts = oldCPU->interrupts; 340 341 for (int i = 0; i < threadContexts.size(); ++i) 342 threadContexts[i]->profileClear(); 343 344 if (profileEvent) 345 schedule(profileEvent, curTick); 346#endif 347 348 // Connect new CPU to old CPU's memory only if new CPU isn't 349 // connected to anything. Also connect old CPU's memory to new 350 // CPU. 351 if (!ic->isConnected()) { 352 Port *peer = oldCPU->getPort("icache_port")->getPeer(); 353 ic->setPeer(peer); 354 peer->setPeer(ic); 355 } 356 357 if (!dc->isConnected()) { 358 Port *peer = oldCPU->getPort("dcache_port")->getPeer(); 359 dc->setPeer(peer); 360 peer->setPeer(dc); 361 } 362} 363 364 365#if FULL_SYSTEM 366BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, Tick _interval) 367 : cpu(_cpu), interval(_interval) 368{ } 369 370void 371BaseCPU::ProfileEvent::process() 372{ 373 for (int i = 0, size = cpu->threadContexts.size(); i < size; ++i) { 374 ThreadContext *tc = cpu->threadContexts[i]; 375 tc->profileSample(); 376 } 377 378 cpu->schedule(this, curTick + interval); 379} 380 381void 382BaseCPU::postInterrupt(int int_num, int index) 383{ 384 interrupts->post(int_num, index); 385} 386 387void 388BaseCPU::clearInterrupt(int int_num, int index) 389{ 390 interrupts->clear(int_num, index); 391} 392 393void 394BaseCPU::clearInterrupts() 395{ 396 interrupts->clearAll(); 397} 398 399void 400BaseCPU::serialize(std::ostream &os) 401{ 402 SERIALIZE_SCALAR(instCnt); 403 interrupts->serialize(os); 404} 405 406void 407BaseCPU::unserialize(Checkpoint *cp, const std::string §ion) 408{ 409 UNSERIALIZE_SCALAR(instCnt); 410 interrupts->unserialize(cp, section); 411} 412 413#endif // FULL_SYSTEM 414 415void 416BaseCPU::traceFunctionsInternal(Addr pc) 417{ 418 if (!debugSymbolTable) 419 return; 420 421 // if pc enters different function, print new function symbol and 422 // update saved range. Otherwise do nothing. 423 if (pc < currentFunctionStart || pc >= currentFunctionEnd) { 424 string sym_str; 425 bool found = debugSymbolTable->findNearestSymbol(pc, sym_str, 426 currentFunctionStart, 427 currentFunctionEnd); 428 429 if (!found) { 430 // no symbol found: use addr as label 431 sym_str = csprintf("0x%x", pc); 432 currentFunctionStart = pc; 433 currentFunctionEnd = pc + 1; 434 } 435 436 ccprintf(*functionTraceStream, " (%d)\n%d: %s", 437 curTick - functionEntryTick, curTick, sym_str); 438 functionEntryTick = curTick; 439 } 440} 441