base.cc revision 4873:b135f6e6adfe 
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 *          Nathan Binkert
30 */
31
32#include <iostream>
33#include <string>
34#include <sstream>
35
36#include "base/cprintf.hh"
37#include "base/loader/symtab.hh"
38#include "base/misc.hh"
39#include "base/output.hh"
40#include "cpu/base.hh"
41#include "cpu/cpuevent.hh"
42#include "cpu/thread_context.hh"
43#include "cpu/profile.hh"
44#include "sim/sim_exit.hh"
45#include "sim/param.hh"
46#include "sim/process.hh"
47#include "sim/sim_events.hh"
48#include "sim/system.hh"
49
50#include "base/trace.hh"
51
52// Hack
53#include "sim/stat_control.hh"
54
55using namespace std;
56
57vector<BaseCPU *> BaseCPU::cpuList;
58
59// This variable reflects the max number of threads in any CPU.  Be
60// careful to only use it once all the CPUs that you care about have
61// been initialized
62int maxThreadsPerCPU = 1;
63
64CPUProgressEvent::CPUProgressEvent(EventQueue *q, Tick ival,
65                                   BaseCPU *_cpu)
66    : Event(q, Event::Progress_Event_Pri), interval(ival),
67      lastNumInst(0), cpu(_cpu)
68{
69    if (interval)
70        schedule(curTick + interval);
71}
72
73void
74CPUProgressEvent::process()
75{
76    Counter temp = cpu->totalInstructions();
77#ifndef NDEBUG
78    double ipc = double(temp - lastNumInst) / (interval / cpu->cycles(1));
79
80    DPRINTFN("%s progress event, instructions committed: %lli, IPC: %0.8d\n",
81             cpu->name(), temp - lastNumInst, ipc);
82    ipc = 0.0;
83#else
84    cprintf("%lli: %s progress event, instructions committed: %lli\n",
85            curTick, cpu->name(), temp - lastNumInst);
86#endif
87    lastNumInst = temp;
88    schedule(curTick + interval);
89}
90
91const char *
92CPUProgressEvent::description()
93{
94    return "CPU Progress";
95}
96
97#if FULL_SYSTEM
98BaseCPU::BaseCPU(Params *p)
99    : MemObject(p->name), clock(p->clock), instCnt(0),
100      params(p), number_of_threads(p->numberOfThreads), system(p->system),
101      phase(p->phase)
102#else
103BaseCPU::BaseCPU(Params *p)
104    : MemObject(p->name), clock(p->clock), params(p),
105      number_of_threads(p->numberOfThreads), system(p->system),
106      phase(p->phase)
107#endif
108{
109//    currentTick = curTick;
110    DPRINTF(FullCPU, "BaseCPU: Creating object, mem address %#x.\n", this);
111
112    // add self to global list of CPUs
113    cpuList.push_back(this);
114
115    DPRINTF(FullCPU, "BaseCPU: CPU added to cpuList, mem address %#x.\n",
116            this);
117
118    if (number_of_threads > maxThreadsPerCPU)
119        maxThreadsPerCPU = number_of_threads;
120
121    // allocate per-thread instruction-based event queues
122    comInstEventQueue = new EventQueue *[number_of_threads];
123    for (int i = 0; i < number_of_threads; ++i)
124        comInstEventQueue[i] = new EventQueue("instruction-based event queue");
125
126    //
127    // set up instruction-count-based termination events, if any
128    //
129    if (p->max_insts_any_thread != 0)
130        for (int i = 0; i < number_of_threads; ++i)
131            schedExitSimLoop("a thread reached the max instruction count",
132                             p->max_insts_any_thread, 0,
133                             comInstEventQueue[i]);
134
135    if (p->max_insts_all_threads != 0) {
136        // allocate & initialize shared downcounter: each event will
137        // decrement this when triggered; simulation will terminate
138        // when counter reaches 0
139        int *counter = new int;
140        *counter = number_of_threads;
141        for (int i = 0; i < number_of_threads; ++i)
142            new CountedExitEvent(comInstEventQueue[i],
143                "all threads reached the max instruction count",
144                p->max_insts_all_threads, *counter);
145    }
146
147    // allocate per-thread load-based event queues
148    comLoadEventQueue = new EventQueue *[number_of_threads];
149    for (int i = 0; i < number_of_threads; ++i)
150        comLoadEventQueue[i] = new EventQueue("load-based event queue");
151
152    //
153    // set up instruction-count-based termination events, if any
154    //
155    if (p->max_loads_any_thread != 0)
156        for (int i = 0; i < number_of_threads; ++i)
157            schedExitSimLoop("a thread reached the max load count",
158                             p->max_loads_any_thread, 0,
159                             comLoadEventQueue[i]);
160
161    if (p->max_loads_all_threads != 0) {
162        // allocate & initialize shared downcounter: each event will
163        // decrement this when triggered; simulation will terminate
164        // when counter reaches 0
165        int *counter = new int;
166        *counter = number_of_threads;
167        for (int i = 0; i < number_of_threads; ++i)
168            new CountedExitEvent(comLoadEventQueue[i],
169                "all threads reached the max load count",
170                p->max_loads_all_threads, *counter);
171    }
172
173    functionTracingEnabled = false;
174    if (p->functionTrace) {
175        functionTraceStream = simout.find(csprintf("ftrace.%s", name()));
176        currentFunctionStart = currentFunctionEnd = 0;
177        functionEntryTick = p->functionTraceStart;
178
179        if (p->functionTraceStart == 0) {
180            functionTracingEnabled = true;
181        } else {
182            new EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace>(this,
183                                                                     p->functionTraceStart,
184                                                                     true);
185        }
186    }
187#if FULL_SYSTEM
188    profileEvent = NULL;
189    if (params->profile)
190        profileEvent = new ProfileEvent(this, params->profile);
191#endif
192}
193
194BaseCPU::Params::Params()
195{
196#if FULL_SYSTEM
197    profile = false;
198#endif
199    checker = NULL;
200}
201
202void
203BaseCPU::enableFunctionTrace()
204{
205    functionTracingEnabled = true;
206}
207
208BaseCPU::~BaseCPU()
209{
210}
211
212void
213BaseCPU::init()
214{
215    if (!params->deferRegistration)
216        registerThreadContexts();
217}
218
219void
220BaseCPU::startup()
221{
222#if FULL_SYSTEM
223    if (!params->deferRegistration && profileEvent)
224        profileEvent->schedule(curTick);
225#endif
226
227    if (params->progress_interval) {
228        new CPUProgressEvent(&mainEventQueue,
229                             cycles(params->progress_interval),
230                             this);
231    }
232}
233
234
235void
236BaseCPU::regStats()
237{
238    using namespace Stats;
239
240    numCycles
241        .name(name() + ".numCycles")
242        .desc("number of cpu cycles simulated")
243        ;
244
245    int size = threadContexts.size();
246    if (size > 1) {
247        for (int i = 0; i < size; ++i) {
248            stringstream namestr;
249            ccprintf(namestr, "%s.ctx%d", name(), i);
250            threadContexts[i]->regStats(namestr.str());
251        }
252    } else if (size == 1)
253        threadContexts[0]->regStats(name());
254
255#if FULL_SYSTEM
256#endif
257}
258
259Tick
260BaseCPU::nextCycle()
261{
262    Tick next_tick = curTick - phase + clock - 1;
263    next_tick -= (next_tick % clock);
264    next_tick += phase;
265    return next_tick;
266}
267
268Tick
269BaseCPU::nextCycle(Tick begin_tick)
270{
271    Tick next_tick = begin_tick;
272    if (next_tick % clock != 0)
273        next_tick = next_tick - (next_tick % clock) + clock;
274    next_tick += phase;
275
276    assert(next_tick >= curTick);
277    return next_tick;
278}
279
280void
281BaseCPU::registerThreadContexts()
282{
283    for (int i = 0; i < threadContexts.size(); ++i) {
284        ThreadContext *tc = threadContexts[i];
285
286#if FULL_SYSTEM
287        int id = params->cpu_id;
288        if (id != -1)
289            id += i;
290
291        tc->setCpuId(system->registerThreadContext(tc, id));
292#else
293        tc->setCpuId(tc->getProcessPtr()->registerThreadContext(tc));
294#endif
295    }
296}
297
298
299int
300BaseCPU::findContext(ThreadContext *tc)
301{
302    for (int i = 0; i < threadContexts.size(); ++i) {
303        if (tc == threadContexts[i])
304            return i;
305    }
306    return 0;
307}
308
309void
310BaseCPU::switchOut()
311{
312//    panic("This CPU doesn't support sampling!");
313#if FULL_SYSTEM
314    if (profileEvent && profileEvent->scheduled())
315        profileEvent->deschedule();
316#endif
317}
318
319void
320BaseCPU::takeOverFrom(BaseCPU *oldCPU, Port *ic, Port *dc)
321{
322    assert(threadContexts.size() == oldCPU->threadContexts.size());
323
324    for (int i = 0; i < threadContexts.size(); ++i) {
325        ThreadContext *newTC = threadContexts[i];
326        ThreadContext *oldTC = oldCPU->threadContexts[i];
327
328        newTC->takeOverFrom(oldTC);
329
330        CpuEvent::replaceThreadContext(oldTC, newTC);
331
332        assert(newTC->readCpuId() == oldTC->readCpuId());
333#if FULL_SYSTEM
334        system->replaceThreadContext(newTC, newTC->readCpuId());
335#else
336        assert(newTC->getProcessPtr() == oldTC->getProcessPtr());
337        newTC->getProcessPtr()->replaceThreadContext(newTC, newTC->readCpuId());
338#endif
339
340//    TheISA::compareXCs(oldXC, newXC);
341    }
342
343#if FULL_SYSTEM
344    interrupts = oldCPU->interrupts;
345
346    for (int i = 0; i < threadContexts.size(); ++i)
347        threadContexts[i]->profileClear();
348
349    // The Sampler must take care of this!
350//    if (profileEvent)
351//        profileEvent->schedule(curTick);
352#endif
353
354    // Connect new CPU to old CPU's memory only if new CPU isn't
355    // connected to anything.  Also connect old CPU's memory to new
356    // CPU.
357    Port *peer;
358    if (ic->getPeer() == NULL) {
359        peer = oldCPU->getPort("icache_port")->getPeer();
360        ic->setPeer(peer);
361    } else {
362        peer = ic->getPeer();
363    }
364    peer->setPeer(ic);
365
366    if (dc->getPeer() == NULL) {
367        peer = oldCPU->getPort("dcache_port")->getPeer();
368        dc->setPeer(peer);
369    } else {
370        peer = dc->getPeer();
371    }
372    peer->setPeer(dc);
373}
374
375
376#if FULL_SYSTEM
377BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, int _interval)
378    : Event(&mainEventQueue), cpu(_cpu), interval(_interval)
379{ }
380
381void
382BaseCPU::ProfileEvent::process()
383{
384    for (int i = 0, size = cpu->threadContexts.size(); i < size; ++i) {
385        ThreadContext *tc = cpu->threadContexts[i];
386        tc->profileSample();
387    }
388
389    schedule(curTick + interval);
390}
391
392void
393BaseCPU::post_interrupt(int int_num, int index)
394{
395    interrupts.post(int_num, index);
396}
397
398void
399BaseCPU::clear_interrupt(int int_num, int index)
400{
401    interrupts.clear(int_num, index);
402}
403
404void
405BaseCPU::clear_interrupts()
406{
407    interrupts.clear_all();
408}
409
410uint64_t
411BaseCPU::get_interrupts(int int_num)
412{
413    return interrupts.get_vec(int_num);
414}
415
416void
417BaseCPU::serialize(std::ostream &os)
418{
419    SERIALIZE_SCALAR(instCnt);
420    interrupts.serialize(os);
421}
422
423void
424BaseCPU::unserialize(Checkpoint *cp, const std::string &section)
425{
426    UNSERIALIZE_SCALAR(instCnt);
427    interrupts.unserialize(cp, section);
428}
429
430#endif // FULL_SYSTEM
431
432void
433BaseCPU::traceFunctionsInternal(Addr pc)
434{
435    if (!debugSymbolTable)
436        return;
437
438    // if pc enters different function, print new function symbol and
439    // update saved range.  Otherwise do nothing.
440    if (pc < currentFunctionStart || pc >= currentFunctionEnd) {
441        string sym_str;
442        bool found = debugSymbolTable->findNearestSymbol(pc, sym_str,
443                                                         currentFunctionStart,
444                                                         currentFunctionEnd);
445
446        if (!found) {
447            // no symbol found: use addr as label
448            sym_str = csprintf("0x%x", pc);
449            currentFunctionStart = pc;
450            currentFunctionEnd = pc + 1;
451        }
452
453        ccprintf(*functionTraceStream, " (%d)\n%d: %s",
454                 curTick - functionEntryTick, curTick, sym_str);
455        functionEntryTick = curTick;
456    }
457}
458
459
460DEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU)
461