base.cc revision 2669:f2b336e89d2a 
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <iostream>
30#include <string>
31#include <sstream>
32
33#include "base/cprintf.hh"
34#include "base/loader/symtab.hh"
35#include "base/misc.hh"
36#include "base/output.hh"
37#include "cpu/base.hh"
38#include "cpu/cpuevent.hh"
39#include "cpu/exec_context.hh"
40#include "cpu/profile.hh"
41#include "cpu/sampler/sampler.hh"
42#include "sim/param.hh"
43#include "sim/process.hh"
44#include "sim/sim_events.hh"
45#include "sim/system.hh"
46
47#include "base/trace.hh"
48
49using namespace std;
50
51vector<BaseCPU *> BaseCPU::cpuList;
52
53// This variable reflects the max number of threads in any CPU.  Be
54// careful to only use it once all the CPUs that you care about have
55// been initialized
56int maxThreadsPerCPU = 1;
57
58#if FULL_SYSTEM
59BaseCPU::BaseCPU(Params *p)
60    : SimObject(p->name), clock(p->clock), checkInterrupts(true),
61      params(p), number_of_threads(p->numberOfThreads), system(p->system)
62#else
63BaseCPU::BaseCPU(Params *p)
64    : SimObject(p->name), clock(p->clock), params(p),
65      number_of_threads(p->numberOfThreads), system(p->system)
66#endif
67{
68    DPRINTF(FullCPU, "BaseCPU: Creating object, mem address %#x.\n", this);
69
70    // add self to global list of CPUs
71    cpuList.push_back(this);
72
73    DPRINTF(FullCPU, "BaseCPU: CPU added to cpuList, mem address %#x.\n",
74            this);
75
76    if (number_of_threads > maxThreadsPerCPU)
77        maxThreadsPerCPU = number_of_threads;
78
79    // allocate per-thread instruction-based event queues
80    comInstEventQueue = new EventQueue *[number_of_threads];
81    for (int i = 0; i < number_of_threads; ++i)
82        comInstEventQueue[i] = new EventQueue("instruction-based event queue");
83
84    //
85    // set up instruction-count-based termination events, if any
86    //
87    if (p->max_insts_any_thread != 0)
88        for (int i = 0; i < number_of_threads; ++i)
89            new SimExitEvent(comInstEventQueue[i], p->max_insts_any_thread,
90                "a thread reached the max instruction count");
91
92    if (p->max_insts_all_threads != 0) {
93        // allocate & initialize shared downcounter: each event will
94        // decrement this when triggered; simulation will terminate
95        // when counter reaches 0
96        int *counter = new int;
97        *counter = number_of_threads;
98        for (int i = 0; i < number_of_threads; ++i)
99            new CountedExitEvent(comInstEventQueue[i],
100                "all threads reached the max instruction count",
101                p->max_insts_all_threads, *counter);
102    }
103
104    // allocate per-thread load-based event queues
105    comLoadEventQueue = new EventQueue *[number_of_threads];
106    for (int i = 0; i < number_of_threads; ++i)
107        comLoadEventQueue[i] = new EventQueue("load-based event queue");
108
109    //
110    // set up instruction-count-based termination events, if any
111    //
112    if (p->max_loads_any_thread != 0)
113        for (int i = 0; i < number_of_threads; ++i)
114            new SimExitEvent(comLoadEventQueue[i], p->max_loads_any_thread,
115                "a thread reached the max load count");
116
117    if (p->max_loads_all_threads != 0) {
118        // allocate & initialize shared downcounter: each event will
119        // decrement this when triggered; simulation will terminate
120        // when counter reaches 0
121        int *counter = new int;
122        *counter = number_of_threads;
123        for (int i = 0; i < number_of_threads; ++i)
124            new CountedExitEvent(comLoadEventQueue[i],
125                "all threads reached the max load count",
126                p->max_loads_all_threads, *counter);
127    }
128
129#if FULL_SYSTEM
130    memset(interrupts, 0, sizeof(interrupts));
131    intstatus = 0;
132#endif
133
134    functionTracingEnabled = false;
135    if (p->functionTrace) {
136        functionTraceStream = simout.find(csprintf("ftrace.%s", name()));
137        currentFunctionStart = currentFunctionEnd = 0;
138        functionEntryTick = p->functionTraceStart;
139
140        if (p->functionTraceStart == 0) {
141            functionTracingEnabled = true;
142        } else {
143            Event *e =
144                new EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace>(this,
145                                                                         true);
146            e->schedule(p->functionTraceStart);
147        }
148    }
149#if FULL_SYSTEM
150    profileEvent = NULL;
151    if (params->profile)
152        profileEvent = new ProfileEvent(this, params->profile);
153#endif
154
155}
156
157BaseCPU::Params::Params()
158{
159#if FULL_SYSTEM
160    profile = false;
161#endif
162    checker = NULL;
163}
164
165void
166BaseCPU::enableFunctionTrace()
167{
168    functionTracingEnabled = true;
169}
170
171BaseCPU::~BaseCPU()
172{
173}
174
175void
176BaseCPU::init()
177{
178    if (!params->deferRegistration)
179        registerExecContexts();
180}
181
182void
183BaseCPU::startup()
184{
185#if FULL_SYSTEM
186    if (!params->deferRegistration && profileEvent)
187        profileEvent->schedule(curTick);
188#endif
189}
190
191
192void
193BaseCPU::regStats()
194{
195    using namespace Stats;
196
197    numCycles
198        .name(name() + ".numCycles")
199        .desc("number of cpu cycles simulated")
200        ;
201
202    int size = execContexts.size();
203    if (size > 1) {
204        for (int i = 0; i < size; ++i) {
205            stringstream namestr;
206            ccprintf(namestr, "%s.ctx%d", name(), i);
207            execContexts[i]->regStats(namestr.str());
208        }
209    } else if (size == 1)
210        execContexts[0]->regStats(name());
211
212#if FULL_SYSTEM
213#endif
214}
215
216
217void
218BaseCPU::registerExecContexts()
219{
220    for (int i = 0; i < execContexts.size(); ++i) {
221        ExecContext *xc = execContexts[i];
222
223#if FULL_SYSTEM
224        int id = params->cpu_id;
225        if (id != -1)
226            id += i;
227
228        xc->setCpuId(system->registerExecContext(xc, id));
229#else
230        xc->setCpuId(xc->getProcessPtr()->registerExecContext(xc));
231#endif
232    }
233}
234
235
236void
237BaseCPU::switchOut(Sampler *sampler)
238{
239    panic("This CPU doesn't support sampling!");
240}
241
242void
243BaseCPU::takeOverFrom(BaseCPU *oldCPU)
244{
245    assert(execContexts.size() == oldCPU->execContexts.size());
246
247    for (int i = 0; i < execContexts.size(); ++i) {
248        ExecContext *newXC = execContexts[i];
249        ExecContext *oldXC = oldCPU->execContexts[i];
250
251        newXC->takeOverFrom(oldXC);
252
253        CpuEvent::replaceExecContext(oldXC, newXC);
254
255        assert(newXC->readCpuId() == oldXC->readCpuId());
256#if FULL_SYSTEM
257        system->replaceExecContext(newXC, newXC->readCpuId());
258#else
259        assert(newXC->getProcessPtr() == oldXC->getProcessPtr());
260        newXC->getProcessPtr()->replaceExecContext(newXC, newXC->readCpuId());
261#endif
262    }
263
264#if FULL_SYSTEM
265    for (int i = 0; i < TheISA::NumInterruptLevels; ++i)
266        interrupts[i] = oldCPU->interrupts[i];
267    intstatus = oldCPU->intstatus;
268
269    for (int i = 0; i < execContexts.size(); ++i)
270        execContexts[i]->profileClear();
271
272    if (profileEvent)
273        profileEvent->schedule(curTick);
274#endif
275}
276
277
278#if FULL_SYSTEM
279BaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, int _interval)
280    : Event(&mainEventQueue), cpu(_cpu), interval(_interval)
281{ }
282
283void
284BaseCPU::ProfileEvent::process()
285{
286    for (int i = 0, size = cpu->execContexts.size(); i < size; ++i) {
287        ExecContext *xc = cpu->execContexts[i];
288        xc->profileSample();
289    }
290
291    schedule(curTick + interval);
292}
293
294void
295BaseCPU::post_interrupt(int int_num, int index)
296{
297    DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
298
299    if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
300        panic("int_num out of bounds\n");
301
302    if (index < 0 || index >= sizeof(uint64_t) * 8)
303        panic("int_num out of bounds\n");
304
305    checkInterrupts = true;
306    interrupts[int_num] |= 1 << index;
307    intstatus |= (ULL(1) << int_num);
308}
309
310void
311BaseCPU::clear_interrupt(int int_num, int index)
312{
313    DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
314
315    if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
316        panic("int_num out of bounds\n");
317
318    if (index < 0 || index >= sizeof(uint64_t) * 8)
319        panic("int_num out of bounds\n");
320
321    interrupts[int_num] &= ~(1 << index);
322    if (interrupts[int_num] == 0)
323        intstatus &= ~(ULL(1) << int_num);
324}
325
326void
327BaseCPU::clear_interrupts()
328{
329    DPRINTF(Interrupt, "Interrupts all cleared\n");
330
331    memset(interrupts, 0, sizeof(interrupts));
332    intstatus = 0;
333}
334
335
336void
337BaseCPU::serialize(std::ostream &os)
338{
339    SERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels);
340    SERIALIZE_SCALAR(intstatus);
341}
342
343void
344BaseCPU::unserialize(Checkpoint *cp, const std::string &section)
345{
346    UNSERIALIZE_ARRAY(interrupts, TheISA::NumInterruptLevels);
347    UNSERIALIZE_SCALAR(intstatus);
348}
349
350#endif // FULL_SYSTEM
351
352void
353BaseCPU::traceFunctionsInternal(Addr pc)
354{
355    if (!debugSymbolTable)
356        return;
357
358    // if pc enters different function, print new function symbol and
359    // update saved range.  Otherwise do nothing.
360    if (pc < currentFunctionStart || pc >= currentFunctionEnd) {
361        string sym_str;
362        bool found = debugSymbolTable->findNearestSymbol(pc, sym_str,
363                                                         currentFunctionStart,
364                                                         currentFunctionEnd);
365
366        if (!found) {
367            // no symbol found: use addr as label
368            sym_str = csprintf("0x%x", pc);
369            currentFunctionStart = pc;
370            currentFunctionEnd = pc + 1;
371        }
372
373        ccprintf(*functionTraceStream, " (%d)\n%d: %s",
374                 curTick - functionEntryTick, curTick, sym_str);
375        functionEntryTick = curTick;
376    }
377}
378
379
380DEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU)
381