base.cc revision 8745
12SN/A/* 21762SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan 37897Shestness@cs.utexas.edu * Copyright (c) 2011 Regents of the University of California 42SN/A * All rights reserved. 52SN/A * 62SN/A * Redistribution and use in source and binary forms, with or without 72SN/A * modification, are permitted provided that the following conditions are 82SN/A * met: redistributions of source code must retain the above copyright 92SN/A * notice, this list of conditions and the following disclaimer; 102SN/A * redistributions in binary form must reproduce the above copyright 112SN/A * notice, this list of conditions and the following disclaimer in the 122SN/A * documentation and/or other materials provided with the distribution; 132SN/A * neither the name of the copyright holders nor the names of its 142SN/A * contributors may be used to endorse or promote products derived from 152SN/A * this software without specific prior written permission. 162SN/A * 172SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 182SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 192SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 202SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 212SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 222SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 232SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 242SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 252SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 262SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 272SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282665Ssaidi@eecs.umich.edu * 292665Ssaidi@eecs.umich.edu * Authors: Steve Reinhardt 302665Ssaidi@eecs.umich.edu * Nathan Binkert 317897Shestness@cs.utexas.edu * Rick Strong 322SN/A */ 332SN/A 341388SN/A#include <iostream> 358229Snate@binkert.org#include <sstream> 362SN/A#include <string> 372SN/A 387781SAli.Saidi@ARM.com#include "arch/tlb.hh" 398229Snate@binkert.org#include "base/loader/symtab.hh" 401191SN/A#include "base/cprintf.hh" 411191SN/A#include "base/misc.hh" 421388SN/A#include "base/output.hh" 435529Snate@binkert.org#include "base/trace.hh" 441717SN/A#include "cpu/base.hh" 452651Ssaidi@eecs.umich.edu#include "cpu/cpuevent.hh" 468229Snate@binkert.org#include "cpu/profile.hh" 472680Sktlim@umich.edu#include "cpu/thread_context.hh" 488232Snate@binkert.org#include "debug/SyscallVerbose.hh" 495529Snate@binkert.org#include "params/BaseCPU.hh" 502190SN/A#include "sim/process.hh" 5156SN/A#include "sim/sim_events.hh" 528229Snate@binkert.org#include "sim/sim_exit.hh" 532190SN/A#include "sim/system.hh" 542SN/A 552359SN/A// Hack 562359SN/A#include "sim/stat_control.hh" 572359SN/A 582SN/Ausing namespace std; 592SN/A 602SN/Avector<BaseCPU *> BaseCPU::cpuList; 612SN/A 622SN/A// This variable reflects the max number of threads in any CPU. Be 632SN/A// careful to only use it once all the CPUs that you care about have 642SN/A// been initialized 652SN/Aint maxThreadsPerCPU = 1; 662SN/A 675606Snate@binkert.orgCPUProgressEvent::CPUProgressEvent(BaseCPU *_cpu, Tick ival) 686144Sksewell@umich.edu : Event(Event::Progress_Event_Pri), _interval(ival), lastNumInst(0), 696144Sksewell@umich.edu cpu(_cpu), _repeatEvent(true) 703126Sktlim@umich.edu{ 716144Sksewell@umich.edu if (_interval) 727823Ssteve.reinhardt@amd.com cpu->schedule(this, curTick() + _interval); 733126Sktlim@umich.edu} 743126Sktlim@umich.edu 752356SN/Avoid 762356SN/ACPUProgressEvent::process() 772356SN/A{ 782367SN/A Counter temp = cpu->totalInstructions(); 792356SN/A#ifndef NDEBUG 806144Sksewell@umich.edu double ipc = double(temp - lastNumInst) / (_interval / cpu->ticks(1)); 812367SN/A 826144Sksewell@umich.edu DPRINTFN("%s progress event, total committed:%i, progress insts committed: " 836144Sksewell@umich.edu "%lli, IPC: %0.8d\n", cpu->name(), temp, temp - lastNumInst, 846144Sksewell@umich.edu ipc); 852356SN/A ipc = 0.0; 862367SN/A#else 876144Sksewell@umich.edu cprintf("%lli: %s progress event, total committed:%i, progress insts " 887823Ssteve.reinhardt@amd.com "committed: %lli\n", curTick(), cpu->name(), temp, 896144Sksewell@umich.edu temp - lastNumInst); 902367SN/A#endif 912356SN/A lastNumInst = temp; 926144Sksewell@umich.edu 936144Sksewell@umich.edu if (_repeatEvent) 947823Ssteve.reinhardt@amd.com cpu->schedule(this, curTick() + _interval); 952356SN/A} 962356SN/A 972356SN/Aconst char * 985336Shines@cs.fsu.eduCPUProgressEvent::description() const 992356SN/A{ 1004873Sstever@eecs.umich.edu return "CPU Progress"; 1012356SN/A} 1022356SN/A 1031400SN/ABaseCPU::BaseCPU(Params *p) 1045712Shsul@eecs.umich.edu : MemObject(p), clock(p->clock), instCnt(0), _cpuId(p->cpu_id), 1055712Shsul@eecs.umich.edu interrupts(p->interrupts), 1066221Snate@binkert.org numThreads(p->numThreads), system(p->system), 1073661Srdreslin@umich.edu phase(p->phase) 1082SN/A{ 1097823Ssteve.reinhardt@amd.com// currentTick = curTick(); 1101062SN/A 1115712Shsul@eecs.umich.edu // if Python did not provide a valid ID, do it here 1125712Shsul@eecs.umich.edu if (_cpuId == -1 ) { 1135712Shsul@eecs.umich.edu _cpuId = cpuList.size(); 1145712Shsul@eecs.umich.edu } 1155712Shsul@eecs.umich.edu 1162SN/A // add self to global list of CPUs 1172SN/A cpuList.push_back(this); 1182SN/A 1195712Shsul@eecs.umich.edu DPRINTF(SyscallVerbose, "Constructing CPU with id %d\n", _cpuId); 1205712Shsul@eecs.umich.edu 1216221Snate@binkert.org if (numThreads > maxThreadsPerCPU) 1226221Snate@binkert.org maxThreadsPerCPU = numThreads; 1232SN/A 1242SN/A // allocate per-thread instruction-based event queues 1256221Snate@binkert.org comInstEventQueue = new EventQueue *[numThreads]; 1266221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; ++tid) 1276221Snate@binkert.org comInstEventQueue[tid] = 1286221Snate@binkert.org new EventQueue("instruction-based event queue"); 1292SN/A 1302SN/A // 1312SN/A // set up instruction-count-based termination events, if any 1322SN/A // 1335606Snate@binkert.org if (p->max_insts_any_thread != 0) { 1345606Snate@binkert.org const char *cause = "a thread reached the max instruction count"; 1356221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; ++tid) { 1365606Snate@binkert.org Event *event = new SimLoopExitEvent(cause, 0); 1376221Snate@binkert.org comInstEventQueue[tid]->schedule(event, p->max_insts_any_thread); 1385606Snate@binkert.org } 1395606Snate@binkert.org } 1402SN/A 1411400SN/A if (p->max_insts_all_threads != 0) { 1425606Snate@binkert.org const char *cause = "all threads reached the max instruction count"; 1435606Snate@binkert.org 1442SN/A // allocate & initialize shared downcounter: each event will 1452SN/A // decrement this when triggered; simulation will terminate 1462SN/A // when counter reaches 0 1472SN/A int *counter = new int; 1486221Snate@binkert.org *counter = numThreads; 1496221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; ++tid) { 1505606Snate@binkert.org Event *event = new CountedExitEvent(cause, *counter); 1516670Shsul@eecs.umich.edu comInstEventQueue[tid]->schedule(event, p->max_insts_all_threads); 1525606Snate@binkert.org } 1532SN/A } 1542SN/A 155124SN/A // allocate per-thread load-based event queues 1566221Snate@binkert.org comLoadEventQueue = new EventQueue *[numThreads]; 1576221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; ++tid) 1586221Snate@binkert.org comLoadEventQueue[tid] = new EventQueue("load-based event queue"); 159124SN/A 160124SN/A // 161124SN/A // set up instruction-count-based termination events, if any 162124SN/A // 1635606Snate@binkert.org if (p->max_loads_any_thread != 0) { 1645606Snate@binkert.org const char *cause = "a thread reached the max load count"; 1656221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; ++tid) { 1665606Snate@binkert.org Event *event = new SimLoopExitEvent(cause, 0); 1676221Snate@binkert.org comLoadEventQueue[tid]->schedule(event, p->max_loads_any_thread); 1685606Snate@binkert.org } 1695606Snate@binkert.org } 170124SN/A 1711400SN/A if (p->max_loads_all_threads != 0) { 1725606Snate@binkert.org const char *cause = "all threads reached the max load count"; 173124SN/A // allocate & initialize shared downcounter: each event will 174124SN/A // decrement this when triggered; simulation will terminate 175124SN/A // when counter reaches 0 176124SN/A int *counter = new int; 1776221Snate@binkert.org *counter = numThreads; 1786221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; ++tid) { 1795606Snate@binkert.org Event *event = new CountedExitEvent(cause, *counter); 1806221Snate@binkert.org comLoadEventQueue[tid]->schedule(event, p->max_loads_all_threads); 1815606Snate@binkert.org } 182124SN/A } 183124SN/A 1841191SN/A functionTracingEnabled = false; 1855529Snate@binkert.org if (p->function_trace) { 1861388SN/A functionTraceStream = simout.find(csprintf("ftrace.%s", name())); 1871191SN/A currentFunctionStart = currentFunctionEnd = 0; 1885529Snate@binkert.org functionEntryTick = p->function_trace_start; 1891191SN/A 1905529Snate@binkert.org if (p->function_trace_start == 0) { 1911191SN/A functionTracingEnabled = true; 1921191SN/A } else { 1935606Snate@binkert.org typedef EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace> wrap; 1945606Snate@binkert.org Event *event = new wrap(this, true); 1955606Snate@binkert.org schedule(event, p->function_trace_start); 1961191SN/A } 1971191SN/A } 1985810Sgblack@eecs.umich.edu interrupts->setCPU(this); 1995810Sgblack@eecs.umich.edu 2008745Sgblack@eecs.umich.edu#if FULL_SYSTEM 2011917SN/A profileEvent = NULL; 2025529Snate@binkert.org if (params()->profile) 2035529Snate@binkert.org profileEvent = new ProfileEvent(this, params()->profile); 2041917SN/A#endif 2055529Snate@binkert.org tracer = params()->tracer; 2061917SN/A} 2071191SN/A 2081191SN/Avoid 2091191SN/ABaseCPU::enableFunctionTrace() 2101191SN/A{ 2111191SN/A functionTracingEnabled = true; 2121191SN/A} 2131191SN/A 2141191SN/ABaseCPU::~BaseCPU() 2151191SN/A{ 2161191SN/A} 2171191SN/A 2181129SN/Avoid 2191129SN/ABaseCPU::init() 2201129SN/A{ 2215529Snate@binkert.org if (!params()->defer_registration) 2222680Sktlim@umich.edu registerThreadContexts(); 2231129SN/A} 224180SN/A 2252SN/Avoid 2261917SN/ABaseCPU::startup() 2271917SN/A{ 2281917SN/A#if FULL_SYSTEM 2295529Snate@binkert.org if (!params()->defer_registration && profileEvent) 2307823Ssteve.reinhardt@amd.com schedule(profileEvent, curTick()); 2311917SN/A#endif 2322356SN/A 2335529Snate@binkert.org if (params()->progress_interval) { 2345606Snate@binkert.org Tick num_ticks = ticks(params()->progress_interval); 2356144Sksewell@umich.edu 2366144Sksewell@umich.edu Event *event; 2376144Sksewell@umich.edu event = new CPUProgressEvent(this, num_ticks); 2382356SN/A } 2391917SN/A} 2401917SN/A 2411917SN/A 2421917SN/Avoid 2432SN/ABaseCPU::regStats() 2442SN/A{ 245729SN/A using namespace Stats; 246707SN/A 247707SN/A numCycles 248707SN/A .name(name() + ".numCycles") 249707SN/A .desc("number of cpu cycles simulated") 250707SN/A ; 251707SN/A 2527914SBrad.Beckmann@amd.com numWorkItemsStarted 2537914SBrad.Beckmann@amd.com .name(name() + ".numWorkItemsStarted") 2547914SBrad.Beckmann@amd.com .desc("number of work items this cpu started") 2557914SBrad.Beckmann@amd.com ; 2567914SBrad.Beckmann@amd.com 2577914SBrad.Beckmann@amd.com numWorkItemsCompleted 2587914SBrad.Beckmann@amd.com .name(name() + ".numWorkItemsCompleted") 2597914SBrad.Beckmann@amd.com .desc("number of work items this cpu completed") 2607914SBrad.Beckmann@amd.com ; 2617914SBrad.Beckmann@amd.com 2622680Sktlim@umich.edu int size = threadContexts.size(); 2632SN/A if (size > 1) { 2642SN/A for (int i = 0; i < size; ++i) { 2652SN/A stringstream namestr; 2662SN/A ccprintf(namestr, "%s.ctx%d", name(), i); 2672680Sktlim@umich.edu threadContexts[i]->regStats(namestr.str()); 2682SN/A } 2692SN/A } else if (size == 1) 2702680Sktlim@umich.edu threadContexts[0]->regStats(name()); 2712190SN/A 2722190SN/A#if FULL_SYSTEM 2732190SN/A#endif 2742SN/A} 2752SN/A 2763495Sktlim@umich.eduTick 2773495Sktlim@umich.eduBaseCPU::nextCycle() 2783495Sktlim@umich.edu{ 2797823Ssteve.reinhardt@amd.com Tick next_tick = curTick() - phase + clock - 1; 2803495Sktlim@umich.edu next_tick -= (next_tick % clock); 2813661Srdreslin@umich.edu next_tick += phase; 2823495Sktlim@umich.edu return next_tick; 2833495Sktlim@umich.edu} 2843495Sktlim@umich.edu 2853495Sktlim@umich.eduTick 2863495Sktlim@umich.eduBaseCPU::nextCycle(Tick begin_tick) 2873495Sktlim@umich.edu{ 2883495Sktlim@umich.edu Tick next_tick = begin_tick; 2894599Sacolyte@umich.edu if (next_tick % clock != 0) 2904599Sacolyte@umich.edu next_tick = next_tick - (next_tick % clock) + clock; 2913661Srdreslin@umich.edu next_tick += phase; 2923495Sktlim@umich.edu 2937823Ssteve.reinhardt@amd.com assert(next_tick >= curTick()); 2943495Sktlim@umich.edu return next_tick; 2953495Sktlim@umich.edu} 296180SN/A 297180SN/Avoid 2982680Sktlim@umich.eduBaseCPU::registerThreadContexts() 299180SN/A{ 3006221Snate@binkert.org ThreadID size = threadContexts.size(); 3016221Snate@binkert.org for (ThreadID tid = 0; tid < size; ++tid) { 3026221Snate@binkert.org ThreadContext *tc = threadContexts[tid]; 3032378SN/A 3045718Shsul@eecs.umich.edu /** This is so that contextId and cpuId match where there is a 3055718Shsul@eecs.umich.edu * 1cpu:1context relationship. Otherwise, the order of registration 3065718Shsul@eecs.umich.edu * could affect the assignment and cpu 1 could have context id 3, for 3075718Shsul@eecs.umich.edu * example. We may even want to do something like this for SMT so that 3085718Shsul@eecs.umich.edu * cpu 0 has the lowest thread contexts and cpu N has the highest, but 3095718Shsul@eecs.umich.edu * I'll just do this for now 3105718Shsul@eecs.umich.edu */ 3116221Snate@binkert.org if (numThreads == 1) 3125718Shsul@eecs.umich.edu tc->setContextId(system->registerThreadContext(tc, _cpuId)); 3135718Shsul@eecs.umich.edu else 3145718Shsul@eecs.umich.edu tc->setContextId(system->registerThreadContext(tc)); 3155713Shsul@eecs.umich.edu#if !FULL_SYSTEM 3165714Shsul@eecs.umich.edu tc->getProcessPtr()->assignThreadContext(tc->contextId()); 317180SN/A#endif 318180SN/A } 319180SN/A} 320180SN/A 321180SN/A 3224000Ssaidi@eecs.umich.eduint 3234000Ssaidi@eecs.umich.eduBaseCPU::findContext(ThreadContext *tc) 3244000Ssaidi@eecs.umich.edu{ 3256221Snate@binkert.org ThreadID size = threadContexts.size(); 3266221Snate@binkert.org for (ThreadID tid = 0; tid < size; ++tid) { 3276221Snate@binkert.org if (tc == threadContexts[tid]) 3286221Snate@binkert.org return tid; 3294000Ssaidi@eecs.umich.edu } 3304000Ssaidi@eecs.umich.edu return 0; 3314000Ssaidi@eecs.umich.edu} 3324000Ssaidi@eecs.umich.edu 333180SN/Avoid 3342798Sktlim@umich.eduBaseCPU::switchOut() 335180SN/A{ 3362359SN/A// panic("This CPU doesn't support sampling!"); 3372359SN/A#if FULL_SYSTEM 3382359SN/A if (profileEvent && profileEvent->scheduled()) 3395606Snate@binkert.org deschedule(profileEvent); 3402359SN/A#endif 341180SN/A} 342180SN/A 343180SN/Avoid 3444192Sktlim@umich.eduBaseCPU::takeOverFrom(BaseCPU *oldCPU, Port *ic, Port *dc) 345180SN/A{ 3462680Sktlim@umich.edu assert(threadContexts.size() == oldCPU->threadContexts.size()); 347180SN/A 3485712Shsul@eecs.umich.edu _cpuId = oldCPU->cpuId(); 3495712Shsul@eecs.umich.edu 3506221Snate@binkert.org ThreadID size = threadContexts.size(); 3516221Snate@binkert.org for (ThreadID i = 0; i < size; ++i) { 3522680Sktlim@umich.edu ThreadContext *newTC = threadContexts[i]; 3532680Sktlim@umich.edu ThreadContext *oldTC = oldCPU->threadContexts[i]; 354180SN/A 3552680Sktlim@umich.edu newTC->takeOverFrom(oldTC); 3562651Ssaidi@eecs.umich.edu 3572680Sktlim@umich.edu CpuEvent::replaceThreadContext(oldTC, newTC); 3582651Ssaidi@eecs.umich.edu 3595714Shsul@eecs.umich.edu assert(newTC->contextId() == oldTC->contextId()); 3605715Shsul@eecs.umich.edu assert(newTC->threadId() == oldTC->threadId()); 3615714Shsul@eecs.umich.edu system->replaceThreadContext(newTC, newTC->contextId()); 3622359SN/A 3635875Ssteve.reinhardt@amd.com /* This code no longer works since the zero register (e.g., 3645875Ssteve.reinhardt@amd.com * r31 on Alpha) doesn't necessarily contain zero at this 3655875Ssteve.reinhardt@amd.com * point. 3665875Ssteve.reinhardt@amd.com if (DTRACE(Context)) 3675217Ssaidi@eecs.umich.edu ThreadContext::compare(oldTC, newTC); 3685875Ssteve.reinhardt@amd.com */ 3697781SAli.Saidi@ARM.com 3707781SAli.Saidi@ARM.com Port *old_itb_port, *old_dtb_port, *new_itb_port, *new_dtb_port; 3717781SAli.Saidi@ARM.com old_itb_port = oldTC->getITBPtr()->getPort(); 3727781SAli.Saidi@ARM.com old_dtb_port = oldTC->getDTBPtr()->getPort(); 3737781SAli.Saidi@ARM.com new_itb_port = newTC->getITBPtr()->getPort(); 3747781SAli.Saidi@ARM.com new_dtb_port = newTC->getDTBPtr()->getPort(); 3757781SAli.Saidi@ARM.com 3767781SAli.Saidi@ARM.com // Move over any table walker ports if they exist 3777781SAli.Saidi@ARM.com if (new_itb_port && !new_itb_port->isConnected()) { 3787781SAli.Saidi@ARM.com assert(old_itb_port); 3797781SAli.Saidi@ARM.com Port *peer = old_itb_port->getPeer();; 3807781SAli.Saidi@ARM.com new_itb_port->setPeer(peer); 3817781SAli.Saidi@ARM.com peer->setPeer(new_itb_port); 3827781SAli.Saidi@ARM.com } 3837781SAli.Saidi@ARM.com if (new_dtb_port && !new_dtb_port->isConnected()) { 3847781SAli.Saidi@ARM.com assert(old_dtb_port); 3857781SAli.Saidi@ARM.com Port *peer = old_dtb_port->getPeer();; 3867781SAli.Saidi@ARM.com new_dtb_port->setPeer(peer); 3877781SAli.Saidi@ARM.com peer->setPeer(new_dtb_port); 3887781SAli.Saidi@ARM.com } 389180SN/A } 390605SN/A 3913520Sgblack@eecs.umich.edu interrupts = oldCPU->interrupts; 3925810Sgblack@eecs.umich.edu interrupts->setCPU(this); 3932254SN/A 3948745Sgblack@eecs.umich.edu#if FULL_SYSTEM 3956221Snate@binkert.org for (ThreadID i = 0; i < size; ++i) 3962680Sktlim@umich.edu threadContexts[i]->profileClear(); 3972254SN/A 3984947Snate@binkert.org if (profileEvent) 3997823Ssteve.reinhardt@amd.com schedule(profileEvent, curTick()); 400612SN/A#endif 4014192Sktlim@umich.edu 4024192Sktlim@umich.edu // Connect new CPU to old CPU's memory only if new CPU isn't 4034192Sktlim@umich.edu // connected to anything. Also connect old CPU's memory to new 4044192Sktlim@umich.edu // CPU. 4055476Snate@binkert.org if (!ic->isConnected()) { 4065476Snate@binkert.org Port *peer = oldCPU->getPort("icache_port")->getPeer(); 4074192Sktlim@umich.edu ic->setPeer(peer); 4085476Snate@binkert.org peer->setPeer(ic); 4094192Sktlim@umich.edu } 4104192Sktlim@umich.edu 4115476Snate@binkert.org if (!dc->isConnected()) { 4125476Snate@binkert.org Port *peer = oldCPU->getPort("dcache_port")->getPeer(); 4134192Sktlim@umich.edu dc->setPeer(peer); 4145476Snate@binkert.org peer->setPeer(dc); 4154192Sktlim@umich.edu } 416180SN/A} 417180SN/A 418180SN/A 4191858SN/A#if FULL_SYSTEM 4205536Srstrong@hp.comBaseCPU::ProfileEvent::ProfileEvent(BaseCPU *_cpu, Tick _interval) 4215606Snate@binkert.org : cpu(_cpu), interval(_interval) 4221917SN/A{ } 4231917SN/A 4241917SN/Avoid 4251917SN/ABaseCPU::ProfileEvent::process() 4261917SN/A{ 4276221Snate@binkert.org ThreadID size = cpu->threadContexts.size(); 4286221Snate@binkert.org for (ThreadID i = 0; i < size; ++i) { 4292680Sktlim@umich.edu ThreadContext *tc = cpu->threadContexts[i]; 4302680Sktlim@umich.edu tc->profileSample(); 4311917SN/A } 4322254SN/A 4337823Ssteve.reinhardt@amd.com cpu->schedule(this, curTick() + interval); 4341917SN/A} 4351917SN/A 4368745Sgblack@eecs.umich.edu#endif // FULL_SYSTEM 4378745Sgblack@eecs.umich.edu 4382SN/Avoid 439921SN/ABaseCPU::serialize(std::ostream &os) 440921SN/A{ 4414000Ssaidi@eecs.umich.edu SERIALIZE_SCALAR(instCnt); 4425647Sgblack@eecs.umich.edu interrupts->serialize(os); 443921SN/A} 444921SN/A 445921SN/Avoid 446921SN/ABaseCPU::unserialize(Checkpoint *cp, const std::string §ion) 447921SN/A{ 4484000Ssaidi@eecs.umich.edu UNSERIALIZE_SCALAR(instCnt); 4495647Sgblack@eecs.umich.edu interrupts->unserialize(cp, section); 450921SN/A} 451921SN/A 4521191SN/Avoid 4531191SN/ABaseCPU::traceFunctionsInternal(Addr pc) 4541191SN/A{ 4551191SN/A if (!debugSymbolTable) 4561191SN/A return; 4571191SN/A 4581191SN/A // if pc enters different function, print new function symbol and 4591191SN/A // update saved range. Otherwise do nothing. 4601191SN/A if (pc < currentFunctionStart || pc >= currentFunctionEnd) { 4611191SN/A string sym_str; 4621191SN/A bool found = debugSymbolTable->findNearestSymbol(pc, sym_str, 4631191SN/A currentFunctionStart, 4641191SN/A currentFunctionEnd); 4651191SN/A 4661191SN/A if (!found) { 4671191SN/A // no symbol found: use addr as label 4681191SN/A sym_str = csprintf("0x%x", pc); 4691191SN/A currentFunctionStart = pc; 4701191SN/A currentFunctionEnd = pc + 1; 4711191SN/A } 4721191SN/A 4731191SN/A ccprintf(*functionTraceStream, " (%d)\n%d: %s", 4747823Ssteve.reinhardt@amd.com curTick() - functionEntryTick, curTick(), sym_str); 4757823Ssteve.reinhardt@amd.com functionEntryTick = curTick(); 4761191SN/A } 4771191SN/A} 478