base.cc revision 1545
1/* 2 * Copyright (c) 2002-2004 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#include <iostream> 30#include <string> 31#include <sstream> 32 33#include "base/cprintf.hh" 34#include "base/loader/symtab.hh" 35#include "base/misc.hh" 36#include "base/output.hh" 37#include "cpu/base_cpu.hh" 38#include "cpu/exec_context.hh" 39#include "cpu/sampling_cpu/sampling_cpu.hh" 40#include "sim/param.hh" 41#include "sim/sim_events.hh" 42 43using namespace std; 44 45vector<BaseCPU *> BaseCPU::cpuList; 46 47// This variable reflects the max number of threads in any CPU. Be 48// careful to only use it once all the CPUs that you care about have 49// been initialized 50int maxThreadsPerCPU = 1; 51 52#ifdef FULL_SYSTEM 53BaseCPU::BaseCPU(Params *p) 54 : SimObject(p->name), frequency(p->freq), checkInterrupts(true), 55 params(p), number_of_threads(p->numberOfThreads), system(p->system) 56#else 57BaseCPU::BaseCPU(Params *p) 58 : SimObject(p->name), params(p), number_of_threads(p->numberOfThreads) 59#endif 60{ 61 // add self to global list of CPUs 62 cpuList.push_back(this); 63 64 if (number_of_threads > maxThreadsPerCPU) 65 maxThreadsPerCPU = number_of_threads; 66 67 // allocate per-thread instruction-based event queues 68 comInstEventQueue = new EventQueue *[number_of_threads]; 69 for (int i = 0; i < number_of_threads; ++i) 70 comInstEventQueue[i] = new EventQueue("instruction-based event queue"); 71 72 // 73 // set up instruction-count-based termination events, if any 74 // 75 if (p->max_insts_any_thread != 0) 76 for (int i = 0; i < number_of_threads; ++i) 77 new SimExitEvent(comInstEventQueue[i], p->max_insts_any_thread, 78 "a thread reached the max instruction count"); 79 80 if (p->max_insts_all_threads != 0) { 81 // allocate & initialize shared downcounter: each event will 82 // decrement this when triggered; simulation will terminate 83 // when counter reaches 0 84 int *counter = new int; 85 *counter = number_of_threads; 86 for (int i = 0; i < number_of_threads; ++i) 87 new CountedExitEvent(comInstEventQueue[i], 88 "all threads reached the max instruction count", 89 p->max_insts_all_threads, *counter); 90 } 91 92 // allocate per-thread load-based event queues 93 comLoadEventQueue = new EventQueue *[number_of_threads]; 94 for (int i = 0; i < number_of_threads; ++i) 95 comLoadEventQueue[i] = new EventQueue("load-based event queue"); 96 97 // 98 // set up instruction-count-based termination events, if any 99 // 100 if (p->max_loads_any_thread != 0) 101 for (int i = 0; i < number_of_threads; ++i) 102 new SimExitEvent(comLoadEventQueue[i], p->max_loads_any_thread, 103 "a thread reached the max load count"); 104 105 if (p->max_loads_all_threads != 0) { 106 // allocate & initialize shared downcounter: each event will 107 // decrement this when triggered; simulation will terminate 108 // when counter reaches 0 109 int *counter = new int; 110 *counter = number_of_threads; 111 for (int i = 0; i < number_of_threads; ++i) 112 new CountedExitEvent(comLoadEventQueue[i], 113 "all threads reached the max load count", 114 p->max_loads_all_threads, *counter); 115 } 116 117#ifdef FULL_SYSTEM 118 memset(interrupts, 0, sizeof(interrupts)); 119 intstatus = 0; 120#endif 121 122 functionTracingEnabled = false; 123 if (p->functionTrace) { 124 functionTraceStream = simout.find(csprintf("ftrace.%s", name())); 125 currentFunctionStart = currentFunctionEnd = 0; 126 functionEntryTick = p->functionTraceStart; 127 128 if (p->functionTraceStart == 0) { 129 functionTracingEnabled = true; 130 } else { 131 Event *e = 132 new EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace>(this, 133 true); 134 e->schedule(p->functionTraceStart); 135 } 136 } 137} 138 139 140void 141BaseCPU::enableFunctionTrace() 142{ 143 functionTracingEnabled = true; 144} 145 146BaseCPU::~BaseCPU() 147{ 148} 149 150void 151BaseCPU::init() 152{ 153 if (!params->deferRegistration) 154 registerExecContexts(); 155} 156 157void 158BaseCPU::regStats() 159{ 160 using namespace Stats; 161 162 numCycles 163 .name(name() + ".numCycles") 164 .desc("number of cpu cycles simulated") 165 ; 166 167 int size = execContexts.size(); 168 if (size > 1) { 169 for (int i = 0; i < size; ++i) { 170 stringstream namestr; 171 ccprintf(namestr, "%s.ctx%d", name(), i); 172 execContexts[i]->regStats(namestr.str()); 173 } 174 } else if (size == 1) 175 execContexts[0]->regStats(name()); 176} 177 178 179void 180BaseCPU::registerExecContexts() 181{ 182 for (int i = 0; i < execContexts.size(); ++i) { 183 ExecContext *xc = execContexts[i]; 184 int cpu_id; 185 186#ifdef FULL_SYSTEM 187 cpu_id = system->registerExecContext(xc); 188#else 189 cpu_id = xc->process->registerExecContext(xc); 190#endif 191 192 xc->cpu_id = cpu_id; 193 } 194} 195 196 197void 198BaseCPU::switchOut(SamplingCPU *sampler) 199{ 200 panic("This CPU doesn't support sampling!"); 201} 202 203void 204BaseCPU::takeOverFrom(BaseCPU *oldCPU) 205{ 206 assert(execContexts.size() == oldCPU->execContexts.size()); 207 208 for (int i = 0; i < execContexts.size(); ++i) { 209 ExecContext *newXC = execContexts[i]; 210 ExecContext *oldXC = oldCPU->execContexts[i]; 211 212 newXC->takeOverFrom(oldXC); 213 assert(newXC->cpu_id == oldXC->cpu_id); 214#ifdef FULL_SYSTEM 215 system->replaceExecContext(newXC, newXC->cpu_id); 216#else 217 assert(newXC->process == oldXC->process); 218 newXC->process->replaceExecContext(newXC, newXC->cpu_id); 219#endif 220 } 221 222#ifdef FULL_SYSTEM 223 for (int i = 0; i < NumInterruptLevels; ++i) 224 interrupts[i] = oldCPU->interrupts[i]; 225 intstatus = oldCPU->intstatus; 226#endif 227} 228 229 230#ifdef FULL_SYSTEM 231void 232BaseCPU::post_interrupt(int int_num, int index) 233{ 234 DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index); 235 236 if (int_num < 0 || int_num >= NumInterruptLevels) 237 panic("int_num out of bounds\n"); 238 239 if (index < 0 || index >= sizeof(uint64_t) * 8) 240 panic("int_num out of bounds\n"); 241 242 checkInterrupts = true; 243 interrupts[int_num] |= 1 << index; 244 intstatus |= (ULL(1) << int_num); 245} 246 247void 248BaseCPU::clear_interrupt(int int_num, int index) 249{ 250 DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index); 251 252 if (int_num < 0 || int_num >= NumInterruptLevels) 253 panic("int_num out of bounds\n"); 254 255 if (index < 0 || index >= sizeof(uint64_t) * 8) 256 panic("int_num out of bounds\n"); 257 258 interrupts[int_num] &= ~(1 << index); 259 if (interrupts[int_num] == 0) 260 intstatus &= ~(ULL(1) << int_num); 261} 262 263void 264BaseCPU::clear_interrupts() 265{ 266 DPRINTF(Interrupt, "Interrupts all cleared\n"); 267 268 memset(interrupts, 0, sizeof(interrupts)); 269 intstatus = 0; 270} 271 272 273void 274BaseCPU::serialize(std::ostream &os) 275{ 276 SERIALIZE_ARRAY(interrupts, NumInterruptLevels); 277 SERIALIZE_SCALAR(intstatus); 278} 279 280void 281BaseCPU::unserialize(Checkpoint *cp, const std::string §ion) 282{ 283 UNSERIALIZE_ARRAY(interrupts, NumInterruptLevels); 284 UNSERIALIZE_SCALAR(intstatus); 285} 286 287#endif // FULL_SYSTEM 288 289void 290BaseCPU::traceFunctionsInternal(Addr pc) 291{ 292 if (!debugSymbolTable) 293 return; 294 295 // if pc enters different function, print new function symbol and 296 // update saved range. Otherwise do nothing. 297 if (pc < currentFunctionStart || pc >= currentFunctionEnd) { 298 string sym_str; 299 bool found = debugSymbolTable->findNearestSymbol(pc, sym_str, 300 currentFunctionStart, 301 currentFunctionEnd); 302 303 if (!found) { 304 // no symbol found: use addr as label 305 sym_str = csprintf("0x%x", pc); 306 currentFunctionStart = pc; 307 currentFunctionEnd = pc + 1; 308 } 309 310 ccprintf(*functionTraceStream, " (%d)\n%d: %s", 311 curTick - functionEntryTick, curTick, sym_str); 312 functionEntryTick = curTick; 313 } 314} 315 316 317DEFINE_SIM_OBJECT_CLASS_NAME("BaseCPU", BaseCPU) 318