activity.hh revision 2348
16019Shines@cs.fsu.edu/*
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36019Shines@cs.fsu.edu * All rights reserved.
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286019Shines@cs.fsu.edu
296019Shines@cs.fsu.edu#ifndef __CPU_ACTIVITY_HH__
306019Shines@cs.fsu.edu#define __CPU_ACTIVITY_HH__
316019Shines@cs.fsu.edu
326019Shines@cs.fsu.edu#include "base/timebuf.hh"
336019Shines@cs.fsu.edu#include "base/trace.hh"
346019Shines@cs.fsu.edu
356019Shines@cs.fsu.edu/**
366019Shines@cs.fsu.edu * ActivityRecorder helper class that informs the CPU if it can switch
376019Shines@cs.fsu.edu * over to being idle or not.  It works by having a time buffer as
386019Shines@cs.fsu.edu * long as any time buffer in the CPU, and the CPU and all of its
396019Shines@cs.fsu.edu * stages inform the ActivityRecorder when they write to any time
406019Shines@cs.fsu.edu * buffer.  The ActivityRecorder marks a 1 in the "0" slot of the time
416019Shines@cs.fsu.edu * buffer any time a stage writes to a time buffer, and it advances
426019Shines@cs.fsu.edu * its time buffer at the same time as all other stages.  The
436019Shines@cs.fsu.edu * ActivityRecorder also records if a stage has activity to do next
446019Shines@cs.fsu.edu * cycle.  The recorder keeps a count of these two.  Thus any time the
456019Shines@cs.fsu.edu * count is non-zero, there is either communication still in flight,
466019Shines@cs.fsu.edu * or activity that still must be done, meaning that the CPU can not
476019Shines@cs.fsu.edu * idle.  If count is zero, then the CPU can safely idle as it has no
486019Shines@cs.fsu.edu * more outstanding work to do.
496019Shines@cs.fsu.edu */
506019Shines@cs.fsu.educlass ActivityRecorder {
516019Shines@cs.fsu.edu  public:
526019Shines@cs.fsu.edu    ActivityRecorder(int num_stages, int longest_latency, int count);
536019Shines@cs.fsu.edu
546019Shines@cs.fsu.edu    /** Records that there is activity this cycle. */
556019Shines@cs.fsu.edu    void activity();
566019Shines@cs.fsu.edu
576019Shines@cs.fsu.edu    /** Advances the activity buffer, decrementing the activityCount
586019Shines@cs.fsu.edu     *  if active communication just left the time buffer, and
596019Shines@cs.fsu.edu     *  determining if there is no activity.
606019Shines@cs.fsu.edu     */
616019Shines@cs.fsu.edu    void advance();
626019Shines@cs.fsu.edu
636019Shines@cs.fsu.edu    /** Marks a stage as active. */
646019Shines@cs.fsu.edu    void activateStage(const int idx);
656019Shines@cs.fsu.edu
666019Shines@cs.fsu.edu    /** Deactivates a stage. */
676019Shines@cs.fsu.edu    void deactivateStage(const int idx);
686019Shines@cs.fsu.edu
696019Shines@cs.fsu.edu    /** Returns how many things are active within the recorder. */
706019Shines@cs.fsu.edu    int getActivityCount() { return activityCount; }
716019Shines@cs.fsu.edu
726019Shines@cs.fsu.edu    /** Sets the count to a starting value.  Can be used to disable
736019Shines@cs.fsu.edu     * the idling option.
746019Shines@cs.fsu.edu     */
756019Shines@cs.fsu.edu    void setActivityCount(int count)
766019Shines@cs.fsu.edu    { activityCount = count; }
776019Shines@cs.fsu.edu
786019Shines@cs.fsu.edu    /** Returns if the CPU should be active. */
796019Shines@cs.fsu.edu    bool active() { return activityCount; }
806019Shines@cs.fsu.edu
816019Shines@cs.fsu.edu    /** Clears the time buffer and the activity count. */
826019Shines@cs.fsu.edu    void reset();
836019Shines@cs.fsu.edu
846019Shines@cs.fsu.edu    /** Debug function to dump the contents of the time buffer. */
856019Shines@cs.fsu.edu    void dump();
866019Shines@cs.fsu.edu
876019Shines@cs.fsu.edu    /** Debug function to ensure that the activity count matches the
886019Shines@cs.fsu.edu     * contents of the time buffer.
896019Shines@cs.fsu.edu     */
906019Shines@cs.fsu.edu    void validate();
916019Shines@cs.fsu.edu
926019Shines@cs.fsu.edu  private:
936019Shines@cs.fsu.edu    /** Time buffer that tracks if any cycles has active communication
946019Shines@cs.fsu.edu     *  in them.  It should be as long as the longest communication
956019Shines@cs.fsu.edu     *  latency in the system.  Each time any time buffer is written,
966019Shines@cs.fsu.edu     *  the activity buffer should also be written to. The
976019Shines@cs.fsu.edu     *  activityBuffer is advanced along with all the other time
986019Shines@cs.fsu.edu     *  buffers, so it should have a 1 somewhere in it only if there
996019Shines@cs.fsu.edu     *  is active communication in a time buffer.
1006019Shines@cs.fsu.edu     */
1016019Shines@cs.fsu.edu    TimeBuffer<bool> activityBuffer;
1026019Shines@cs.fsu.edu
1036019Shines@cs.fsu.edu    /** Longest latency time buffer in the CPU. */
1046019Shines@cs.fsu.edu    int longestLatency;
1056019Shines@cs.fsu.edu
1066019Shines@cs.fsu.edu    /** Tracks how many stages and cycles of time buffer have
1076019Shines@cs.fsu.edu     *  activity. Stages increment this count when they switch to
1086019Shines@cs.fsu.edu     *  active, and decrement it when they switch to
1096019Shines@cs.fsu.edu     *  inactive. Whenever a cycle that previously had no information
1106019Shines@cs.fsu.edu     *  is written in the time buffer, this is incremented. When a
1116019Shines@cs.fsu.edu     *  cycle that had information exits the time buffer due to age,
1126019Shines@cs.fsu.edu     *  this count is decremented. When the count is 0, there is no
1136019Shines@cs.fsu.edu     *  activity in the CPU, and it can be descheduled.
1146019Shines@cs.fsu.edu     */
1156019Shines@cs.fsu.edu    int activityCount;
1166019Shines@cs.fsu.edu
1176019Shines@cs.fsu.edu    /** Number of stages that can be marked as active or inactive. */
1186019Shines@cs.fsu.edu    int numStages;
1196019Shines@cs.fsu.edu
1206019Shines@cs.fsu.edu    /** Records which stages are active/inactive. */
1216019Shines@cs.fsu.edu    bool *stageActive;
1226019Shines@cs.fsu.edu};
1236019Shines@cs.fsu.edu
1246019Shines@cs.fsu.edu#endif // __CPU_ACTIVITY_HH__
1256019Shines@cs.fsu.edu