StaticInstFlags.py revision 10935 
1# Copyright (c) 2003-2005 The Regents of The University of Michigan
2# Copyright (c) 2013 Advanced Micro Devices, Inc.
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
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8# notice, this list of conditions and the following disclaimer;
9# redistributions in binary form must reproduce the above copyright
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13# contributors may be used to endorse or promote products derived from
14# this software without specific prior written permission.
15#
16# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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22# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28# Authors: Steve Reinhardt
29
30from m5.params import *
31
32# Set of boolean static instruction properties.
33#
34# Notes:
35# - The IsInteger and IsFloating flags are based on the class of registers
36# accessed by the instruction.  Although most instructions will have exactly
37# one of these two flags set, it is possible for an instruction to have
38# neither (e.g., direct unconditional branches, memory barriers) or both
39# (e.g., an FP/int conversion).
40# - If IsMemRef is set, then exactly one of IsLoad or IsStore will be set.
41# - If IsControl is set, then exactly one of IsDirectControl or IsIndirect
42# Control will be set, and exactly one of IsCondControl or IsUncondControl
43# will be set.
44# - IsSerializing, IsMemBarrier, and IsWriteBarrier are implemented as flags
45# since in the current model there's no other way for instructions to inject
46# behavior into the pipeline outside of fetch.  Once we go to an exec-in-exec
47# CPU model we should be able to get rid of these flags and implement this
48# behavior via the execute() methods.
49
50class StaticInstFlags(Enum):
51    wrapper_name = 'StaticInstFlags'
52    wrapper_is_struct = True
53    enum_name = 'Flags'
54
55    vals = [
56        'IsNop',            # Is a no-op (no effect at all).
57
58        'IsInteger',        # References integer regs.
59        'IsFloating',       # References FP regs.
60        'IsCC',             # References CC regs.
61
62        'IsMemRef',         # References memory (load, store, or prefetch)
63        'IsLoad',           # Reads from memory (load or prefetch).
64        'IsStore',          # Writes to memory.
65        'IsStoreConditional',   # Store conditional instruction.
66        'IsIndexed',        # Accesses memory with an indexed address
67                            # computation
68        'IsInstPrefetch',   # Instruction-cache prefetch.
69        'IsDataPrefetch',   # Data-cache prefetch.
70
71        'IsControl',        # Control transfer instruction.
72        'IsDirectControl',  # PC relative control transfer.
73        'IsIndirectControl',# Register indirect control transfer.
74        'IsCondControl',    # Conditional control transfer.
75        'IsUncondControl',  # Unconditional control transfer.
76        'IsCall',           # Subroutine call.
77        'IsReturn',         # Subroutine return.
78
79        'IsCondDelaySlot',  # Conditional Delay-Slot Instruction
80
81        'IsThreadSync',     # Thread synchronization operation.
82
83        'IsSerializing',    # Serializes pipeline: won't execute until all
84                            # older instructions have committed.
85        'IsSerializeBefore',
86        'IsSerializeAfter',
87        'IsMemBarrier',     # Is a memory barrier
88        'IsWriteBarrier',   # Is a write barrier
89        'IsReadBarrier',    # Is a read barrier
90        'IsERET',           # <- Causes the IFU to stall (MIPS ISA)
91
92        'IsNonSpeculative', # Should not be executed speculatively
93        'IsQuiesce',        # Is a quiesce instruction
94
95        'IsIprAccess',      # Accesses IPRs
96        'IsUnverifiable',   # Can't be verified by a checker
97
98        'IsSyscall',        # Causes a system call to be emulated in syscall
99                            # emulation mode.
100
101        # Flags for microcode
102        'IsMacroop',        # Is a macroop containing microops
103        'IsMicroop',        # Is a microop
104        'IsDelayedCommit',  # This microop doesn't commit right away
105        'IsLastMicroop',    # This microop ends a microop sequence
106        'IsFirstMicroop',   # This microop begins a microop sequence
107        # This flag doesn't do anything yet
108        'IsMicroBranch',    # This microop branches within the microcode for
109                            # a macroop
110        'IsDspOp',
111        'IsSquashAfter'     # Squash all uncommitted state after executed
112        ]
113