SConscript revision 5217:bb810bb8ca2d 
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright
9# notice, this list of conditions and the following disclaimer;
10# redistributions in binary form must reproduce the above copyright
11# notice, this list of conditions and the following disclaimer in the
12# documentation and/or other materials provided with the distribution;
13# neither the name of the copyright holders nor the names of its
14# contributors may be used to endorse or promote products derived from
15# this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28#
29# Authors: Steve Reinhardt
30
31Import('*')
32
33#################################################################
34#
35# Generate StaticInst execute() method signatures.
36#
37# There must be one signature for each CPU model compiled in.
38# Since the set of compiled-in models is flexible, we generate a
39# header containing the appropriate set of signatures on the fly.
40#
41#################################################################
42
43# CPU model-specific data is contained in cpu_models.py
44# Convert to SCons File node to get path handling
45models_db = File('cpu_models.py')
46# slurp in contents of file
47execfile(models_db.srcnode().abspath)
48
49# Template for execute() signature.
50exec_sig_template = '''
51virtual Fault execute(%s *xc, Trace::InstRecord *traceData) const = 0;
52virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const
53{ panic("initiateAcc not defined!"); M5_DUMMY_RETURN };
54virtual Fault completeAcc(Packet *pkt, %s *xc,
55                          Trace::InstRecord *traceData) const
56{ panic("completeAcc not defined!"); M5_DUMMY_RETURN };
57'''
58
59mem_ini_sig_template = '''
60virtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN };
61'''
62
63mem_comp_sig_template = '''
64virtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN };
65'''
66
67# Generate a temporary CPU list, including the CheckerCPU if
68# it's enabled.  This isn't used for anything else other than StaticInst
69# headers.
70temp_cpu_list = env['CPU_MODELS'][:]
71
72if env['USE_CHECKER']:
73    temp_cpu_list.append('CheckerCPU')
74
75# Generate header.
76def gen_cpu_exec_signatures(target, source, env):
77    f = open(str(target[0]), 'w')
78    print >> f, '''
79#ifndef __CPU_STATIC_INST_EXEC_SIGS_HH__
80#define __CPU_STATIC_INST_EXEC_SIGS_HH__
81'''
82    for cpu in temp_cpu_list:
83        xc_type = CpuModel.dict[cpu].strings['CPU_exec_context']
84        print >> f, exec_sig_template % (xc_type, xc_type, xc_type)
85    print >> f, '''
86#endif  // __CPU_STATIC_INST_EXEC_SIGS_HH__
87'''
88
89# Generate string that gets printed when header is rebuilt
90def gen_sigs_string(target, source, env):
91    return "Generating static_inst_exec_sigs.hh: " \
92           + ', '.join(temp_cpu_list)
93
94# Add command to generate header to environment.
95env.Command('static_inst_exec_sigs.hh', models_db,
96            Action(gen_cpu_exec_signatures, gen_sigs_string,
97                   varlist = temp_cpu_list))
98
99env.Depends('static_inst_exec_sigs.hh', Value(env['USE_CHECKER']))
100env.Depends('static_inst_exec_sigs.hh', Value(env['CPU_MODELS']))
101
102# List of suppported CPUs by the Checker.  Errors out if USE_CHECKER=True
103# and one of these are not being used.
104CheckerSupportedCPUList = ['O3CPU', 'OzoneCPU']
105
106SimObject('BaseCPU.py')
107SimObject('FuncUnit.py')
108SimObject('ExeTracer.py')
109SimObject('IntelTrace.py')
110
111Source('activity.cc')
112Source('base.cc')
113Source('cpuevent.cc')
114Source('exetrace.cc')
115Source('func_unit.cc')
116Source('inteltrace.cc')
117Source('pc_event.cc')
118Source('quiesce_event.cc')
119Source('static_inst.cc')
120Source('simple_thread.cc')
121Source('thread_context.cc')
122Source('thread_state.cc')
123
124if env['FULL_SYSTEM']:
125    SimObject('IntrControl.py')
126
127    Source('intr_control.cc')
128    Source('profile.cc')
129
130    if env['TARGET_ISA'] == 'sparc':
131        SimObject('LegionTrace.py')
132        Source('legiontrace.cc')
133
134if env['TARGET_ISA'] == 'x86':
135    SimObject('NativeTrace.py')
136    Source('nativetrace.cc')
137
138if env['USE_CHECKER']:
139    Source('checker/cpu.cc')
140    TraceFlag('Checker')
141    checker_supports = False
142    for i in CheckerSupportedCPUList:
143        if i in env['CPU_MODELS']:
144            checker_supports = True
145    if not checker_supports:
146        print "Checker only supports CPU models",
147        for i in CheckerSupportedCPUList:
148            print i,
149        print ", please set USE_CHECKER=False or use one of those CPU models"
150        Exit(1)
151
152TraceFlag('Activity')
153TraceFlag('Commit')
154TraceFlag('Context')
155TraceFlag('Decode')
156TraceFlag('DynInst')
157TraceFlag('ExecEnable')
158TraceFlag('ExecCPSeq')
159TraceFlag('ExecEffAddr')
160TraceFlag('ExecFetchSeq')
161TraceFlag('ExecOpClass')
162TraceFlag('ExecRegDelta')
163TraceFlag('ExecResult')
164TraceFlag('ExecSpeculative')
165TraceFlag('ExecSymbol')
166TraceFlag('ExecThread')
167TraceFlag('ExecTicks')
168TraceFlag('Fetch')
169TraceFlag('IntrControl')
170TraceFlag('PCEvent')
171TraceFlag('Quiesce')
172
173CompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread',
174    'ExecEffAddr', 'ExecResult', 'ExecSymbol' ])
175