SConscript revision 4486:aaeb03a8a6e1
17159Sgblack@eecs.umich.edu# -*- mode:python -*- 27159Sgblack@eecs.umich.edu 37159Sgblack@eecs.umich.edu# Copyright (c) 2006 The Regents of The University of Michigan 47159Sgblack@eecs.umich.edu# All rights reserved. 57159Sgblack@eecs.umich.edu# 67159Sgblack@eecs.umich.edu# Redistribution and use in source and binary forms, with or without 77159Sgblack@eecs.umich.edu# modification, are permitted provided that the following conditions are 87159Sgblack@eecs.umich.edu# met: redistributions of source code must retain the above copyright 97159Sgblack@eecs.umich.edu# notice, this list of conditions and the following disclaimer; 107159Sgblack@eecs.umich.edu# redistributions in binary form must reproduce the above copyright 117159Sgblack@eecs.umich.edu# notice, this list of conditions and the following disclaimer in the 127159Sgblack@eecs.umich.edu# documentation and/or other materials provided with the distribution; 137159Sgblack@eecs.umich.edu# neither the name of the copyright holders nor the names of its 147159Sgblack@eecs.umich.edu# contributors may be used to endorse or promote products derived from 157159Sgblack@eecs.umich.edu# this software without specific prior written permission. 167159Sgblack@eecs.umich.edu# 177159Sgblack@eecs.umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 187159Sgblack@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 197159Sgblack@eecs.umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 207159Sgblack@eecs.umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 217159Sgblack@eecs.umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 227159Sgblack@eecs.umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 237159Sgblack@eecs.umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 247159Sgblack@eecs.umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 257159Sgblack@eecs.umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 267159Sgblack@eecs.umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 277159Sgblack@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 287159Sgblack@eecs.umich.edu# 297159Sgblack@eecs.umich.edu# Authors: Steve Reinhardt 307159Sgblack@eecs.umich.edu 317159Sgblack@eecs.umich.eduImport('*') 327159Sgblack@eecs.umich.edu 337159Sgblack@eecs.umich.edu################################################################# 347159Sgblack@eecs.umich.edu# 357159Sgblack@eecs.umich.edu# Generate StaticInst execute() method signatures. 367159Sgblack@eecs.umich.edu# 377159Sgblack@eecs.umich.edu# There must be one signature for each CPU model compiled in. 387159Sgblack@eecs.umich.edu# Since the set of compiled-in models is flexible, we generate a 397159Sgblack@eecs.umich.edu# header containing the appropriate set of signatures on the fly. 407159Sgblack@eecs.umich.edu# 417159Sgblack@eecs.umich.edu################################################################# 427159Sgblack@eecs.umich.edu 437159Sgblack@eecs.umich.edu# CPU model-specific data is contained in cpu_models.py 447159Sgblack@eecs.umich.edu# Convert to SCons File node to get path handling 457159Sgblack@eecs.umich.edumodels_db = File('cpu_models.py') 467159Sgblack@eecs.umich.edu# slurp in contents of file 4712616Sgabeblack@google.comexecfile(models_db.srcnode().abspath) 487159Sgblack@eecs.umich.edu 497159Sgblack@eecs.umich.edu# Template for execute() signature. 507159Sgblack@eecs.umich.eduexec_sig_template = ''' 517159Sgblack@eecs.umich.eduvirtual Fault execute(%s *xc, Trace::InstRecord *traceData) const = 0; 5210184SCurtis.Dunham@arm.comvirtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const 537159Sgblack@eecs.umich.edu{ panic("initiateAcc not defined!"); M5_DUMMY_RETURN }; 547159Sgblack@eecs.umich.eduvirtual Fault completeAcc(Packet *pkt, %s *xc, 557159Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 567159Sgblack@eecs.umich.edu{ panic("completeAcc not defined!"); M5_DUMMY_RETURN }; 577159Sgblack@eecs.umich.edu''' 587159Sgblack@eecs.umich.edu 597159Sgblack@eecs.umich.edumem_ini_sig_template = ''' 607848SAli.Saidi@ARM.comvirtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN }; 617848SAli.Saidi@ARM.com''' 627848SAli.Saidi@ARM.com 637848SAli.Saidi@ARM.commem_comp_sig_template = ''' 647848SAli.Saidi@ARM.comvirtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN }; 657159Sgblack@eecs.umich.edu''' 667159Sgblack@eecs.umich.edu 677159Sgblack@eecs.umich.edu# Generate a temporary CPU list, including the CheckerCPU if 687159Sgblack@eecs.umich.edu# it's enabled. This isn't used for anything else other than StaticInst 697159Sgblack@eecs.umich.edu# headers. 707159Sgblack@eecs.umich.edutemp_cpu_list = env['CPU_MODELS'][:] 717159Sgblack@eecs.umich.edu 727159Sgblack@eecs.umich.eduif env['USE_CHECKER']: 737159Sgblack@eecs.umich.edu temp_cpu_list.append('CheckerCPU') 747159Sgblack@eecs.umich.edu 757159Sgblack@eecs.umich.edu# Generate header. 7612616Sgabeblack@google.comdef gen_cpu_exec_signatures(target, source, env): 777159Sgblack@eecs.umich.edu f = open(str(target[0]), 'w') 787159Sgblack@eecs.umich.edu print >> f, ''' 797159Sgblack@eecs.umich.edu#ifndef __CPU_STATIC_INST_EXEC_SIGS_HH__ 807159Sgblack@eecs.umich.edu#define __CPU_STATIC_INST_EXEC_SIGS_HH__ 8110184SCurtis.Dunham@arm.com''' 827159Sgblack@eecs.umich.edu for cpu in temp_cpu_list: 837159Sgblack@eecs.umich.edu xc_type = CpuModel.dict[cpu].strings['CPU_exec_context'] 847159Sgblack@eecs.umich.edu print >> f, exec_sig_template % (xc_type, xc_type, xc_type) 857159Sgblack@eecs.umich.edu print >> f, ''' 867159Sgblack@eecs.umich.edu#endif // __CPU_STATIC_INST_EXEC_SIGS_HH__ 877159Sgblack@eecs.umich.edu''' 887159Sgblack@eecs.umich.edu 897159Sgblack@eecs.umich.edu# Generate string that gets printed when header is rebuilt 907848SAli.Saidi@ARM.comdef gen_sigs_string(target, source, env): 917848SAli.Saidi@ARM.com return "Generating static_inst_exec_sigs.hh: " \ 927848SAli.Saidi@ARM.com + ', '.join(temp_cpu_list) 937848SAli.Saidi@ARM.com 947848SAli.Saidi@ARM.com# Add command to generate header to environment. 957159Sgblack@eecs.umich.eduenv.Command('static_inst_exec_sigs.hh', models_db, 967159Sgblack@eecs.umich.edu Action(gen_cpu_exec_signatures, gen_sigs_string, 97 varlist = temp_cpu_list)) 98 99env.Depends('static_inst_exec_sigs.hh', Value(env['USE_CHECKER'])) 100env.Depends('static_inst_exec_sigs.hh', Value(env['CPU_MODELS'])) 101 102# List of suppported CPUs by the Checker. Errors out if USE_CHECKER=True 103# and one of these are not being used. 104CheckerSupportedCPUList = ['O3CPU', 'OzoneCPU'] 105 106SimObject('BaseCPU.py') 107SimObject('FuncUnit.py') 108 109Source('activity.cc') 110Source('base.cc') 111Source('cpuevent.cc') 112Source('exetrace.cc') 113Source('func_unit.cc') 114Source('op_class.cc') 115Source('pc_event.cc') 116Source('quiesce_event.cc') 117Source('static_inst.cc') 118Source('simple_thread.cc') 119Source('thread_state.cc') 120 121if env['FULL_SYSTEM']: 122 SimObject('IntrControl.py') 123 124 Source('intr_control.cc') 125 Source('profile.cc') 126 127if env['USE_CHECKER']: 128 Source('checker/cpu.cc') 129 checker_supports = False 130 for i in CheckerSupportedCPUList: 131 if i in env['CPU_MODELS']: 132 checker_supports = True 133 if not checker_supports: 134 print "Checker only supports CPU models", 135 for i in CheckerSupportedCPUList: 136 print i, 137 print ", please set USE_CHECKER=False or use one of those CPU models" 138 Exit(1) 139